2 * Copyright (c) 1990 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
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15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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20 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * from: @(#)param.h 5.8 (Berkeley) 6/28/91
33 #ifndef _MACHINE_PARAM_H_
34 #define _MACHINE_PARAM_H_
37 * Machine dependent constants for arm64.
40 #include <machine/_align.h>
42 #define STACKALIGNBYTES (16 - 1)
43 #define STACKALIGN(p) ((uint64_t)(p) & ~STACKALIGNBYTES)
46 #define MACHINE "arm64"
49 #define MACHINE_ARCH "aarch64"
52 #if defined(SMP) || defined(KLD_MODULE)
58 #endif /* SMP || KLD_MODULE */
64 #define ALIGNBYTES _ALIGNBYTES
65 #define ALIGN(p) _ALIGN(p)
67 * ALIGNED_POINTER is a boolean macro that checks whether an address
68 * is valid to fetch data elements of type t from on this architecture.
69 * This does not reflect the optimal alignment, just the possibility
70 * (within reasonable limits).
72 #define ALIGNED_POINTER(p, t) ((((u_long)(p)) & (sizeof(t) - 1)) == 0)
75 * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
76 * architecture. It should be used with appropriate caution.
78 #define CACHE_LINE_SHIFT 6
79 #define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
82 #define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */
83 #define PAGE_MASK (PAGE_SIZE - 1)
85 #define PAGE_SHIFT_16K 14
86 #define PAGE_SIZE_16K (1 << PAGE_SHIFT_16K)
87 #define PAGE_MASK_16K (PAGE_SIZE_16K - 1)
89 #define PAGE_SHIFT_64K 16
90 #define PAGE_SIZE_64K (1 << PAGE_SHIFT_64K)
91 #define PAGE_MASK_64K (PAGE_SIZE_64K - 1)
93 #define MAXPAGESIZES 1 /* maximum number of supported page sizes */
96 #define KSTACK_PAGES 4 /* pages of kernel stack (with pcb) */
99 #define KSTACK_GUARD_PAGES 1 /* pages of kstack guard; 0 disables */
103 * Ceiling on size of buffer cache (really only effects write queueing,
104 * the VM page cache is not effected), can be changed via
105 * the kern.maxbcache /boot/loader.conf variable.
107 #ifndef VM_BCACHE_SIZE_MAX
108 #define VM_BCACHE_SIZE_MAX (400 * 1024 * 1024)
112 * Mach derived conversion macros
114 #define round_page(x) (((unsigned long)(x) + PAGE_MASK) & ~PAGE_MASK)
115 #define trunc_page(x) ((unsigned long)(x) & ~PAGE_MASK)
117 #define atop(x) ((unsigned long)(x) >> PAGE_SHIFT)
118 #define ptoa(x) ((unsigned long)(x) << PAGE_SHIFT)
120 #define arm64_btop(x) ((unsigned long)(x) >> PAGE_SHIFT)
121 #define arm64_ptob(x) ((unsigned long)(x) << PAGE_SHIFT)
123 #define pgtok(x) ((unsigned long)(x) * (PAGE_SIZE / 1024))
125 #endif /* !_MACHINE_PARAM_H_ */