2 * Copyright (c) 2014 Andrew Turner
3 * Copyright (c) 2014-2015 The FreeBSD Foundation
6 * This software was developed by Andrew Turner under
7 * sponsorship from the FreeBSD Foundation.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #ifndef _MACHINE_PTE_H_
34 #define _MACHINE_PTE_H_
37 typedef uint64_t pd_entry_t; /* page directory entry */
38 typedef uint64_t pt_entry_t; /* page table entry */
41 /* Block and Page attributes */
42 #define ATTR_MASK_H UINT64_C(0xfff0000000000000)
43 #define ATTR_MASK_L UINT64_C(0x0000000000000fff)
44 #define ATTR_MASK (ATTR_MASK_H | ATTR_MASK_L)
45 /* Bits 58:55 are reserved for software */
46 #define ATTR_SW_UNUSED (1UL << 58)
47 #define _ATTR_SW_DBM (1UL << 57)
48 #define ATTR_SW_MANAGED (1UL << 56)
49 #define ATTR_SW_WIRED (1UL << 55)
50 #define ATTR_UXN (1UL << 54)
51 #define ATTR_PXN (1UL << 53)
52 #define ATTR_XN (ATTR_PXN | ATTR_UXN)
53 #define ATTR_CONTIGUOUS (1UL << 52)
54 #define ATTR_DBM (1UL << 51)
55 #define ATTR_nG (1 << 11)
56 #define ATTR_AF (1 << 10)
57 #define ATTR_SH(x) ((x) << 8)
58 #define ATTR_SH_MASK ATTR_SH(3)
59 #define ATTR_SH_NS 0 /* Non-shareable */
60 #define ATTR_SH_OS 2 /* Outer-shareable */
61 #define ATTR_SH_IS 3 /* Inner-shareable */
62 #define ATTR_AP_RW_BIT (1 << 7)
63 #define ATTR_AP(x) ((x) << 6)
64 #define ATTR_AP_MASK ATTR_AP(3)
65 #define ATTR_AP_RW (0 << 1)
66 #define ATTR_AP_RO (1 << 1)
67 #define ATTR_AP_USER (1 << 0)
68 #define ATTR_NS (1 << 5)
69 #define ATTR_IDX(x) ((x) << 2)
70 #define ATTR_IDX_MASK (7 << 2)
72 #define ATTR_DEFAULT (ATTR_AF | ATTR_SH(ATTR_SH_IS))
74 #define ATTR_DESCR_MASK 3
76 /* Level 0 table, 512GiB per entry */
78 #define L0_SIZE (1ul << L0_SHIFT)
79 #define L0_OFFSET (L0_SIZE - 1ul)
80 #define L0_INVAL 0x0 /* An invalid address */
81 /* 0x1 Level 0 doesn't support block translation */
82 /* 0x2 also marks an invalid address */
83 #define L0_TABLE 0x3 /* A next-level table */
85 /* Level 1 table, 1GiB per entry */
87 #define L1_SIZE (1 << L1_SHIFT)
88 #define L1_OFFSET (L1_SIZE - 1)
89 #define L1_INVAL L0_INVAL
91 #define L1_TABLE L0_TABLE
93 /* Level 2 table, 2MiB per entry */
95 #define L2_SIZE (1 << L2_SHIFT)
96 #define L2_OFFSET (L2_SIZE - 1)
97 #define L2_INVAL L1_INVAL
98 #define L2_BLOCK L1_BLOCK
99 #define L2_TABLE L1_TABLE
101 #define L2_BLOCK_MASK UINT64_C(0xffffffe00000)
103 /* Level 3 table, 4KiB per entry */
105 #define L3_SIZE (1 << L3_SHIFT)
106 #define L3_OFFSET (L3_SIZE - 1)
109 /* 0x1 is reserved */
110 /* 0x2 also marks an invalid address */
113 #define PMAP_MAPDEV_EARLY_SIZE (L2_SIZE * 8)
115 #define L0_ENTRIES_SHIFT 9
116 #define L0_ENTRIES (1 << L0_ENTRIES_SHIFT)
117 #define L0_ADDR_MASK (L0_ENTRIES - 1)
119 #define Ln_ENTRIES_SHIFT 9
120 #define Ln_ENTRIES (1 << Ln_ENTRIES_SHIFT)
121 #define Ln_ADDR_MASK (Ln_ENTRIES - 1)
122 #define Ln_TABLE_MASK ((1 << 12) - 1)
124 #define pmap_l0_index(va) (((va) >> L0_SHIFT) & L0_ADDR_MASK)
125 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
126 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
127 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
129 #endif /* !_MACHINE_PTE_H_ */