sys/arm64/intel/stratix10-soc-fpga-mgr.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause
   3  *
   4  * Copyright (c) 2019-2024 Ruslan Bukin <br@bsdpad.com>
   5  *
   6  * This software was developed by SRI International and the University of
   7  * Cambridge Computer Laboratory (Department of Computer Science and
   8  * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
   9  * DARPA SSITH research programme.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30  * SUCH DAMAGE.
  31  */
  32
  33 /*
  34  * Intel Stratix 10 FPGA Manager.
  35  *
  36  * FPGA Programming Example:
  37  *  dd if=cheri.core.rbf of=/dev/fpga_partial0 bs=512k
  38  */
  39
  40 #include <sys/param.h>
  41 #include <sys/systm.h>
  42 #include <sys/bus.h>
  43 #include <sys/kernel.h>
  44 #include <sys/module.h>
  45 #include <sys/malloc.h>
  46 #include <sys/rman.h>
  47 #include <sys/timeet.h>
  48 #include <sys/timetc.h>
  49 #include <sys/conf.h>
  50 #include <sys/uio.h>
  51 #include <sys/sx.h>
  52
  53 #include <dev/ofw/openfirm.h>
  54 #include <dev/ofw/ofw_bus.h>
  55 #include <dev/ofw/ofw_bus_subr.h>
  56
  57 #include <arm64/intel/stratix10-svc.h>
  58
  59 #include <machine/bus.h>
  60 #include <machine/cpu.h>
  61 #include <machine/intr.h>
  62
  63 #define SVC_BUF_SIZE    (512 * 1024)
  64
  65 struct fpgamgr_s10_softc {
  66         struct cdev             *mgr_cdev;
  67         struct cdev             *mgr_cdev_partial;
  68         device_t                dev;
  69         device_t                s10_svc_dev;
  70         struct s10_svc_mem      mem;
  71         struct sx               sx;
  72         int                     opened;
  73 };
  74
  75 static int
  76 fpga_open(struct cdev *dev, int flags __unused,
  77     int fmt __unused, struct thread *td __unused)
  78 {
  79         struct fpgamgr_s10_softc *sc;
  80         struct s10_svc_msg msg;
  81         int ret;
  82         int err;
  83
  84         sc = dev->si_drv1;
  85
  86         sx_xlock(&sc->sx);
  87         if (sc->opened) {
  88                 sx_xunlock(&sc->sx);
  89                 return (EBUSY);
  90         }
  91
  92         err = s10_svc_allocate_memory(sc->s10_svc_dev,
  93             &sc->mem, SVC_BUF_SIZE);
  94         if (err != 0) {
  95                 sx_xunlock(&sc->sx);
  96                 return (ENXIO);
  97         }
  98
  99         bzero(&msg, sizeof(struct s10_svc_msg));
 100         msg.command = COMMAND_RECONFIG;
 101         if (dev == sc->mgr_cdev_partial)
 102                 msg.flags |= COMMAND_RECONFIG_FLAG_PARTIAL;
 103         ret = s10_svc_send(sc->s10_svc_dev, &msg);
 104         if (ret != 0) {
 105                 sx_xunlock(&sc->sx);
 106                 return (ENXIO);
 107         }
 108
 109         sc->opened = 1;
 110         sx_xunlock(&sc->sx);
 111
 112         return (0);
 113 }
 114
 115 static int
 116 fpga_submit(struct cdev *dev)
 117 {
 118         struct fpgamgr_s10_softc *sc;
 119         struct s10_svc_msg msg;
 120         int ret;
 121
 122         sc = dev->si_drv1;
 123
 124         bzero(&msg, sizeof(struct s10_svc_msg));
 125         msg.command = COMMAND_RECONFIG_DATA_SUBMIT;
 126         msg.payload = (void *)sc->mem.paddr;
 127         msg.payload_length = sc->mem.fill;
 128         ret = s10_svc_send(sc->s10_svc_dev, &msg);
 129         if (ret != 0) {
 130                 device_printf(sc->dev, "Failed to submit data\n");
 131                 s10_svc_free_memory(sc->s10_svc_dev, &sc->mem);
 132                 sc->opened = 0;
 133                 return (ENXIO);
 134         }
 135
 136         /* Claim memory buffer back. */
 137         bzero(&msg, sizeof(struct s10_svc_msg));
 138         msg.command = COMMAND_RECONFIG_DATA_CLAIM;
 139         ret = s10_svc_send(sc->s10_svc_dev, &msg);
 140         if (ret)
 141                 device_printf(sc->dev, "Can't claim buffer back.\n");
 142
 143         return (ret);
 144 }
 145
 146 static int
 147 fpga_write(struct cdev *dev, struct uio *uio, int ioflag)
 148 {
 149         struct fpgamgr_s10_softc *sc;
 150         vm_offset_t addr;
 151         int error;
 152         int amnt;
 153         int ret;
 154
 155         sc = dev->si_drv1;
 156
 157         sx_xlock(&sc->sx);
 158         if (sc->opened == 0) {
 159                 /* Device closed. */
 160                 sx_xunlock(&sc->sx);
 161                 return (ENXIO);
 162         }
 163
 164         while (uio->uio_resid > 0) {
 165                 addr = sc->mem.vaddr + sc->mem.fill;
 166                 amnt = MIN(uio->uio_resid, (SVC_BUF_SIZE - sc->mem.fill));
 167                 error = uiomove((void *)addr, amnt, uio);
 168                 if (error) {
 169                         device_printf(sc->dev, "uiomove returned error %d\n",
 170                             error);
 171                         break;
 172                 }
 173                 sc->mem.fill += amnt;
 174                 if (sc->mem.fill == SVC_BUF_SIZE) {
 175                         ret = fpga_submit(dev);
 176                         if (ret) {
 177                                 sx_xunlock(&sc->sx);
 178                                 return (ret);
 179                         }
 180                         sc->mem.fill = 0;
 181                 }
 182         }
 183
 184         sx_xunlock(&sc->sx);
 185
 186         return (0);
 187 }
 188
 189 static int
 190 fpga_close(struct cdev *dev, int flags __unused,
 191     int fmt __unused, struct thread *td __unused)
 192 {
 193         struct fpgamgr_s10_softc *sc;
 194         int ret;
 195
 196         sc = dev->si_drv1;
 197
 198         sx_xlock(&sc->sx);
 199         if (sc->opened == 0) {
 200                 /* Device closed. */
 201                 sx_xunlock(&sc->sx);
 202                 return (ENXIO);
 203         }
 204
 205         if (sc->mem.fill > 0) {
 206                 ret = fpga_submit(dev);
 207                 if (ret) {
 208                         sx_xunlock(&sc->sx);
 209                         return (ret);
 210                 }
 211                 sc->mem.fill = 0;
 212         }
 213
 214         s10_svc_free_memory(sc->s10_svc_dev, &sc->mem);
 215         sc->opened = 0;
 216         sx_xunlock(&sc->sx);
 217
 218         return (0);
 219 }
 220
 221 static int
 222 fpga_ioctl(struct cdev *dev, u_long cmd, caddr_t addr, int flags,
 223     struct thread *td)
 224 {
 225
 226         return (0);
 227 }
 228
 229 static struct cdevsw fpga_cdevsw = {
 230         .d_version =    D_VERSION,
 231         .d_open =       fpga_open,
 232         .d_close =      fpga_close,
 233         .d_write =      fpga_write,
 234         .d_ioctl =      fpga_ioctl,
 235         .d_name =       "FPGA Manager",
 236 };
 237
 238 static int
 239 fpgamgr_s10_probe(device_t dev)
 240 {
 241
 242         if (!ofw_bus_status_okay(dev))
 243                 return (ENXIO);
 244
 245         if (!ofw_bus_is_compatible(dev, "intel,stratix10-soc-fpga-mgr"))
 246                 return (ENXIO);
 247
 248         device_set_desc(dev, "Stratix 10 SOC FPGA Manager");
 249
 250         return (BUS_PROBE_DEFAULT);
 251 }
 252
 253 static int
 254 fpgamgr_s10_attach(device_t dev)
 255 {
 256         struct fpgamgr_s10_softc *sc;
 257         devclass_t dc;
 258
 259         sc = device_get_softc(dev);
 260         sc->dev = dev;
 261
 262         dc = devclass_find("s10_svc");
 263         if (dc == NULL)
 264                 return (ENXIO);
 265
 266         sc->s10_svc_dev = devclass_get_device(dc, 0);
 267         if (sc->s10_svc_dev == NULL)
 268                 return (ENXIO);
 269
 270         sc->mgr_cdev = make_dev(&fpga_cdevsw, 0, UID_ROOT, GID_WHEEL,
 271             0600, "fpga%d", device_get_unit(sc->dev));
 272         if (sc->mgr_cdev == NULL) {
 273                 device_printf(dev, "Failed to create character device.\n");
 274                 return (ENXIO);
 275         }
 276
 277         sc->mgr_cdev_partial = make_dev(&fpga_cdevsw, 0, UID_ROOT, GID_WHEEL,
 278             0600, "fpga_partial%d", device_get_unit(sc->dev));
 279         if (sc->mgr_cdev_partial == NULL) {
 280                 device_printf(dev, "Failed to create character device.\n");
 281                 return (ENXIO);
 282         }
 283
 284         sx_init(&sc->sx, "s10 fpga");
 285
 286         sc->mgr_cdev->si_drv1 = sc;
 287         sc->mgr_cdev_partial->si_drv1 = sc;
 288
 289         return (0);
 290 }
 291
 292 static int
 293 fpgamgr_s10_detach(device_t dev)
 294 {
 295         struct fpgamgr_s10_softc *sc;
 296
 297         sc = device_get_softc(dev);
 298
 299         destroy_dev(sc->mgr_cdev);
 300         destroy_dev(sc->mgr_cdev_partial);
 301
 302         sx_destroy(&sc->sx);
 303
 304         return (0);
 305 }
 306
 307 static device_method_t fpgamgr_s10_methods[] = {
 308         DEVMETHOD(device_probe,         fpgamgr_s10_probe),
 309         DEVMETHOD(device_attach,        fpgamgr_s10_attach),
 310         DEVMETHOD(device_detach,        fpgamgr_s10_detach),
 311         { 0, 0 }
 312 };
 313
 314 static driver_t fpgamgr_s10_driver = {
 315         "fpgamgr_s10",
 316         fpgamgr_s10_methods,
 317         sizeof(struct fpgamgr_s10_softc),
 318 };
 319
 320 DRIVER_MODULE(fpgamgr_s10, simplebus, fpgamgr_s10_driver, 0, 0);