2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com>
6 * This software was developed by SRI International and the University of
7 * Cambridge Computer Laboratory (Department of Computer Science and
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
9 * DARPA SSITH research programme.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * Intel Stratix 10 Service Layer
37 #include <sys/cdefs.h>
38 #include <sys/param.h>
39 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/module.h>
43 #include <sys/malloc.h>
45 #include <sys/timeet.h>
46 #include <sys/timetc.h>
54 #include <dev/fdt/simplebus.h>
55 #include <dev/ofw/openfirm.h>
56 #include <dev/ofw/ofw_bus.h>
57 #include <dev/ofw/ofw_bus_subr.h>
59 #include <arm64/intel/intel-smc.h>
60 #include <arm64/intel/stratix10-svc.h>
62 #include <machine/bus.h>
63 #include <machine/cpu.h>
64 #include <machine/intr.h>
66 struct s10_svc_softc {
69 intel_smc_callfn_t callfn;
73 s10_data_claim(struct s10_svc_softc *sc)
75 struct arm_smccc_res res;
76 register_t a0, a1, a2;
82 a0 = INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE;
86 ret = sc->callfn(a0, a1, a2, 0, 0, 0, 0, 0, &res);
87 if (ret == INTEL_SIP_SMC_FPGA_CONFIG_STATUS_BUSY)
97 s10_svc_send(device_t dev, struct s10_svc_msg *msg)
99 struct s10_svc_softc *sc;
100 struct arm_smccc_res res;
101 register_t a0, a1, a2;
104 sc = device_get_softc(dev);
110 switch (msg->command) {
111 case COMMAND_RECONFIG:
112 a0 = INTEL_SIP_SMC_FPGA_CONFIG_START;
115 case COMMAND_RECONFIG_DATA_SUBMIT:
116 a0 = INTEL_SIP_SMC_FPGA_CONFIG_WRITE;
117 a1 = (uint64_t)msg->payload;
118 a2 = (uint64_t)msg->payload_length;
120 case COMMAND_RECONFIG_DATA_CLAIM:
121 ret = s10_data_claim(sc);
127 ret = sc->callfn(a0, a1, a2, 0, 0, 0, 0, 0, &res);
133 s10_svc_allocate_memory(device_t dev, struct s10_svc_mem *mem, int size)
135 struct s10_svc_softc *sc;
137 sc = device_get_softc(dev);
142 if (vmem_alloc(sc->vmem, size,
143 M_FIRSTFIT | M_NOWAIT, &mem->paddr)) {
144 device_printf(dev, "Can't allocate memory\n");
150 mem->vaddr = (vm_offset_t)pmap_mapdev(mem->paddr, mem->size);
156 s10_svc_free_memory(device_t dev, struct s10_svc_mem *mem)
158 struct s10_svc_softc *sc;
160 sc = device_get_softc(dev);
162 vmem_free(sc->vmem, mem->paddr, mem->size);
166 s10_get_memory(struct s10_svc_softc *sc)
168 struct arm_smccc_res res;
173 sc->callfn(INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM,
174 0, 0, 0, 0, 0, 0, 0, &res);
175 if (res.a0 != INTEL_SIP_SMC_STATUS_OK)
178 vmem = vmem_create("stratix10 vmem", 0, 0, PAGE_SIZE,
179 PAGE_SIZE, M_BESTFIT | M_WAITOK);
186 device_printf(sc->dev, "Shared memory address 0x%lx size 0x%lx\n",
189 vmem_add(vmem, addr, size, 0);
196 static intel_smc_callfn_t
197 s10_svc_get_callfn(struct s10_svc_softc *sc, phandle_t node)
201 if ((OF_getprop(node, "method", method, sizeof(method))) > 0) {
202 if (strcmp(method, "hvc") == 0)
203 return (arm_smccc_hvc);
204 else if (strcmp(method, "smc") == 0)
205 return (arm_smccc_smc);
207 device_printf(sc->dev,
208 "Invalid method \"%s\"\n", method);
210 device_printf(sc->dev, "SMC method not provided\n");
216 s10_svc_probe(device_t dev)
219 if (!ofw_bus_status_okay(dev))
222 if (!ofw_bus_is_compatible(dev, "intel,stratix10-svc"))
225 device_set_desc(dev, "Stratix 10 SVC");
227 return (BUS_PROBE_DEFAULT);
231 s10_svc_attach(device_t dev)
233 struct s10_svc_softc *sc;
236 node = ofw_bus_get_node(dev);
238 sc = device_get_softc(dev);
241 if (device_get_unit(dev) != 0)
244 sc->callfn = s10_svc_get_callfn(sc, node);
245 if (sc->callfn == NULL)
248 if (s10_get_memory(sc) != 0)
254 static device_method_t s10_svc_methods[] = {
255 DEVMETHOD(device_probe, s10_svc_probe),
256 DEVMETHOD(device_attach, s10_svc_attach),
260 static driver_t s10_svc_driver = {
263 sizeof(struct s10_svc_softc),
266 EARLY_DRIVER_MODULE(s10_svc, simplebus, s10_svc_driver, 0, 0,
267 BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);