2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2020 Ruslan Bukin <br@bsdpad.com>
6 * This software was developed by SRI International and the University of
7 * Cambridge Computer Laboratory (Department of Computer Science and
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
9 * DARPA SSITH research programme.
11 * Portions of this work was supported by Innovate UK project 105694,
12 * "Digital Security by Design (DSbD) Technology Platform Prototype".
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 #include "opt_platform.h"
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD$");
41 #include <sys/param.h>
43 #include <sys/kernel.h>
44 #include <sys/malloc.h>
45 #include <sys/memdesc.h>
47 #include <sys/taskqueue.h>
49 #include <sys/mutex.h>
50 #include <sys/sysctl.h>
53 #include <dev/pci/pcireg.h>
54 #include <dev/pci/pcivar.h>
55 #include <machine/bus.h>
56 #include <dev/iommu/busdma_iommu.h>
57 #include <machine/vmparam.h>
62 static MALLOC_DEFINE(M_IOMMU, "IOMMU", "IOMMU framework");
64 #define IOMMU_LIST_LOCK() mtx_lock(&iommu_mtx)
65 #define IOMMU_LIST_UNLOCK() mtx_unlock(&iommu_mtx)
66 #define IOMMU_LIST_ASSERT_LOCKED() mtx_assert(&iommu_mtx, MA_OWNED)
68 #define dprintf(fmt, ...)
70 static struct mtx iommu_mtx;
73 struct iommu_unit *iommu;
74 LIST_ENTRY(iommu_entry) next;
76 static LIST_HEAD(, iommu_entry) iommu_list = LIST_HEAD_INITIALIZER(iommu_list);
79 iommu_domain_unmap_buf(struct iommu_domain *iodom, iommu_gaddr_t base,
80 iommu_gaddr_t size, int flags)
82 struct iommu_unit *iommu;
87 error = IOMMU_UNMAP(iommu->dev, iodom, base, size);
93 iommu_domain_map_buf(struct iommu_domain *iodom, iommu_gaddr_t base,
94 iommu_gaddr_t size, vm_page_t *ma, uint64_t eflags, int flags)
96 struct iommu_unit *iommu;
101 dprintf("%s: base %lx, size %lx\n", __func__, base, size);
104 if (eflags & IOMMU_MAP_ENTRY_READ)
105 prot |= VM_PROT_READ;
106 if (eflags & IOMMU_MAP_ENTRY_WRITE)
107 prot |= VM_PROT_WRITE;
111 iommu = iodom->iommu;
113 error = IOMMU_MAP(iommu->dev, iodom, va, ma, size, prot);
118 static const struct iommu_domain_map_ops domain_map_ops = {
119 .map = iommu_domain_map_buf,
120 .unmap = iommu_domain_unmap_buf,
123 static struct iommu_domain *
124 iommu_domain_alloc(struct iommu_unit *iommu)
126 struct iommu_domain *iodom;
128 iodom = IOMMU_DOMAIN_ALLOC(iommu->dev, iommu);
132 iommu_domain_init(iommu, iodom, &domain_map_ops);
133 iodom->end = VM_MAXUSER_ADDRESS;
134 iodom->iommu = iommu;
135 iommu_gas_init_domain(iodom);
141 iommu_domain_free(struct iommu_domain *iodom)
143 struct iommu_unit *iommu;
145 iommu = iodom->iommu;
149 if ((iodom->flags & IOMMU_DOMAIN_GAS_INITED) != 0) {
150 IOMMU_DOMAIN_LOCK(iodom);
151 iommu_gas_fini_domain(iodom);
152 IOMMU_DOMAIN_UNLOCK(iodom);
155 iommu_domain_fini(iodom);
157 IOMMU_DOMAIN_FREE(iommu->dev, iodom);
164 iommu_tag_init(struct bus_dma_tag_iommu *t)
168 maxaddr = BUS_SPACE_MAXADDR;
170 t->common.ref_count = 0;
171 t->common.impl = &bus_dma_iommu_impl;
172 t->common.alignment = 1;
173 t->common.boundary = 0;
174 t->common.lowaddr = maxaddr;
175 t->common.highaddr = maxaddr;
176 t->common.maxsize = maxaddr;
177 t->common.nsegments = BUS_SPACE_UNRESTRICTED;
178 t->common.maxsegsz = maxaddr;
181 static struct iommu_ctx *
182 iommu_ctx_alloc(device_t dev, struct iommu_domain *iodom, bool disabled)
184 struct iommu_unit *iommu;
185 struct iommu_ctx *ioctx;
187 iommu = iodom->iommu;
189 ioctx = IOMMU_CTX_ALLOC(iommu->dev, iodom, dev, disabled);
194 * iommu can also be used for non-PCI based devices.
195 * This should be reimplemented as new newbus method with
196 * pci_get_rid() as a default for PCI device class.
198 ioctx->rid = pci_get_rid(dev);
204 iommu_get_ctx(struct iommu_unit *iommu, device_t requester,
205 uint16_t rid, bool disabled, bool rmrr)
207 struct iommu_ctx *ioctx;
208 struct iommu_domain *iodom;
209 struct bus_dma_tag_iommu *tag;
212 ioctx = IOMMU_CTX_LOOKUP(iommu->dev, requester);
220 * In our current configuration we have a domain per each ctx.
221 * So allocate a domain first.
223 iodom = iommu_domain_alloc(iommu);
227 ioctx = iommu_ctx_alloc(requester, iodom, disabled);
229 iommu_domain_free(iodom);
233 tag = ioctx->tag = malloc(sizeof(struct bus_dma_tag_iommu),
234 M_IOMMU, M_WAITOK | M_ZERO);
235 tag->owner = requester;
237 tag->ctx->domain = iodom;
241 ioctx->domain = iodom;
247 iommu_free_ctx_locked(struct iommu_unit *iommu, struct iommu_ctx *ioctx)
249 struct bus_dma_tag_iommu *tag;
251 IOMMU_ASSERT_LOCKED(iommu);
255 IOMMU_CTX_FREE(iommu->dev, ioctx);
261 iommu_free_ctx(struct iommu_ctx *ioctx)
263 struct iommu_unit *iommu;
264 struct iommu_domain *iodom;
267 iodom = ioctx->domain;
268 iommu = iodom->iommu;
271 iommu_free_ctx_locked(iommu, ioctx);
274 /* Since we have a domain per each ctx, remove the domain too. */
275 error = iommu_domain_free(iodom);
277 device_printf(iommu->dev, "Could not free a domain\n");
281 iommu_domain_free_entry(struct iommu_map_entry *entry, bool free)
283 struct iommu_domain *iodom;
285 iodom = entry->domain;
287 IOMMU_DOMAIN_LOCK(iodom);
288 iommu_gas_free_space(iodom, entry);
289 IOMMU_DOMAIN_UNLOCK(iodom);
292 iommu_gas_free_entry(iodom, entry);
298 iommu_domain_unload(struct iommu_domain *iodom,
299 struct iommu_map_entries_tailq *entries, bool cansleep)
301 struct iommu_map_entry *entry, *entry1;
304 TAILQ_FOREACH_SAFE(entry, entries, dmamap_link, entry1) {
305 KASSERT((entry->flags & IOMMU_MAP_ENTRY_MAP) != 0,
306 ("not mapped entry %p %p", iodom, entry));
307 error = iodom->ops->unmap(iodom, entry->start, entry->end -
308 entry->start, cansleep ? IOMMU_PGF_WAITOK : 0);
309 KASSERT(error == 0, ("unmap %p error %d", iodom, error));
310 TAILQ_REMOVE(entries, entry, dmamap_link);
311 iommu_domain_free_entry(entry, true);
314 if (TAILQ_EMPTY(entries))
317 panic("entries map is not empty");
321 iommu_register(struct iommu_unit *iommu)
323 struct iommu_entry *entry;
325 mtx_init(&iommu->lock, "IOMMU", NULL, MTX_DEF);
327 entry = malloc(sizeof(struct iommu_entry), M_IOMMU, M_WAITOK | M_ZERO);
328 entry->iommu = iommu;
331 LIST_INSERT_HEAD(&iommu_list, entry, next);
334 iommu_init_busdma(iommu);
340 iommu_unregister(struct iommu_unit *iommu)
342 struct iommu_entry *entry, *tmp;
345 LIST_FOREACH_SAFE(entry, &iommu_list, next, tmp) {
346 if (entry->iommu == iommu) {
347 LIST_REMOVE(entry, next);
348 free(entry, M_IOMMU);
353 iommu_fini_busdma(iommu);
355 mtx_destroy(&iommu->lock);
361 iommu_find(device_t dev, bool verbose)
363 struct iommu_entry *entry;
364 struct iommu_unit *iommu;
368 LIST_FOREACH(entry, &iommu_list, next) {
369 iommu = entry->iommu;
370 error = IOMMU_FIND(iommu->dev, dev);
373 return (entry->iommu);
382 iommu_domain_unload_entry(struct iommu_map_entry *entry, bool free)
385 dprintf("%s\n", __func__);
387 iommu_domain_free_entry(entry, free);
394 mtx_init(&iommu_mtx, "IOMMU", NULL, MTX_DEF);
397 SYSINIT(iommu, SI_SUB_DRIVERS, SI_ORDER_FIRST, iommu_init, NULL);