2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2019-2020 Ruslan Bukin <br@bsdpad.com>
6 * This software was developed by SRI International and the University of
7 * Cambridge Computer Laboratory (Department of Computer Science and
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
9 * DARPA SSITH research programme.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 #include <sys/types.h>
36 #include <sys/systm.h>
38 #include <sys/bitstring.h>
39 #include <sys/kernel.h>
42 #include <sys/taskqueue.h>
43 #include <sys/malloc.h>
44 #include <sys/module.h>
47 #include <contrib/dev/acpica/include/acpi.h>
48 #include <dev/acpica/acpivar.h>
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/iommu/iommu.h>
53 #include <arm64/iommu/iommu.h>
57 #define MEMORY_RESOURCE_SIZE 0x20000
60 struct smmu_acpi_devinfo {
61 struct resource_list di_rl;
64 struct iort_table_data {
67 ACPI_IORT_SMMU_V3 *smmu[MAX_SMMU];
72 iort_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
74 struct iort_table_data *iort_data;
78 iort_data = (struct iort_table_data *)arg;
82 case ACPI_IORT_NODE_SMMU_V3:
84 printf("SMMUv3 found, but no space available.\n");
88 if (iort_data->smmu[i] != NULL) {
90 device_printf(iort_data->parent,
91 "smmu: Already have an SMMU table");
94 node = (ACPI_IORT_NODE *)entry;
95 iort_data->smmu[i] = (ACPI_IORT_SMMU_V3 *)node->NodeData;
104 smmu_acpi_identify(driver_t *driver, device_t parent)
106 struct iort_table_data iort_data;
107 ACPI_TABLE_IORT *iort;
113 iort_pa = acpi_find_table(ACPI_SIG_IORT);
117 iort = acpi_map_table(iort_pa, ACPI_SIG_IORT);
119 device_printf(parent, "smmu: Unable to map the IORT\n");
123 iort_data.parent = parent;
124 for (i = 0; i < MAX_SMMU; i++)
125 iort_data.smmu[i] = NULL;
128 acpi_walk_subtables(iort + 1, (char *)iort + iort->Header.Length,
129 iort_handler, &iort_data);
130 if (iort_data.count == 0) {
131 device_printf(parent, "No SMMU found.\n");
135 for (i = 0; i < iort_data.count; i++) {
136 dev = BUS_ADD_CHILD(parent,
137 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE, "smmu", -1);
139 device_printf(parent, "add smmu child failed\n");
143 /* Add the IORT data */
144 BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 0,
145 iort_data.smmu[i]->EventGsiv, 1);
146 BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 1,
147 iort_data.smmu[i]->PriGsiv, 1);
148 BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 2,
149 iort_data.smmu[i]->SyncGsiv, 1);
150 BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 3,
151 iort_data.smmu[i]->GerrGsiv, 1);
152 BUS_SET_RESOURCE(parent, dev, SYS_RES_MEMORY, 0,
153 iort_data.smmu[i]->BaseAddress, MEMORY_RESOURCE_SIZE);
155 priv = iort_data.smmu[i]->Flags;
157 priv |= iort_data.smmu[i]->Model;
159 acpi_set_private(dev, (void *)priv);
165 acpi_unmap_table(iort);
169 smmu_acpi_probe(device_t dev)
172 switch((uintptr_t)acpi_get_private(dev) & 0xffffffff) {
173 case ACPI_IORT_SMMU_V3_GENERIC:
180 device_set_desc(dev, SMMU_DEVSTR);
182 return (BUS_PROBE_NOWILDCARD);
186 smmu_acpi_attach(device_t dev)
188 struct smmu_softc *sc;
189 struct smmu_unit *unit;
190 struct iommu_unit *iommu;
195 sc = device_get_softc(dev);
198 priv = (uintptr_t)acpi_get_private(dev);
199 if ((priv >> 32) & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE)
200 sc->features |= SMMU_FEATURE_COHERENCY;
203 device_printf(sc->dev, "%s: features %x\n",
204 __func__, sc->features);
207 sc->res[0] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
209 if (sc->res[0] == NULL) {
210 device_printf(dev, "Can't allocate memory resource.\n");
216 * Interrupt lines are "eventq", "priq", "cmdq-sync", "gerror".
220 sc->res[1] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
221 if (sc->res[1] == NULL) {
222 device_printf(dev, "Can't allocate eventq IRQ resource.\n");
228 sc->res[3] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
229 if (sc->res[3] == NULL) {
230 device_printf(dev, "Can't allocate cmdq-sync IRQ resource.\n");
236 sc->res[4] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
237 if (sc->res[4] == NULL) {
238 device_printf(dev, "Can't allocate gerror IRQ resource.\n");
243 err = smmu_attach(dev);
250 iommu = &unit->iommu;
253 LIST_INIT(&unit->domain_list);
255 /* Use memory start address as an xref. */
256 sc->xref = bus_get_resource_start(dev, SYS_RES_MEMORY, 0);
258 err = iommu_register(iommu);
260 device_printf(dev, "Failed to register SMMU.\n");
269 "Failed to attach. Error %d\n", err);
271 /* Failure so free resources. */
277 static device_method_t smmu_acpi_methods[] = {
278 /* Device interface */
279 DEVMETHOD(device_identify, smmu_acpi_identify),
280 DEVMETHOD(device_probe, smmu_acpi_probe),
281 DEVMETHOD(device_attach, smmu_acpi_attach),
287 DEFINE_CLASS_1(smmu, smmu_acpi_driver, smmu_acpi_methods,
288 sizeof(struct smmu_softc), smmu_driver);
290 EARLY_DRIVER_MODULE(smmu, acpi, smmu_acpi_driver, 0, 0,
291 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);