2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2020 Alstom Group.
5 * Copyright (c) 2020 Semihalf.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
35 #include <sys/endian.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/mutex.h>
41 #include <dev/gpio/gpiobusvar.h>
42 #include <dev/ofw/ofw_bus.h>
43 #include <machine/bus.h>
58 #define DEFAULT_CAPS \
59 (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
60 GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL)
61 #define GPIO(n) (1 << (31 - (n)))
65 struct resource *mem_res;
68 /* software context */
73 struct gpio_pin setup[PIN_COUNT];
77 #define QORIQ_GPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->mutex)
78 #define QORIQ_GPIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mutex)
79 #define QORIQ_GPIO_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->mutex, MA_OWNED)
83 static int qoriq_make_gpio_res(device_t, struct gpio_res*);
84 static uint32_t qoriq_gpio_reg_read(device_t, uint32_t);
85 static void qoriq_gpio_reg_write(device_t, uint32_t, uint32_t);
86 static void qoriq_gpio_reg_set(device_t, uint32_t, uint32_t);
87 static void qoriq_gpio_reg_clear(device_t, uint32_t, uint32_t);
88 static void qoriq_gpio_out_en(device_t, uint32_t, uint8_t);
89 static void qoriq_gpio_value_set(device_t, uint32_t, uint8_t);
90 static uint32_t qoriq_gpio_value_get(device_t, uint32_t);
91 static void qoriq_gpio_open_drain_set(device_t, uint32_t, uint8_t);
92 static int qoriq_gpio_configure(device_t, uint32_t, uint32_t);
95 static int qoriq_gpio_probe(device_t);
96 static int qoriq_gpio_attach(device_t);
97 static device_t qoriq_gpio_get_bus(device_t);
98 static int qoriq_gpio_pin_max(device_t, int*);
99 static int qoriq_gpio_pin_getname(device_t, uint32_t, char*);
100 static int qoriq_gpio_pin_getflags(device_t, uint32_t, uint32_t*);
101 static int qoriq_gpio_pin_setflags(device_t, uint32_t, uint32_t);
102 static int qoriq_gpio_pin_getcaps(device_t, uint32_t, uint32_t*);
103 static int qoriq_gpio_pin_get(device_t, uint32_t, uint32_t*);
104 static int qoriq_gpio_pin_set(device_t, uint32_t, uint32_t);
105 static int qoriq_gpio_pin_toggle(device_t, uint32_t);
106 static int qoriq_gpio_map_gpios(device_t, phandle_t, phandle_t,
107 int, pcell_t*, uint32_t*, uint32_t*);
108 static int qoriq_gpio_pin_access_32(device_t, uint32_t, uint32_t, uint32_t,
110 static int qoriq_gpio_pin_config_32(device_t, uint32_t, uint32_t, uint32_t*);
113 static device_method_t qoriq_gpio_methods[] = {
114 DEVMETHOD(device_probe, qoriq_gpio_probe),
115 DEVMETHOD(device_attach, qoriq_gpio_attach),
118 DEVMETHOD(gpio_get_bus, qoriq_gpio_get_bus),
119 DEVMETHOD(gpio_pin_max, qoriq_gpio_pin_max),
120 DEVMETHOD(gpio_pin_getname, qoriq_gpio_pin_getname),
121 DEVMETHOD(gpio_pin_getflags, qoriq_gpio_pin_getflags),
122 DEVMETHOD(gpio_pin_setflags, qoriq_gpio_pin_setflags),
123 DEVMETHOD(gpio_pin_getcaps, qoriq_gpio_pin_getcaps),
124 DEVMETHOD(gpio_pin_get, qoriq_gpio_pin_get),
125 DEVMETHOD(gpio_pin_set, qoriq_gpio_pin_set),
126 DEVMETHOD(gpio_pin_toggle, qoriq_gpio_pin_toggle),
127 DEVMETHOD(gpio_map_gpios, qoriq_gpio_map_gpios),
128 DEVMETHOD(gpio_pin_access_32, qoriq_gpio_pin_access_32),
129 DEVMETHOD(gpio_pin_config_32, qoriq_gpio_pin_config_32),
134 static driver_t gpio_driver = {
137 sizeof(struct gpio_softc),
140 static devclass_t gpio_devclass;
142 DRIVER_MODULE(gpio, simplebus, gpio_driver, gpio_devclass, 0, 0);
143 MODULE_VERSION(gpio, 1);
149 qoriq_make_gpio_res(device_t dev, struct gpio_res *out)
152 out->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
153 &out->mem_rid, RF_ACTIVE | RF_SHAREABLE);
155 if(out->mem_res == NULL) {
163 qoriq_gpio_reg_read(device_t dev, uint32_t reg)
165 struct gpio_softc *sc = device_get_softc(dev);
168 QORIQ_GPIO_ASSERT_LOCKED(sc);
169 result = bus_read_4(sc->res.mem_res, reg);
170 return be32toh(result);
174 qoriq_gpio_reg_write(device_t dev, uint32_t reg, uint32_t val)
176 struct gpio_softc *sc = device_get_softc(dev);
178 QORIQ_GPIO_ASSERT_LOCKED(sc);
181 bus_write_4(sc->res.mem_res, reg, val);
182 bus_barrier(sc->res.mem_res, reg, 4, BUS_SPACE_BARRIER_READ
183 | BUS_SPACE_BARRIER_WRITE);
187 qoriq_gpio_reg_set(device_t dev, uint32_t reg, uint32_t pin)
191 reg_val = qoriq_gpio_reg_read(dev, reg);
192 reg_val |= GPIO(pin);
193 qoriq_gpio_reg_write(dev, reg, reg_val);
197 qoriq_gpio_reg_clear(device_t dev, uint32_t reg, uint32_t pin)
201 reg_val = qoriq_gpio_reg_read(dev, reg);
202 reg_val &= ~(GPIO(pin));
203 qoriq_gpio_reg_write(dev, reg, reg_val);
207 qoriq_gpio_out_en(device_t dev, uint32_t pin, uint8_t enable)
210 if (pin >= PIN_COUNT)
214 qoriq_gpio_reg_set(dev, DIRECTION, pin);
216 qoriq_gpio_reg_clear(dev, DIRECTION, pin);
221 qoriq_gpio_value_set(device_t dev, uint32_t pin, uint8_t val)
224 if (pin >= PIN_COUNT)
228 qoriq_gpio_reg_set(dev, DATA, pin);
230 qoriq_gpio_reg_clear(dev, DATA, pin);
235 qoriq_gpio_value_get(device_t dev, uint32_t pin)
239 if (pin >= PIN_COUNT)
242 reg_val = qoriq_gpio_reg_read(dev, DATA);
243 return ((reg_val & GPIO(pin)) == 0 ? 0 : 1);
247 qoriq_gpio_open_drain_set(device_t dev, uint32_t pin, uint8_t val)
250 if (pin >= PIN_COUNT) {
255 qoriq_gpio_reg_set(dev, OPEN_DRAIN, pin);
257 qoriq_gpio_reg_clear(dev, OPEN_DRAIN, pin);
262 qoriq_gpio_configure(device_t dev, uint32_t pin, uint32_t flags)
264 struct gpio_softc *sc = device_get_softc(dev);
267 if (pin >= PIN_COUNT) {
272 * Pin cannot function as input and output at the same time.
273 * The same applies to open-drain and push-pull functionality.
275 if (((flags & GPIO_PIN_INPUT) && (flags & GPIO_PIN_OUTPUT))
276 || ((flags & GPIO_PIN_OPENDRAIN) && (flags & GPIO_PIN_PUSHPULL))) {
280 QORIQ_GPIO_ASSERT_LOCKED(sc);
282 if (flags & GPIO_PIN_INPUT) {
283 newflags = GPIO_PIN_INPUT;
284 qoriq_gpio_out_en(dev, pin, 0);
287 if (flags & GPIO_PIN_OUTPUT) {
288 newflags = GPIO_PIN_OUTPUT;
289 qoriq_gpio_out_en(dev, pin, 1);
291 if (flags & GPIO_PIN_OPENDRAIN) {
292 newflags |= GPIO_PIN_OPENDRAIN;
293 qoriq_gpio_open_drain_set(dev, pin, 1);
295 newflags |= GPIO_PIN_PUSHPULL;
296 qoriq_gpio_open_drain_set(dev, pin, 0);
300 sc->setup[pin].gp_flags = newflags;
307 qoriq_gpio_probe(device_t dev)
310 if (!ofw_bus_status_okay(dev)) {
314 if (!ofw_bus_is_compatible(dev, "fsl,qoriq-gpio")) {
318 device_set_desc(dev, "Integrated GPIO Controller");
323 qoriq_gpio_attach(device_t dev)
325 struct gpio_softc *sc = device_get_softc(dev);
328 if(qoriq_make_gpio_res(dev, &sc->res) != 0) {
332 for(i = 0; i < PIN_COUNT; i++) {
333 sc->setup[i].gp_caps = DEFAULT_CAPS;
338 sc->busdev = gpiobus_attach_bus(dev);
339 if(sc->busdev == NULL) {
347 qoriq_gpio_get_bus(device_t dev)
349 struct gpio_softc *softc = device_get_softc(dev);
351 return (softc->busdev);
355 qoriq_gpio_pin_max(device_t dev, int *maxpin)
362 *maxpin = PIN_COUNT - 1;
367 qoriq_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
370 if(name == NULL || pin >= PIN_COUNT) {
374 snprintf(name, GPIOMAXNAME, "pin %d", pin);
380 qoriq_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *pflags)
382 struct gpio_softc *sc = device_get_softc(dev);
384 if (pflags == NULL || pin >= PIN_COUNT) {
389 *pflags = sc->setup[pin].gp_flags;
390 QORIQ_GPIO_UNLOCK(sc);
396 qoriq_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
398 struct gpio_softc *sc = device_get_softc(dev);
401 if (pin >= PIN_COUNT)
404 /* Check for unwanted flags. */
406 if ((flags & sc->setup[pin].gp_caps) != flags) {
407 QORIQ_GPIO_UNLOCK(sc);
411 ret = qoriq_gpio_configure(dev, pin, flags);
413 QORIQ_GPIO_UNLOCK(sc);
418 qoriq_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
420 struct gpio_softc *sc = device_get_softc(dev);
422 if (caps == NULL || pin >= PIN_COUNT) {
427 *caps = sc->setup[pin].gp_caps;
428 QORIQ_GPIO_UNLOCK(sc);
434 qoriq_gpio_pin_get(device_t dev, uint32_t pin, uint32_t *value)
436 struct gpio_softc *sc = device_get_softc(dev);
438 if (value == NULL || pin >= PIN_COUNT) {
443 *value = qoriq_gpio_value_get(dev, pin);
444 QORIQ_GPIO_UNLOCK(sc);
449 qoriq_gpio_pin_set(device_t dev, uint32_t pin, uint32_t value)
451 struct gpio_softc *sc = device_get_softc(dev);
453 if (pin >= PIN_COUNT) {
458 qoriq_gpio_value_set(dev, pin, value);
459 QORIQ_GPIO_UNLOCK(sc);
464 qoriq_gpio_pin_toggle(device_t dev, uint32_t pin)
466 struct gpio_softc *sc;
469 if (pin >= PIN_COUNT) {
473 sc = device_get_softc(dev);
476 value = qoriq_gpio_reg_read(dev, DATA);
477 if (value & (1 << pin))
478 value &= ~(1 << pin);
481 qoriq_gpio_reg_write(dev, DATA, value);
482 QORIQ_GPIO_UNLOCK(sc);
488 qoriq_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells,
489 pcell_t *gpios, uint32_t *pin, uint32_t *flags)
491 struct gpio_softc *sc = device_get_softc(bus);
494 if (gpios[0] >= PIN_COUNT)
498 err = qoriq_gpio_configure(bus, gpios[0], gpios[1]);
499 QORIQ_GPIO_UNLOCK(sc);
510 qoriq_gpio_pin_access_32(device_t dev, uint32_t first_pin, uint32_t clear_pins,
511 uint32_t change_pins, uint32_t *orig_pins)
513 struct gpio_softc *sc;
516 sc = device_get_softc(dev);
522 hwstate = qoriq_gpio_reg_read(dev, DATA);
523 qoriq_gpio_reg_write(dev, DATA, (hwstate & ~clear_pins) ^ change_pins);
524 QORIQ_GPIO_UNLOCK(sc);
526 if (orig_pins != NULL)
527 *orig_pins = hwstate;
533 qoriq_gpio_pin_config_32(device_t dev, uint32_t first_pin, uint32_t num_pins,
536 uint32_t dir, odr, mask, reg;
537 struct gpio_softc *sc;
538 uint32_t newflags[32];
541 if (first_pin != 0 || num_pins > PIN_COUNT)
544 sc = device_get_softc(dev);
550 for (i = 0; i < num_pins; i++) {
554 if (pin_flags[i] & GPIO_PIN_INPUT) {
555 newflags[i] = GPIO_PIN_INPUT;
558 newflags[i] = GPIO_PIN_OUTPUT;
561 if (pin_flags[i] & GPIO_PIN_OPENDRAIN) {
562 newflags[i] |= GPIO_PIN_OPENDRAIN;
565 newflags[i] |= GPIO_PIN_PUSHPULL;
572 reg = qoriq_gpio_reg_read(dev, DIRECTION);
575 qoriq_gpio_reg_write(dev, DIRECTION, reg);
576 reg = qoriq_gpio_reg_read(dev, OPEN_DRAIN);
579 qoriq_gpio_reg_write(dev, OPEN_DRAIN, reg);
580 for (i = 0; i < num_pins; i++) {
581 sc->setup[i].gp_flags = newflags[i];
583 QORIQ_GPIO_UNLOCK(sc);