2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
38 #include <dev/extres/clk/clk.h>
40 #include <arm64/rockchip/clk/rk_clk_armclk.h>
42 #include "clkdev_if.h"
44 struct rk_clk_armclk_sc {
45 uint32_t muxdiv_offset;
62 struct rk_clk_armclk_rates *rates;
66 #define WRITE4(_clk, off, val) \
67 CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
68 #define READ4(_clk, off, val) \
69 CLKDEV_READ_4(clknode_get_device(_clk), off, val)
70 #define DEVICE_LOCK(_clk) \
71 CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
72 #define DEVICE_UNLOCK(_clk) \
73 CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
75 #define RK_ARMCLK_WRITE_MASK 0xFFFF0000
78 rk_clk_armclk_init(struct clknode *clk, device_t dev)
80 struct rk_clk_armclk_sc *sc;
83 sc = clknode_get_softc(clk);
87 READ4(clk, sc->muxdiv_offset, &val);
90 idx = (val & sc->mux_mask) >> sc->mux_shift;
92 clknode_init_parent_idx(clk, idx);
98 rk_clk_armclk_set_mux(struct clknode *clk, int index)
100 struct rk_clk_armclk_sc *sc;
103 sc = clknode_get_softc(clk);
106 READ4(clk, sc->muxdiv_offset, &val);
107 val &= ~(sc->mux_mask >> sc->mux_shift);
108 val |= index << sc->mux_shift | RK_ARMCLK_WRITE_MASK;
109 WRITE4(clk, sc->muxdiv_offset, val);
116 rk_clk_armclk_recalc(struct clknode *clk, uint64_t *freq)
118 struct rk_clk_armclk_sc *sc;
121 sc = clknode_get_softc(clk);
125 READ4(clk, sc->muxdiv_offset, ®);
129 div = ((reg & sc->div_mask) >> sc->div_shift) + 1;
137 rk_clk_armclk_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
138 int flags, int *stop)
140 struct rk_clk_armclk_sc *sc;
141 struct clknode *p_main;
142 const char **p_names;
143 uint64_t best = 0, best_p = 0;
144 uint32_t div = 0, val;
145 int err, i, rate = 0;
147 sc = clknode_get_softc(clk);
149 p_names = clknode_get_parent_names(clk);
150 p_main = clknode_find_by_name(p_names[sc->main_parent]);
151 clknode_set_parent_by_idx(clk, sc->main_parent);
153 for (i = 0; i < sc->nrates; i++) {
154 if (sc->rates[i].freq == *fout) {
155 best = sc->rates[i].freq;
156 div = sc->rates[i].div;
163 if (rate == sc->nrates)
166 if ((flags & CLK_SET_DRYRUN) != 0) {
172 err = clknode_set_freq(p_main, best_p, 0, 1);
174 printf("Cannot set %s to %lu\n",
175 clknode_get_name(p_main),
179 READ4(clk, sc->muxdiv_offset, &val);
180 val &= ~sc->div_mask;
181 val |= (div - 1) << sc->div_shift;
182 WRITE4(clk, sc->muxdiv_offset, val | RK_CLK_ARMCLK_MASK);
191 static clknode_method_t rk_clk_armclk_clknode_methods[] = {
192 /* Device interface */
193 CLKNODEMETHOD(clknode_init, rk_clk_armclk_init),
194 CLKNODEMETHOD(clknode_set_mux, rk_clk_armclk_set_mux),
195 CLKNODEMETHOD(clknode_recalc_freq, rk_clk_armclk_recalc),
196 CLKNODEMETHOD(clknode_set_freq, rk_clk_armclk_set_freq),
200 DEFINE_CLASS_1(rk_clk_armclk_clknode, rk_clk_armclk_clknode_class,
201 rk_clk_armclk_clknode_methods, sizeof(struct rk_clk_armclk_sc),
205 rk_clk_armclk_register(struct clkdom *clkdom, struct rk_clk_armclk_def *clkdef)
208 struct rk_clk_armclk_sc *sc;
210 clk = clknode_create(clkdom, &rk_clk_armclk_clknode_class,
215 sc = clknode_get_softc(clk);
217 sc->muxdiv_offset = clkdef->muxdiv_offset;
219 sc->mux_shift = clkdef->mux_shift;
220 sc->mux_width = clkdef->mux_width;
221 sc->mux_mask = ((1 << clkdef->mux_width) - 1) << sc->mux_shift;
223 sc->div_shift = clkdef->div_shift;
224 sc->div_width = clkdef->div_width;
225 sc->div_mask = ((1 << clkdef->div_width) - 1) << sc->div_shift;
227 sc->flags = clkdef->flags;
229 sc->main_parent = clkdef->main_parent;
230 sc->alt_parent = clkdef->alt_parent;
232 sc->rates = clkdef->rates;
233 sc->nrates = clkdef->nrates;
235 clknode_register(clkdom, clk);