2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
38 #include <dev/extres/clk/clk.h>
40 #include <arm64/rockchip/clk/rk_clk_armclk.h>
42 #include "clkdev_if.h"
44 struct rk_clk_armclk_sc {
45 uint32_t muxdiv_offset;
62 struct rk_clk_armclk_rates *rates;
66 #define WRITE4(_clk, off, val) \
67 CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
68 #define READ4(_clk, off, val) \
69 CLKDEV_READ_4(clknode_get_device(_clk), off, val)
70 #define DEVICE_LOCK(_clk) \
71 CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
72 #define DEVICE_UNLOCK(_clk) \
73 CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
75 #define RK_ARMCLK_WRITE_MASK_SHIFT 16
77 /* #define dprintf(format, arg...) printf("%s:(%s)" format, __func__, clknode_get_name(clk), arg) */
78 #define dprintf(format, arg...)
81 rk_clk_armclk_init(struct clknode *clk, device_t dev)
83 struct rk_clk_armclk_sc *sc;
86 sc = clknode_get_softc(clk);
90 READ4(clk, sc->muxdiv_offset, &val);
93 idx = (val & sc->mux_mask) >> sc->mux_shift;
95 clknode_init_parent_idx(clk, idx);
101 rk_clk_armclk_set_mux(struct clknode *clk, int index)
103 struct rk_clk_armclk_sc *sc;
106 sc = clknode_get_softc(clk);
108 dprintf("Set mux to %d\n", index);
110 val |= index << sc->mux_shift;
111 val |= sc->mux_mask << RK_ARMCLK_WRITE_MASK_SHIFT;
112 dprintf("Write: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, val);
113 WRITE4(clk, sc->muxdiv_offset, val);
120 rk_clk_armclk_recalc(struct clknode *clk, uint64_t *freq)
122 struct rk_clk_armclk_sc *sc;
125 sc = clknode_get_softc(clk);
129 READ4(clk, sc->muxdiv_offset, ®);
130 dprintf("Read: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, reg);
134 div = ((reg & sc->div_mask) >> sc->div_shift) + 1;
135 dprintf("parent_freq=%lu, div=%u\n", *freq, div);
143 rk_clk_armclk_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
144 int flags, int *stop)
146 struct rk_clk_armclk_sc *sc;
147 struct clknode *p_main;
148 const char **p_names;
149 uint64_t best = 0, best_p = 0;
150 uint32_t div = 0, val = 0;
151 int err, i, rate = 0;
153 sc = clknode_get_softc(clk);
155 dprintf("Finding best parent/div for target freq of %lu\n", *fout);
156 p_names = clknode_get_parent_names(clk);
157 p_main = clknode_find_by_name(p_names[sc->main_parent]);
159 for (i = 0; i < sc->nrates; i++) {
160 if (sc->rates[i].freq == *fout) {
161 best = sc->rates[i].freq;
162 div = sc->rates[i].div;
165 dprintf("Best parent %s (%d) with best freq at %lu\n",
166 clknode_get_name(p_main),
173 if (rate == sc->nrates)
176 if ((flags & CLK_SET_DRYRUN) != 0) {
182 dprintf("Changing parent (%s) freq to %lu\n", clknode_get_name(p_main), best_p);
183 err = clknode_set_freq(p_main, best_p, 0, 1);
185 printf("Cannot set %s to %lu\n",
186 clknode_get_name(p_main),
189 clknode_set_parent_by_idx(clk, sc->main_parent);
191 clknode_get_freq(p_main, &best_p);
192 dprintf("main parent freq at %lu\n", best_p);
194 val |= (div - 1) << sc->div_shift;
195 val |= sc->div_mask << RK_ARMCLK_WRITE_MASK_SHIFT;
196 dprintf("Write: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, val);
197 WRITE4(clk, sc->muxdiv_offset, val);
206 static clknode_method_t rk_clk_armclk_clknode_methods[] = {
207 /* Device interface */
208 CLKNODEMETHOD(clknode_init, rk_clk_armclk_init),
209 CLKNODEMETHOD(clknode_set_mux, rk_clk_armclk_set_mux),
210 CLKNODEMETHOD(clknode_recalc_freq, rk_clk_armclk_recalc),
211 CLKNODEMETHOD(clknode_set_freq, rk_clk_armclk_set_freq),
215 DEFINE_CLASS_1(rk_clk_armclk_clknode, rk_clk_armclk_clknode_class,
216 rk_clk_armclk_clknode_methods, sizeof(struct rk_clk_armclk_sc),
220 rk_clk_armclk_register(struct clkdom *clkdom, struct rk_clk_armclk_def *clkdef)
223 struct rk_clk_armclk_sc *sc;
225 clk = clknode_create(clkdom, &rk_clk_armclk_clknode_class,
230 sc = clknode_get_softc(clk);
232 sc->muxdiv_offset = clkdef->muxdiv_offset;
234 sc->mux_shift = clkdef->mux_shift;
235 sc->mux_width = clkdef->mux_width;
236 sc->mux_mask = ((1 << clkdef->mux_width) - 1) << sc->mux_shift;
238 sc->div_shift = clkdef->div_shift;
239 sc->div_width = clkdef->div_width;
240 sc->div_mask = ((1 << clkdef->div_width) - 1) << sc->div_shift;
242 sc->flags = clkdef->flags;
244 sc->main_parent = clkdef->main_parent;
245 sc->alt_parent = clkdef->alt_parent;
247 sc->rates = clkdef->rates;
248 sc->nrates = clkdef->nrates;
250 clknode_register(clkdom, clk);