2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
38 #include <dev/extres/clk/clk.h>
40 #include <arm64/rockchip/clk/rk_clk_composite.h>
42 #include "clkdev_if.h"
44 struct rk_clk_composite_sc {
45 uint32_t muxdiv_offset;
60 #define WRITE4(_clk, off, val) \
61 CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
62 #define READ4(_clk, off, val) \
63 CLKDEV_READ_4(clknode_get_device(_clk), off, val)
64 #define DEVICE_LOCK(_clk) \
65 CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
66 #define DEVICE_UNLOCK(_clk) \
67 CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
69 #define RK_COMPOSITE_WRITE_MASK 0xFFFF0000
72 rk_clk_composite_init(struct clknode *clk, device_t dev)
74 struct rk_clk_composite_sc *sc;
77 sc = clknode_get_softc(clk);
80 if ((sc->flags & RK_CLK_COMPOSITE_HAVE_MUX) != 0) {
82 READ4(clk, sc->muxdiv_offset, &val);
85 idx = (val & sc->mux_mask) >> sc->mux_shift;
88 clknode_init_parent_idx(clk, idx);
94 rk_clk_composite_set_gate(struct clknode *clk, bool enable)
96 struct rk_clk_composite_sc *sc;
99 sc = clknode_get_softc(clk);
101 if ((sc->flags & RK_CLK_COMPOSITE_HAVE_GATE) == 0)
105 READ4(clk, sc->gate_offset, &val);
107 val &= ~(1 << sc->gate_shift);
109 val |= 1 << sc->gate_shift;
110 WRITE4(clk, sc->gate_offset, val | RK_CLK_COMPOSITE_MASK);
117 rk_clk_composite_set_mux(struct clknode *clk, int index)
119 struct rk_clk_composite_sc *sc;
122 sc = clknode_get_softc(clk);
124 if ((sc->flags & RK_CLK_COMPOSITE_HAVE_MUX) == 0)
128 READ4(clk, sc->muxdiv_offset, &val);
129 val &= ~sc->mux_mask;
130 val |= index << sc->mux_shift;
131 WRITE4(clk, sc->muxdiv_offset, val | RK_CLK_COMPOSITE_MASK);
138 rk_clk_composite_recalc(struct clknode *clk, uint64_t *freq)
140 struct rk_clk_composite_sc *sc;
143 sc = clknode_get_softc(clk);
147 READ4(clk, sc->muxdiv_offset, ®);
151 div = ((reg & sc->div_mask) >> sc->div_shift) + 1;
159 rk_clk_composite_find_best(struct rk_clk_composite_sc *sc, uint64_t fparent,
163 uint32_t best_div, div;
165 for (best = 0, best_div = 0, div = 0;
166 div <= ((sc->div_mask >> sc->div_shift) + 1); div++) {
168 if ((freq - cur) < (freq - best)) {
179 rk_clk_composite_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
180 int flags, int *stop)
182 struct rk_clk_composite_sc *sc;
183 struct clknode *p_clk;
184 const char **p_names;
186 uint32_t div, best_div, val;
187 int p_idx, best_parent;
189 sc = clknode_get_softc(clk);
191 p_names = clknode_get_parent_names(clk);
192 for (best_div = 0, best = 0, p_idx = 0;
193 p_idx != clknode_get_parents_num(clk); p_idx++) {
194 p_clk = clknode_find_by_name(p_names[p_idx]);
195 clknode_get_freq(p_clk, &fparent);
196 div = rk_clk_composite_find_best(sc, fparent, *fout);
198 if ((*fout - cur) < (*fout - best)) {
208 if ((best < *fout) &&
209 ((flags & CLK_SET_ROUND_DOWN) == 0)) {
213 if ((best > *fout) &&
214 ((flags & CLK_SET_ROUND_UP) == 0)) {
219 if ((flags & CLK_SET_DRYRUN) != 0) {
225 p_idx = clknode_get_parent_idx(clk);
226 if (p_idx != best_parent)
227 clknode_set_parent_by_idx(clk, best_parent);
230 READ4(clk, sc->muxdiv_offset, &val);
231 val &= ~sc->div_mask;
232 val |= (best_div - 1) << sc->div_shift;
233 WRITE4(clk, sc->muxdiv_offset, val | RK_CLK_COMPOSITE_MASK);
242 static clknode_method_t rk_clk_composite_clknode_methods[] = {
243 /* Device interface */
244 CLKNODEMETHOD(clknode_init, rk_clk_composite_init),
245 CLKNODEMETHOD(clknode_set_gate, rk_clk_composite_set_gate),
246 CLKNODEMETHOD(clknode_set_mux, rk_clk_composite_set_mux),
247 CLKNODEMETHOD(clknode_recalc_freq, rk_clk_composite_recalc),
248 CLKNODEMETHOD(clknode_set_freq, rk_clk_composite_set_freq),
252 DEFINE_CLASS_1(rk_clk_composite_clknode, rk_clk_composite_clknode_class,
253 rk_clk_composite_clknode_methods, sizeof(struct rk_clk_composite_sc),
257 rk_clk_composite_register(struct clkdom *clkdom, struct rk_clk_composite_def *clkdef)
260 struct rk_clk_composite_sc *sc;
262 clk = clknode_create(clkdom, &rk_clk_composite_clknode_class,
267 sc = clknode_get_softc(clk);
269 sc->muxdiv_offset = clkdef->muxdiv_offset;
271 sc->mux_shift = clkdef->mux_shift;
272 sc->mux_width = clkdef->mux_width;
273 sc->mux_mask = ((1 << clkdef->mux_width) - 1) << sc->mux_shift;
275 sc->div_shift = clkdef->div_shift;
276 sc->div_width = clkdef->div_width;
277 sc->div_mask = ((1 << clkdef->div_width) - 1) << sc->div_shift;
279 sc->gate_offset = clkdef->gate_offset;
280 sc->gate_shift = clkdef->gate_shift;
282 sc->flags = clkdef->flags;
284 clknode_register(clkdom, clk);