2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
37 #include <machine/bus.h>
39 #include <dev/dwc/if_dwc.h>
40 #include <dev/dwc/if_dwcvar.h>
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
44 #include <dev/extres/clk/clk.h>
45 #include <dev/extres/regulator/regulator.h>
47 #include <dev/extres/syscon/syscon.h>
49 #include "syscon_if.h"
51 #include "if_dwc_if.h"
53 #define RK3328_GRF_MAC_CON0 0x0900
54 #define RK3328_GRF_MAC_CON0_TX_MASK 0x7F
55 #define RK3328_GRF_MAC_CON0_TX_SHIFT 0
56 #define RK3328_GRF_MAC_CON0_RX_MASK 0x7F
57 #define RK3328_GRF_MAC_CON0_RX_SHIFT 7
59 #define RK3328_GRF_MAC_CON1 0x0904
60 #define RK3328_GRF_MAC_CON1_RX_ENA (1 << 1)
61 #define RK3328_GRF_MAC_CON1_TX_ENA (1 << 0)
62 #define RK3328_GRF_MAC_CON2 0x0908
63 #define RK3328_GRF_MACPHY_CON0 0x0B00
64 #define RK3328_GRF_MACPHY_CON1 0x0B04
65 #define RK3328_GRF_MACPHY_CON2 0x0B08
66 #define RK3328_GRF_MACPHY_CON3 0x0B0C
67 #define RK3328_GRF_MACPHY_STATUS 0x0B10
69 static struct ofw_compat_data compat_data[] = {
70 {"rockchip,rk3288-gmac", 1},
71 {"rockchip,rk3328-gmac", 1},
72 {"rockchip,rk3399-gmac", 1},
77 rk3328_set_delays(struct syscon *grf, phandle_t node)
81 if (OF_getencprop(node, "tx_delay", &tx, sizeof(tx)) <= 0)
83 if (OF_getencprop(node, "rx_delay", &rx, sizeof(rx)) <= 0)
87 printf("setting RK3328 RX/TX delays: %d/%d\n", rx, tx);
88 tx = ((tx & RK3328_GRF_MAC_CON0_TX_MASK) <<
89 RK3328_GRF_MAC_CON0_TX_SHIFT);
90 rx = ((rx & RK3328_GRF_MAC_CON0_TX_MASK) <<
91 RK3328_GRF_MAC_CON0_RX_SHIFT);
93 SYSCON_WRITE_4(grf, RK3328_GRF_MAC_CON0, tx | rx | 0xFFFF0000);
94 SYSCON_WRITE_4(grf, RK3328_GRF_MAC_CON1, RK3328_GRF_MAC_CON1_TX_ENA | RK3328_GRF_MAC_CON1_RX_ENA |
95 ((RK3328_GRF_MAC_CON1_TX_ENA | RK3328_GRF_MAC_CON1_RX_ENA) << 16));
98 #define RK3399_GRF_SOC_CON6 0xc218
99 #define RK3399_GRF_SOC_CON6_TX_ENA (1 << 7)
100 #define RK3399_GRF_SOC_CON6_TX_MASK 0x7F
101 #define RK3399_GRF_SOC_CON6_TX_SHIFT 0
102 #define RK3399_GRF_SOC_CON6_RX_MASK 0x7F
103 #define RK3399_GRF_SOC_CON6_RX_ENA (1 << 15)
104 #define RK3399_GRF_SOC_CON6_RX_SHIFT 8
107 rk3399_set_delays(struct syscon *grf, phandle_t node)
111 if (OF_getencprop(node, "tx_delay", &tx, sizeof(tx)) <= 0)
113 if (OF_getencprop(node, "rx_delay", &rx, sizeof(rx)) <= 0)
117 printf("setting RK3399 RX/TX delays: %d/%d\n", rx, tx);
118 tx = ((tx & RK3399_GRF_SOC_CON6_TX_MASK) <<
119 RK3399_GRF_SOC_CON6_TX_SHIFT) | RK3399_GRF_SOC_CON6_TX_ENA;
120 rx = ((rx & RK3399_GRF_SOC_CON6_TX_MASK) <<
121 RK3399_GRF_SOC_CON6_RX_SHIFT) | RK3399_GRF_SOC_CON6_RX_ENA;
123 SYSCON_WRITE_4(grf, RK3399_GRF_SOC_CON6, tx | rx | 0xFFFF0000);
127 if_dwc_rk_probe(device_t dev)
130 if (!ofw_bus_status_okay(dev))
132 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
134 device_set_desc(dev, "Rockchip Gigabit Ethernet Controller");
136 return (BUS_PROBE_DEFAULT);
140 if_dwc_rk_init(device_t dev)
143 struct syscon *grf = NULL;
145 node = ofw_bus_get_node(dev);
146 if (OF_hasprop(node, "rockchip,grf") &&
147 syscon_get_by_ofw_property(dev, node,
148 "rockchip,grf", &grf) != 0) {
149 device_printf(dev, "cannot get grf driver handle\n");
153 if (ofw_bus_is_compatible(dev, "rockchip,rk3399-gmac"))
154 rk3399_set_delays(grf, node);
155 else if (ofw_bus_is_compatible(dev, "rockchip,rk3328-gmac"))
156 rk3328_set_delays(grf, node);
158 /* Mode should be set according to dtb property */
164 if_dwc_rk_mac_type(device_t dev)
167 return (DWC_GMAC_NORMAL_DESC);
171 if_dwc_rk_mii_clk(device_t dev)
174 /* Should be calculated from the clock */
175 return (GMAC_MII_CLK_150_250M_DIV102);
178 static device_method_t if_dwc_rk_methods[] = {
179 DEVMETHOD(device_probe, if_dwc_rk_probe),
181 DEVMETHOD(if_dwc_init, if_dwc_rk_init),
182 DEVMETHOD(if_dwc_mac_type, if_dwc_rk_mac_type),
183 DEVMETHOD(if_dwc_mii_clk, if_dwc_rk_mii_clk),
188 static devclass_t dwc_rk_devclass;
190 extern driver_t dwc_driver;
192 DEFINE_CLASS_1(dwc, dwc_rk_driver, if_dwc_rk_methods,
193 sizeof(struct dwc_softc), dwc_driver);
194 DRIVER_MODULE(dwc_rk, simplebus, dwc_rk_driver, dwc_rk_devclass, 0, 0);
195 MODULE_DEPEND(dwc_rk, dwc, 1, 1, 1);