2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/mutex.h>
37 #include <machine/bus.h>
39 #include <dev/ofw/ofw_bus.h>
40 #include <dev/ofw/ofw_bus_subr.h>
42 #include <dev/iicbus/iiconf.h>
43 #include <dev/iicbus/iicbus.h>
45 #include <dev/extres/clk/clk.h>
47 #include "iicbus_if.h"
50 #define RK_I2C_CON 0x00
51 #define RK_I2C_CON_EN (1 << 0)
52 #define RK_I2C_CON_MODE_SHIFT 1
53 #define RK_I2C_CON_MODE_TX 0
54 #define RK_I2C_CON_MODE_RRX 1
55 #define RK_I2C_CON_MODE_RX 2
56 #define RK_I2C_CON_MODE_RTX 3
57 #define RK_I2C_CON_MODE_MASK 0x6
58 #define RK_I2C_CON_START (1 << 3)
59 #define RK_I2C_CON_STOP (1 << 4)
60 #define RK_I2C_CON_LASTACK (1 << 5)
61 #define RK_I2C_CON_NAKSTOP (1 << 6)
62 #define RK_I2C_CON_CTRL_MASK 0xFF
64 #define RK_I2C_CLKDIV 0x04
65 #define RK_I2C_CLKDIVL_MASK 0xFFFF
66 #define RK_I2C_CLKDIVL_SHIFT 0
67 #define RK_I2C_CLKDIVH_MASK 0xFFFF0000
68 #define RK_I2C_CLKDIVH_SHIFT 16
69 #define RK_I2C_CLKDIV_MUL 8
71 #define RK_I2C_MRXADDR 0x08
72 #define RK_I2C_MRXADDR_SADDR_MASK 0xFFFFFF
73 #define RK_I2C_MRXADDR_VALID(x) (1 << (24 + x))
75 #define RK_I2C_MRXRADDR 0x0C
76 #define RK_I2C_MRXRADDR_SRADDR_MASK 0xFFFFFF
77 #define RK_I2C_MRXRADDR_VALID(x) (1 << (24 + x))
79 #define RK_I2C_MTXCNT 0x10
80 #define RK_I2C_MTXCNT_MASK 0x3F
82 #define RK_I2C_MRXCNT 0x14
83 #define RK_I2C_MRXCNT_MASK 0x3F
85 #define RK_I2C_IEN 0x18
86 #define RK_I2C_IEN_BTFIEN (1 << 0)
87 #define RK_I2C_IEN_BRFIEN (1 << 1)
88 #define RK_I2C_IEN_MBTFIEN (1 << 2)
89 #define RK_I2C_IEN_MBRFIEN (1 << 3)
90 #define RK_I2C_IEN_STARTIEN (1 << 4)
91 #define RK_I2C_IEN_STOPIEN (1 << 5)
92 #define RK_I2C_IEN_NAKRCVIEN (1 << 6)
93 #define RK_I2C_IEN_ALL (RK_I2C_IEN_MBTFIEN | RK_I2C_IEN_MBRFIEN | \
94 RK_I2C_IEN_STARTIEN | RK_I2C_IEN_STOPIEN | RK_I2C_IEN_NAKRCVIEN)
96 #define RK_I2C_IPD 0x1C
97 #define RK_I2C_IPD_BTFIPD (1 << 0)
98 #define RK_I2C_IPD_BRFIPD (1 << 1)
99 #define RK_I2C_IPD_MBTFIPD (1 << 2)
100 #define RK_I2C_IPD_MBRFIPD (1 << 3)
101 #define RK_I2C_IPD_STARTIPD (1 << 4)
102 #define RK_I2C_IPD_STOPIPD (1 << 5)
103 #define RK_I2C_IPD_NAKRCVIPD (1 << 6)
104 #define RK_I2C_IPD_ALL (RK_I2C_IPD_MBTFIPD | RK_I2C_IPD_MBRFIPD | \
105 RK_I2C_IPD_STARTIPD | RK_I2C_IPD_STOPIPD | RK_I2C_IPD_NAKRCVIPD)
107 #define RK_I2C_FNCT 0x20
108 #define RK_I2C_FNCT_MASK 0x3F
110 #define RK_I2C_TXDATA_BASE 0x100
112 #define RK_I2C_RXDATA_BASE 0x200
122 struct rk_i2c_softc {
124 struct resource *res[2];
144 static struct ofw_compat_data compat_data[] = {
145 {"rockchip,rk3288-i2c", 1},
146 {"rockchip,rk3328-i2c", 1},
147 {"rockchip,rk3399-i2c", 1},
151 static struct resource_spec rk_i2c_spec[] = {
152 { SYS_RES_MEMORY, 0, RF_ACTIVE },
153 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
157 static int rk_i2c_probe(device_t dev);
158 static int rk_i2c_attach(device_t dev);
159 static int rk_i2c_detach(device_t dev);
161 #define RK_I2C_LOCK(sc) mtx_lock(&(sc)->mtx)
162 #define RK_I2C_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
163 #define RK_I2C_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED)
164 #define RK_I2C_READ(sc, reg) bus_read_4((sc)->res[0], (reg))
165 #define RK_I2C_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
168 rk_i2c_get_clkdiv(struct rk_i2c_softc *sc, uint32_t speed)
174 err = clk_get_freq(sc->sclk, &sclk_freq);
178 clkdiv = (sclk_freq / speed / RK_I2C_CLKDIV_MUL / 2) - 1;
179 clkdiv &= RK_I2C_CLKDIVL_MASK;
181 clkdiv = clkdiv << RK_I2C_CLKDIVH_SHIFT | clkdiv;
187 rk_i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
189 struct rk_i2c_softc *sc;
193 sc = device_get_softc(dev);
195 busfreq = IICBUS_GET_FREQUENCY(sc->iicbus, speed);
197 clkdiv = rk_i2c_get_clkdiv(sc, busfreq);
201 /* Set the clock divider */
202 RK_I2C_WRITE(sc, RK_I2C_CLKDIV, clkdiv);
204 /* Disable the module */
205 RK_I2C_WRITE(sc, RK_I2C_CON, 0);
213 rk_i2c_fill_tx(struct rk_i2c_softc *sc)
219 if (sc->msg == NULL || sc->msg->len == sc->cnt)
222 len = sc->msg->len - sc->cnt;
226 for (i = 0; i < len; i++) {
228 for (j = 0; j < 4 ; j++) {
229 if (sc->cnt == sc->msg->len)
232 /* Fill the addr if needed */
233 if (sc->cnt == 0 && sc->tx_slave_addr) {
234 buf = sc->msg->slave;
235 sc->tx_slave_addr = false;
237 buf = sc->msg->buf[sc->cnt];
240 buf32 |= buf << (j * 8);
243 RK_I2C_WRITE(sc, RK_I2C_TXDATA_BASE + 4 * i, buf32);
245 if (sc->cnt == sc->msg->len)
253 rk_i2c_drain_rx(struct rk_i2c_softc *sc)
260 if (sc->msg == NULL) {
261 device_printf(sc->dev, "No current iic msg\n");
265 len = sc->msg->len - sc->cnt;
269 for (i = 0; i < len; i++) {
271 buf32 = RK_I2C_READ(sc, RK_I2C_RXDATA_BASE + (i / 4) * 4);
273 buf8 = (buf32 >> ((i % 4) * 8)) & 0xFF;
274 sc->msg->buf[sc->cnt++] = buf8;
279 rk_i2c_send_stop(struct rk_i2c_softc *sc)
283 RK_I2C_WRITE(sc, RK_I2C_IEN, RK_I2C_IEN_STOPIEN);
285 sc->state = STATE_STOP;
287 reg = RK_I2C_READ(sc, RK_I2C_CON);
288 reg |= RK_I2C_CON_STOP;
289 RK_I2C_WRITE(sc, RK_I2C_CON, reg);
293 rk_i2c_intr_locked(struct rk_i2c_softc *sc)
297 sc->ipd = RK_I2C_READ(sc, RK_I2C_IPD);
299 /* Something to handle? */
300 if ((sc->ipd & RK_I2C_IPD_ALL) == 0)
303 RK_I2C_WRITE(sc, RK_I2C_IPD, sc->ipd);
304 sc->ipd &= RK_I2C_IPD_ALL;
306 if (sc->ipd & RK_I2C_IPD_NAKRCVIPD) {
308 sc->ipd &= ~RK_I2C_IPD_NAKRCVIPD;
310 /* XXXX last byte !!!, signal error !!! */
311 sc->transfer_done = 1;
312 sc->state = STATE_IDLE;
318 /* Disable start bit */
319 reg = RK_I2C_READ(sc, RK_I2C_CON);
320 reg &= ~RK_I2C_CON_START;
321 RK_I2C_WRITE(sc, RK_I2C_CON, reg);
323 if (sc->mode == RK_I2C_CON_MODE_RRX ||
324 sc->mode == RK_I2C_CON_MODE_RX) {
325 sc->state = STATE_READ;
326 RK_I2C_WRITE(sc, RK_I2C_IEN, RK_I2C_IEN_MBRFIEN |
327 RK_I2C_IEN_NAKRCVIEN);
329 reg = RK_I2C_READ(sc, RK_I2C_CON);
330 reg |= RK_I2C_CON_LASTACK;
331 RK_I2C_WRITE(sc, RK_I2C_CON, reg);
333 RK_I2C_WRITE(sc, RK_I2C_MRXCNT, sc->msg->len);
335 sc->state = STATE_WRITE;
336 RK_I2C_WRITE(sc, RK_I2C_IEN, RK_I2C_IEN_MBTFIEN |
337 RK_I2C_IEN_NAKRCVIEN);
341 RK_I2C_WRITE(sc, RK_I2C_MTXCNT, sc->msg->len);
347 if (sc->cnt == sc->msg->len)
348 rk_i2c_send_stop(sc);
352 if (sc->cnt == sc->msg->len &&
353 !(sc->msg->flags & IIC_M_NOSTOP)) {
354 rk_i2c_send_stop(sc);
359 /* Disable stop bit */
360 reg = RK_I2C_READ(sc, RK_I2C_CON);
361 reg &= ~RK_I2C_CON_STOP;
362 RK_I2C_WRITE(sc, RK_I2C_CON, reg);
364 sc->transfer_done = 1;
365 sc->state = STATE_IDLE;
376 rk_i2c_intr(void *arg)
378 struct rk_i2c_softc *sc;
380 sc = (struct rk_i2c_softc *)arg;
383 rk_i2c_intr_locked(sc);
388 rk_i2c_start_xfer(struct rk_i2c_softc *sc, struct iic_msg *msg, boolean_t last)
393 sc->transfer_done = false;
394 sc->nak_recv = false;
395 sc->tx_slave_addr = false;
397 sc->state = STATE_IDLE;
399 sc->msg_len = sc->msg->len;
401 reg = RK_I2C_READ(sc, RK_I2C_CON) & ~RK_I2C_CON_CTRL_MASK;
402 if (!(sc->msg->flags & IIC_M_NOSTART)) {
403 /* Stadard message */
404 if (sc->mode == RK_I2C_CON_MODE_TX) {
405 sc->msg_len++; /* Take slave address in account. */
406 sc->tx_slave_addr = true;
408 sc->state = STATE_START;
409 reg |= RK_I2C_CON_START;
411 RK_I2C_WRITE(sc, RK_I2C_IEN, RK_I2C_IEN_STARTIEN);
413 /* Continuation message */
414 if (sc->mode == RK_I2C_CON_MODE_RX) {
415 sc->state = STATE_READ;
417 reg |= RK_I2C_CON_LASTACK;
419 RK_I2C_WRITE(sc, RK_I2C_MRXCNT, sc->msg->len);
420 RK_I2C_WRITE(sc, RK_I2C_IEN, RK_I2C_IEN_MBRFIEN |
421 RK_I2C_IEN_NAKRCVIEN);
423 sc->state = STATE_WRITE;
424 len = rk_i2c_fill_tx(sc);
426 RK_I2C_WRITE(sc, RK_I2C_MTXCNT, len);
428 RK_I2C_WRITE(sc, RK_I2C_IEN, RK_I2C_IEN_MBTFIEN |
429 RK_I2C_IEN_NAKRCVIEN);
432 reg |= sc->mode << RK_I2C_CON_MODE_SHIFT;
433 reg |= RK_I2C_CON_EN;
434 RK_I2C_WRITE(sc, RK_I2C_CON, reg);
438 rk_i2c_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
440 struct rk_i2c_softc *sc;
443 int i, j, timeout, err;
445 sc = device_get_softc(dev);
450 mtx_sleep(sc, &sc->mtx, 0, "i2cbuswait", 0);
453 /* Disable the module and interrupts */
454 RK_I2C_WRITE(sc, RK_I2C_CON, 0);
455 RK_I2C_WRITE(sc, RK_I2C_IEN, 0);
457 /* Clean stale interrupts */
458 RK_I2C_WRITE(sc, RK_I2C_IPD, RK_I2C_IPD_ALL);
461 for (i = 0; i < nmsgs; i++) {
462 /* Validate parameters. */
463 if (msgs == NULL || msgs[i].buf == NULL ||
469 * If next message have NOSTART flag, then they both
470 * should be same type (read/write) and same address.
473 if ((msgs[i + 1].flags & IIC_M_NOSTART) &&
474 ((msgs[i].flags & IIC_M_RD) !=
475 (msgs[i + 1].flags & IIC_M_RD) ||
476 (msgs[i].slave != msgs[i + 1].slave))) {
482 * Detect simple register read case.
483 * The first message should be IIC_M_WR | IIC_M_NOSTOP,
484 * next pure IIC_M_RD (no other flags allowed). Both
485 * messages should have same slave address.
488 if (nmsgs - i >= 2 && msgs[i].len < 4 &&
489 msgs[i].flags == (IIC_M_WR | IIC_M_NOSTOP) &&
490 msgs[i + 1].flags == IIC_M_RD &&
491 (msgs[i].slave & ~LSB) == (msgs[i + 1].slave & ~LSB)) {
492 sc->mode = RK_I2C_CON_MODE_RRX;
494 /* Write slave address */
495 reg = msgs[i].slave & ~LSB;
496 reg |= RK_I2C_MRXADDR_VALID(0);
497 RK_I2C_WRITE(sc, RK_I2C_MRXADDR, reg);
499 /* Write slave register address */
501 for (j = 0; j < msgs[i].len ; j++) {
502 reg |= (msgs[i].buf[j] & 0xff) << (j * 8);
503 reg |= RK_I2C_MRXADDR_VALID(j);
505 RK_I2C_WRITE(sc, RK_I2C_MRXRADDR, reg);
509 if (msgs[i].flags & IIC_M_RD) {
510 if (msgs[i].flags & IIC_M_NOSTART) {
511 sc->mode = RK_I2C_CON_MODE_RX;
513 sc->mode = RK_I2C_CON_MODE_RRX;
514 reg = msgs[i].slave & LSB;
515 reg |= RK_I2C_MRXADDR_VALID(0);
516 RK_I2C_WRITE(sc, RK_I2C_MRXADDR, reg);
517 RK_I2C_WRITE(sc, RK_I2C_MRXRADDR, 0);
520 sc->mode = RK_I2C_CON_MODE_TX;
524 last_msg = (i > nmsgs - 1) ||
525 !(msgs[i + 1].flags & IIC_M_NOSTART);
526 rk_i2c_start_xfer(sc, msgs + i, last_msg);
529 for(timeout = 10000; timeout > 0; timeout--) {
530 rk_i2c_intr_locked(sc);
531 if (sc->transfer_done != 0)
538 while (err == 0 && sc->transfer_done != 1) {
539 err = msleep(sc, &sc->mtx, PZERO, "rk_i2c",
545 /* Disable the module and interrupts */
546 RK_I2C_WRITE(sc, RK_I2C_CON, 0);
547 RK_I2C_WRITE(sc, RK_I2C_IEN, 0);
556 rk_i2c_probe(device_t dev)
559 if (!ofw_bus_status_okay(dev))
561 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
564 device_set_desc(dev, "RockChip I2C");
565 return (BUS_PROBE_DEFAULT);
569 rk_i2c_attach(device_t dev)
571 struct rk_i2c_softc *sc;
574 sc = device_get_softc(dev);
577 mtx_init(&sc->mtx, device_get_nameunit(dev), "rk_i2c", MTX_DEF);
579 if (bus_alloc_resources(dev, rk_i2c_spec, sc->res) != 0) {
580 device_printf(dev, "cannot allocate resources for device\n");
585 if (bus_setup_intr(dev, sc->res[1],
586 INTR_TYPE_MISC | INTR_MPSAFE, NULL, rk_i2c_intr, sc,
588 bus_release_resources(dev, rk_i2c_spec, sc->res);
589 device_printf(dev, "cannot setup interrupt handler\n");
593 clk_set_assigned(dev, ofw_bus_get_node(dev));
595 /* Activate the module clocks. */
596 error = clk_get_by_ofw_name(dev, 0, "i2c", &sc->sclk);
598 device_printf(dev, "cannot get i2c clock\n");
601 error = clk_enable(sc->sclk);
603 device_printf(dev, "cannot enable i2c clock\n");
606 /* pclk clock is optional. */
607 error = clk_get_by_ofw_name(dev, 0, "pclk", &sc->pclk);
608 if (error != 0 && error != ENOENT) {
609 device_printf(dev, "cannot get pclk clock\n");
612 if (sc->pclk != NULL) {
613 error = clk_enable(sc->pclk);
615 device_printf(dev, "cannot enable pclk clock\n");
620 sc->iicbus = device_add_child(dev, "iicbus", -1);
621 if (sc->iicbus == NULL) {
622 device_printf(dev, "cannot add iicbus child device\n");
627 bus_generic_attach(dev);
632 if (rk_i2c_detach(dev) != 0)
633 device_printf(dev, "Failed to detach\n");
638 rk_i2c_detach(device_t dev)
640 struct rk_i2c_softc *sc;
643 sc = device_get_softc(dev);
645 if ((error = bus_generic_detach(dev)) != 0)
648 if (sc->iicbus != NULL)
649 if ((error = device_delete_child(dev, sc->iicbus)) != 0)
652 if (sc->sclk != NULL)
653 clk_release(sc->sclk);
654 if (sc->pclk != NULL)
655 clk_release(sc->pclk);
657 if (sc->intrhand != NULL)
658 bus_teardown_intr(sc->dev, sc->res[1], sc->intrhand);
660 bus_release_resources(dev, rk_i2c_spec, sc->res);
662 mtx_destroy(&sc->mtx);
668 rk_i2c_get_node(device_t bus, device_t dev)
671 return ofw_bus_get_node(bus);
674 static device_method_t rk_i2c_methods[] = {
675 DEVMETHOD(device_probe, rk_i2c_probe),
676 DEVMETHOD(device_attach, rk_i2c_attach),
677 DEVMETHOD(device_detach, rk_i2c_detach),
680 DEVMETHOD(ofw_bus_get_node, rk_i2c_get_node),
682 DEVMETHOD(iicbus_callback, iicbus_null_callback),
683 DEVMETHOD(iicbus_reset, rk_i2c_reset),
684 DEVMETHOD(iicbus_transfer, rk_i2c_transfer),
689 static driver_t rk_i2c_driver = {
692 sizeof(struct rk_i2c_softc),
695 static devclass_t rk_i2c_devclass;
697 EARLY_DRIVER_MODULE(rk_i2c, simplebus, rk_i2c_driver, rk_i2c_devclass, 0, 0,
698 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
699 EARLY_DRIVER_MODULE(ofw_iicbus, rk_i2c, ofw_iicbus_driver, ofw_iicbus_devclass,
700 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
701 MODULE_DEPEND(rk_i2c, iicbus, 1, 1, 1);
702 MODULE_VERSION(rk_i2c, 1);