2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
37 #include <sys/kernel.h>
39 #include <sys/module.h>
40 #include <sys/mutex.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
45 #include <machine/intr.h>
47 #include <dev/fdt/simplebus.h>
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
52 #include <dev/fdt/fdt_pinctrl.h>
54 #include <dev/extres/syscon/syscon.h>
57 #include "syscon_if.h"
58 #include "fdt_pinctrl_if.h"
60 struct rk_pinctrl_pin_drive {
68 struct rk_pinctrl_bank {
75 struct rk_pinctrl_pin_fixup {
84 struct rk_pinctrl_gpio {
91 struct rk_pinctrl_softc;
93 struct rk_pinctrl_conf {
94 struct rk_pinctrl_bank *iomux_conf;
95 uint32_t iomux_nbanks;
96 struct rk_pinctrl_pin_fixup *pin_fixup;
98 struct rk_pinctrl_pin_drive *pin_drive;
100 struct rk_pinctrl_gpio *gpio_bank;
102 uint32_t (*get_pd_offset)(struct rk_pinctrl_softc *, uint32_t);
103 struct syscon *(*get_syscon)(struct rk_pinctrl_softc *, uint32_t);
104 int (*parse_bias)(phandle_t, int);
105 int (*resolv_bias_value)(int, int);
106 int (*get_bias_value)(int, int);
109 struct rk_pinctrl_softc {
110 struct simplebus_softc simplebus_sc;
114 struct rk_pinctrl_conf *conf;
118 #define RK_PINCTRL_LOCK(_sc) mtx_lock_spin(&(_sc)->mtx)
119 #define RK_PINCTRL_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mtx)
120 #define RK_PINCTRL_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED)
122 #define RK_IOMUX(_bank, _subbank, _offset, _nbits) \
125 .subbank = _subbank, \
130 #define RK_PINFIX(_bank, _pin, _reg, _bit, _mask) \
139 #define RK_PINDRIVE(_bank, _subbank, _offset, _value, _ma) \
142 .subbank = _subbank, \
147 #define RK_GPIO(_bank, _name) \
150 .gpio_name = _name, \
153 static struct rk_pinctrl_gpio rk3288_gpio_bank[] = {
165 static struct rk_pinctrl_bank rk3288_iomux_bank[] = {
166 /* bank sub offs nbits */
168 RK_IOMUX(0, 0, 0x0084, 2),
169 RK_IOMUX(0, 1, 0x0088, 2),
170 RK_IOMUX(0, 2, 0x008C, 2),
172 RK_IOMUX(1, 3, 0x000C, 2),
173 RK_IOMUX(2, 0, 0x0010, 2),
174 RK_IOMUX(2, 1, 0x0014, 2),
175 RK_IOMUX(2, 2, 0x0018, 2),
176 RK_IOMUX(2, 3, 0x001C, 2),
177 RK_IOMUX(3, 0, 0x0020, 2),
178 RK_IOMUX(3, 1, 0x0024, 2),
179 RK_IOMUX(3, 2, 0x0028, 2),
180 RK_IOMUX(3, 3, 0x002C, 4),
181 RK_IOMUX(4, 0, 0x0034, 4),
182 RK_IOMUX(4, 1, 0x003C, 4),
183 RK_IOMUX(4, 2, 0x0044, 2),
184 RK_IOMUX(4, 3, 0x0048, 2),
186 RK_IOMUX(5, 1, 0x0050, 2),
187 RK_IOMUX(5, 2, 0x0054, 2),
189 RK_IOMUX(6, 0, 0x005C, 2),
190 RK_IOMUX(6, 1, 0x0060, 2),
191 RK_IOMUX(6, 2, 0x0064, 2),
193 RK_IOMUX(7, 0, 0x006C, 2),
194 RK_IOMUX(7, 1, 0x0070, 2),
195 RK_IOMUX(7, 2, 0x0074, 4),
197 RK_IOMUX(8, 0, 0x0080, 2),
198 RK_IOMUX(8, 1, 0x0084, 2),
204 static struct rk_pinctrl_pin_fixup rk3288_pin_fixup[] = {
207 static struct rk_pinctrl_pin_drive rk3288_pin_drive[] = {
208 /* bank sub offs val ma */
210 RK_PINDRIVE(0, 0, 0x070, 0, 2),
211 RK_PINDRIVE(0, 0, 0x070, 1, 4),
212 RK_PINDRIVE(0, 0, 0x070, 2, 8),
213 RK_PINDRIVE(0, 0, 0x070, 3, 12),
216 RK_PINDRIVE(0, 1, 0x074, 0, 2),
217 RK_PINDRIVE(0, 1, 0x074, 1, 4),
218 RK_PINDRIVE(0, 1, 0x074, 2, 8),
219 RK_PINDRIVE(0, 1, 0x074, 3, 12),
222 RK_PINDRIVE(0, 2, 0x078, 0, 2),
223 RK_PINDRIVE(0, 2, 0x078, 1, 4),
224 RK_PINDRIVE(0, 2, 0x078, 2, 8),
225 RK_PINDRIVE(0, 2, 0x078, 3, 12),
228 RK_PINDRIVE(1, 3, 0x1CC, 0, 2),
229 RK_PINDRIVE(1, 3, 0x1CC, 1, 4),
230 RK_PINDRIVE(1, 3, 0x1CC, 2, 8),
231 RK_PINDRIVE(1, 3, 0x1CC, 3, 12),
234 RK_PINDRIVE(2, 0, 0x1D0, 0, 2),
235 RK_PINDRIVE(2, 0, 0x1D0, 1, 4),
236 RK_PINDRIVE(2, 0, 0x1D0, 2, 8),
237 RK_PINDRIVE(2, 0, 0x1D0, 3, 12),
240 RK_PINDRIVE(2, 1, 0x1D4, 0, 2),
241 RK_PINDRIVE(2, 1, 0x1D4, 1, 4),
242 RK_PINDRIVE(2, 1, 0x1D4, 2, 8),
243 RK_PINDRIVE(2, 1, 0x1D4, 3, 12),
246 RK_PINDRIVE(2, 2, 0x1D8, 0, 2),
247 RK_PINDRIVE(2, 2, 0x1D8, 1, 4),
248 RK_PINDRIVE(2, 2, 0x1D8, 2, 8),
249 RK_PINDRIVE(2, 2, 0x1D8, 3, 12),
252 RK_PINDRIVE(2, 3, 0x1DC, 0, 2),
253 RK_PINDRIVE(2, 3, 0x1DC, 1, 4),
254 RK_PINDRIVE(2, 3, 0x1DC, 2, 8),
255 RK_PINDRIVE(2, 3, 0x1DC, 3, 12),
258 RK_PINDRIVE(3, 0, 0x1E0, 0, 2),
259 RK_PINDRIVE(3, 0, 0x1E0, 1, 4),
260 RK_PINDRIVE(3, 0, 0x1E0, 2, 8),
261 RK_PINDRIVE(3, 0, 0x1E0, 3, 12),
264 RK_PINDRIVE(3, 1, 0x1E4, 0, 2),
265 RK_PINDRIVE(3, 1, 0x1E4, 1, 4),
266 RK_PINDRIVE(3, 1, 0x1E4, 2, 8),
267 RK_PINDRIVE(3, 1, 0x1E4, 3, 12),
270 RK_PINDRIVE(3, 2, 0x1E8, 0, 2),
271 RK_PINDRIVE(3, 2, 0x1E8, 1, 4),
272 RK_PINDRIVE(3, 2, 0x1E8, 2, 8),
273 RK_PINDRIVE(3, 2, 0x1E8, 3, 12),
276 RK_PINDRIVE(3, 3, 0x1EC, 0, 2),
277 RK_PINDRIVE(3, 3, 0x1EC, 1, 4),
278 RK_PINDRIVE(3, 3, 0x1EC, 2, 8),
279 RK_PINDRIVE(3, 3, 0x1EC, 3, 12),
282 RK_PINDRIVE(4, 0, 0x1F0, 0, 2),
283 RK_PINDRIVE(4, 0, 0x1F0, 1, 4),
284 RK_PINDRIVE(4, 0, 0x1F0, 2, 8),
285 RK_PINDRIVE(4, 0, 0x1F0, 3, 12),
288 RK_PINDRIVE(4, 1, 0x1F4, 0, 2),
289 RK_PINDRIVE(4, 1, 0x1F4, 1, 4),
290 RK_PINDRIVE(4, 1, 0x1F4, 2, 8),
291 RK_PINDRIVE(4, 1, 0x1F4, 3, 12),
294 RK_PINDRIVE(4, 2, 0x1F8, 0, 2),
295 RK_PINDRIVE(4, 2, 0x1F8, 1, 4),
296 RK_PINDRIVE(4, 2, 0x1F8, 2, 8),
297 RK_PINDRIVE(4, 2, 0x1F8, 3, 12),
300 RK_PINDRIVE(4, 3, 0x1FC, 0, 2),
301 RK_PINDRIVE(4, 3, 0x1FC, 1, 4),
302 RK_PINDRIVE(4, 3, 0x1FC, 2, 8),
303 RK_PINDRIVE(4, 3, 0x1FC, 3, 12),
306 RK_PINDRIVE(5, 1, 0x204, 0, 2),
307 RK_PINDRIVE(5, 1, 0x204, 1, 4),
308 RK_PINDRIVE(5, 1, 0x204, 2, 8),
309 RK_PINDRIVE(5, 1, 0x204, 3, 12),
312 RK_PINDRIVE(5, 2, 0x208, 0, 2),
313 RK_PINDRIVE(5, 2, 0x208, 1, 4),
314 RK_PINDRIVE(5, 2, 0x208, 2, 8),
315 RK_PINDRIVE(5, 2, 0x208, 3, 12),
318 RK_PINDRIVE(6, 0, 0x210, 0, 2),
319 RK_PINDRIVE(6, 0, 0x210, 1, 4),
320 RK_PINDRIVE(6, 0, 0x210, 2, 8),
321 RK_PINDRIVE(6, 0, 0x210, 3, 12),
324 RK_PINDRIVE(6, 1, 0x214, 0, 2),
325 RK_PINDRIVE(6, 1, 0x214, 1, 4),
326 RK_PINDRIVE(6, 1, 0x214, 2, 8),
327 RK_PINDRIVE(6, 1, 0x214, 3, 12),
330 RK_PINDRIVE(6, 2, 0x218, 0, 2),
331 RK_PINDRIVE(6, 2, 0x218, 1, 4),
332 RK_PINDRIVE(6, 2, 0x218, 2, 8),
333 RK_PINDRIVE(6, 2, 0x218, 3, 12),
336 RK_PINDRIVE(7, 0, 0x220, 0, 2),
337 RK_PINDRIVE(7, 0, 0x220, 1, 4),
338 RK_PINDRIVE(7, 0, 0x220, 2, 8),
339 RK_PINDRIVE(7, 0, 0x220, 3, 12),
342 RK_PINDRIVE(7, 1, 0x224, 0, 2),
343 RK_PINDRIVE(7, 1, 0x224, 1, 4),
344 RK_PINDRIVE(7, 1, 0x224, 2, 8),
345 RK_PINDRIVE(7, 1, 0x224, 3, 12),
348 RK_PINDRIVE(7, 2, 0x228, 0, 2),
349 RK_PINDRIVE(7, 2, 0x228, 1, 4),
350 RK_PINDRIVE(7, 2, 0x228, 2, 8),
351 RK_PINDRIVE(7, 2, 0x228, 3, 12),
354 RK_PINDRIVE(8, 0, 0x230, 0, 2),
355 RK_PINDRIVE(8, 0, 0x230, 1, 4),
356 RK_PINDRIVE(8, 0, 0x230, 2, 8),
357 RK_PINDRIVE(8, 0, 0x230, 3, 12),
360 RK_PINDRIVE(8, 1, 0x234, 0, 2),
361 RK_PINDRIVE(8, 1, 0x234, 1, 4),
362 RK_PINDRIVE(8, 1, 0x234, 2, 8),
363 RK_PINDRIVE(8, 1, 0x234, 3, 12),
367 rk3288_get_pd_offset(struct rk_pinctrl_softc *sc, uint32_t bank)
370 return (0x064); /* PMU */
374 static struct syscon *
375 rk3288_get_syscon(struct rk_pinctrl_softc *sc, uint32_t bank)
383 rk3288_parse_bias(phandle_t node, int bank)
385 if (OF_hasprop(node, "bias-disable"))
387 if (OF_hasprop(node, "bias-pull-up"))
389 if (OF_hasprop(node, "bias-pull-down"))
396 rk3288_resolv_bias_value(int bank, int bias)
401 rv = GPIO_PIN_PULLUP;
403 rv = GPIO_PIN_PULLDOWN;
409 rk3288_get_bias_value(int bank, int bias)
413 if (bias & GPIO_PIN_PULLUP)
415 else if (bias & GPIO_PIN_PULLDOWN)
421 struct rk_pinctrl_conf rk3288_conf = {
422 .iomux_conf = rk3288_iomux_bank,
423 .iomux_nbanks = nitems(rk3288_iomux_bank),
424 .pin_fixup = rk3288_pin_fixup,
425 .npin_fixup = nitems(rk3288_pin_fixup),
426 .pin_drive = rk3288_pin_drive,
427 .npin_drive = nitems(rk3288_pin_drive),
428 .gpio_bank = rk3288_gpio_bank,
429 .ngpio_bank = nitems(rk3288_gpio_bank),
430 .get_pd_offset = rk3288_get_pd_offset,
431 .get_syscon = rk3288_get_syscon,
432 .parse_bias = rk3288_parse_bias,
433 .resolv_bias_value = rk3288_resolv_bias_value,
434 .get_bias_value = rk3288_get_bias_value,
437 static struct rk_pinctrl_gpio rk3328_gpio_bank[] = {
444 static struct rk_pinctrl_bank rk3328_iomux_bank[] = {
445 /* bank sub offs nbits */
446 RK_IOMUX(0, 0, 0x0000, 2),
447 RK_IOMUX(0, 1, 0x0004, 2),
448 RK_IOMUX(0, 2, 0x0008, 2),
449 RK_IOMUX(0, 3, 0x000C, 2),
450 RK_IOMUX(1, 0, 0x0010, 2),
451 RK_IOMUX(1, 1, 0x0014, 2),
452 RK_IOMUX(1, 2, 0x0018, 2),
453 RK_IOMUX(1, 3, 0x001C, 2),
454 RK_IOMUX(2, 0, 0x0020, 2),
455 RK_IOMUX(2, 1, 0x0024, 3),
456 RK_IOMUX(2, 2, 0x002c, 3),
457 RK_IOMUX(2, 3, 0x0034, 2),
458 RK_IOMUX(3, 0, 0x0038, 3),
459 RK_IOMUX(3, 1, 0x0040, 3),
460 RK_IOMUX(3, 2, 0x0048, 2),
461 RK_IOMUX(3, 3, 0x004c, 2),
464 static struct rk_pinctrl_pin_fixup rk3328_pin_fixup[] = {
465 /* bank pin reg bit mask */
466 RK_PINFIX(2, 12, 0x24, 8, 0x300),
467 RK_PINFIX(2, 15, 0x28, 0, 0x7),
468 RK_PINFIX(2, 23, 0x30, 14, 0x6000),
472 static struct rk_pinctrl_pin_drive rk3328_pin_drive[] = {
473 /* bank sub offs val ma */
474 RK_PINDRIVE(0, 0, 0x200, 0, 2),
475 RK_PINDRIVE(0, 0, 0x200, 1, 4),
476 RK_PINDRIVE(0, 0, 0x200, 2, 8),
477 RK_PINDRIVE(0, 0, 0x200, 3, 12),
479 RK_PINDRIVE(0, 1, 0x204, 0, 2),
480 RK_PINDRIVE(0, 1, 0x204, 1, 4),
481 RK_PINDRIVE(0, 1, 0x204, 2, 8),
482 RK_PINDRIVE(0, 1, 0x204, 3, 12),
484 RK_PINDRIVE(0, 2, 0x208, 0, 2),
485 RK_PINDRIVE(0, 2, 0x208, 1, 4),
486 RK_PINDRIVE(0, 2, 0x208, 2, 8),
487 RK_PINDRIVE(0, 2, 0x208, 3, 12),
489 RK_PINDRIVE(0, 3, 0x20C, 0, 2),
490 RK_PINDRIVE(0, 3, 0x20C, 1, 4),
491 RK_PINDRIVE(0, 3, 0x20C, 2, 8),
492 RK_PINDRIVE(0, 3, 0x20C, 3, 12),
494 RK_PINDRIVE(1, 0, 0x210, 0, 2),
495 RK_PINDRIVE(1, 0, 0x210, 1, 4),
496 RK_PINDRIVE(1, 0, 0x210, 2, 8),
497 RK_PINDRIVE(1, 0, 0x210, 3, 12),
499 RK_PINDRIVE(1, 1, 0x214, 0, 2),
500 RK_PINDRIVE(1, 1, 0x214, 1, 4),
501 RK_PINDRIVE(1, 1, 0x214, 2, 8),
502 RK_PINDRIVE(1, 1, 0x214, 3, 12),
504 RK_PINDRIVE(1, 2, 0x218, 0, 2),
505 RK_PINDRIVE(1, 2, 0x218, 1, 4),
506 RK_PINDRIVE(1, 2, 0x218, 2, 8),
507 RK_PINDRIVE(1, 2, 0x218, 3, 12),
509 RK_PINDRIVE(1, 3, 0x21C, 0, 2),
510 RK_PINDRIVE(1, 3, 0x21C, 1, 4),
511 RK_PINDRIVE(1, 3, 0x21C, 2, 8),
512 RK_PINDRIVE(1, 3, 0x21C, 3, 12),
514 RK_PINDRIVE(2, 0, 0x220, 0, 2),
515 RK_PINDRIVE(2, 0, 0x220, 1, 4),
516 RK_PINDRIVE(2, 0, 0x220, 2, 8),
517 RK_PINDRIVE(2, 0, 0x220, 3, 12),
519 RK_PINDRIVE(2, 1, 0x224, 0, 2),
520 RK_PINDRIVE(2, 1, 0x224, 1, 4),
521 RK_PINDRIVE(2, 1, 0x224, 2, 8),
522 RK_PINDRIVE(2, 1, 0x224, 3, 12),
524 RK_PINDRIVE(2, 2, 0x228, 0, 2),
525 RK_PINDRIVE(2, 2, 0x228, 1, 4),
526 RK_PINDRIVE(2, 2, 0x228, 2, 8),
527 RK_PINDRIVE(2, 2, 0x228, 3, 12),
529 RK_PINDRIVE(2, 3, 0x22C, 0, 2),
530 RK_PINDRIVE(2, 3, 0x22C, 1, 4),
531 RK_PINDRIVE(2, 3, 0x22C, 2, 8),
532 RK_PINDRIVE(2, 3, 0x22C, 3, 12),
534 RK_PINDRIVE(3, 0, 0x230, 0, 2),
535 RK_PINDRIVE(3, 0, 0x230, 1, 4),
536 RK_PINDRIVE(3, 0, 0x230, 2, 8),
537 RK_PINDRIVE(3, 0, 0x230, 3, 12),
539 RK_PINDRIVE(3, 1, 0x234, 0, 2),
540 RK_PINDRIVE(3, 1, 0x234, 1, 4),
541 RK_PINDRIVE(3, 1, 0x234, 2, 8),
542 RK_PINDRIVE(3, 1, 0x234, 3, 12),
544 RK_PINDRIVE(3, 2, 0x238, 0, 2),
545 RK_PINDRIVE(3, 2, 0x238, 1, 4),
546 RK_PINDRIVE(3, 2, 0x238, 2, 8),
547 RK_PINDRIVE(3, 2, 0x238, 3, 12),
549 RK_PINDRIVE(3, 3, 0x23C, 0, 2),
550 RK_PINDRIVE(3, 3, 0x23C, 1, 4),
551 RK_PINDRIVE(3, 3, 0x23C, 2, 8),
552 RK_PINDRIVE(3, 3, 0x23C, 3, 12),
556 rk3328_get_pd_offset(struct rk_pinctrl_softc *sc, uint32_t bank)
561 static struct syscon *
562 rk3328_get_syscon(struct rk_pinctrl_softc *sc, uint32_t bank)
567 struct rk_pinctrl_conf rk3328_conf = {
568 .iomux_conf = rk3328_iomux_bank,
569 .iomux_nbanks = nitems(rk3328_iomux_bank),
570 .pin_fixup = rk3328_pin_fixup,
571 .npin_fixup = nitems(rk3328_pin_fixup),
572 .pin_drive = rk3328_pin_drive,
573 .npin_drive = nitems(rk3328_pin_drive),
574 .gpio_bank = rk3328_gpio_bank,
575 .ngpio_bank = nitems(rk3328_gpio_bank),
576 .get_pd_offset = rk3328_get_pd_offset,
577 .get_syscon = rk3328_get_syscon,
578 .parse_bias = rk3288_parse_bias,
579 .resolv_bias_value = rk3288_resolv_bias_value,
580 .get_bias_value = rk3288_get_bias_value,
583 static struct rk_pinctrl_gpio rk3399_gpio_bank[] = {
591 static struct rk_pinctrl_bank rk3399_iomux_bank[] = {
592 /* bank sub offs nbits */
593 RK_IOMUX(0, 0, 0x0000, 2),
594 RK_IOMUX(0, 1, 0x0004, 2),
595 RK_IOMUX(0, 2, 0x0008, 2),
596 RK_IOMUX(0, 3, 0x000C, 2),
597 RK_IOMUX(1, 0, 0x0010, 2),
598 RK_IOMUX(1, 1, 0x0014, 2),
599 RK_IOMUX(1, 2, 0x0018, 2),
600 RK_IOMUX(1, 3, 0x001C, 2),
601 RK_IOMUX(2, 0, 0xE000, 2),
602 RK_IOMUX(2, 1, 0xE004, 2),
603 RK_IOMUX(2, 2, 0xE008, 2),
604 RK_IOMUX(2, 3, 0xE00C, 2),
605 RK_IOMUX(3, 0, 0xE010, 2),
606 RK_IOMUX(3, 1, 0xE014, 2),
607 RK_IOMUX(3, 2, 0xE018, 2),
608 RK_IOMUX(3, 3, 0xE01C, 2),
609 RK_IOMUX(4, 0, 0xE020, 2),
610 RK_IOMUX(4, 1, 0xE024, 2),
611 RK_IOMUX(4, 2, 0xE028, 2),
612 RK_IOMUX(4, 3, 0xE02C, 2),
615 static struct rk_pinctrl_pin_fixup rk3399_pin_fixup[] = {};
617 static struct rk_pinctrl_pin_drive rk3399_pin_drive[] = {
618 /* bank sub offs val ma */
620 RK_PINDRIVE(0, 0, 0x80, 0, 5),
621 RK_PINDRIVE(0, 0, 0x80, 1, 10),
622 RK_PINDRIVE(0, 0, 0x80, 2, 15),
623 RK_PINDRIVE(0, 0, 0x80, 3, 20),
626 RK_PINDRIVE(0, 1, 0x88, 0, 5),
627 RK_PINDRIVE(0, 1, 0x88, 1, 10),
628 RK_PINDRIVE(0, 1, 0x88, 2, 15),
629 RK_PINDRIVE(0, 1, 0x88, 3, 20),
632 RK_PINDRIVE(1, 0, 0xA0, 0, 3),
633 RK_PINDRIVE(1, 0, 0xA0, 1, 6),
634 RK_PINDRIVE(1, 0, 0xA0, 2, 9),
635 RK_PINDRIVE(1, 0, 0xA0, 3, 12),
638 RK_PINDRIVE(1, 1, 0xA8, 0, 3),
639 RK_PINDRIVE(1, 1, 0xA8, 1, 6),
640 RK_PINDRIVE(1, 1, 0xA8, 2, 9),
641 RK_PINDRIVE(1, 1, 0xA8, 3, 12),
644 RK_PINDRIVE(1, 2, 0xB0, 0, 3),
645 RK_PINDRIVE(1, 2, 0xB0, 1, 6),
646 RK_PINDRIVE(1, 2, 0xB0, 2, 9),
647 RK_PINDRIVE(1, 2, 0xB0, 3, 12),
650 RK_PINDRIVE(1, 3, 0xB8, 0, 3),
651 RK_PINDRIVE(1, 3, 0xB8, 1, 6),
652 RK_PINDRIVE(1, 3, 0xB8, 2, 9),
653 RK_PINDRIVE(1, 3, 0xB8, 3, 12),
657 rk3399_get_pd_offset(struct rk_pinctrl_softc *sc, uint32_t bank)
665 static struct syscon *
666 rk3399_get_syscon(struct rk_pinctrl_softc *sc, uint32_t bank)
675 rk3399_parse_bias(phandle_t node, int bank)
677 int pullup, pulldown;
679 if (OF_hasprop(node, "bias-disable"))
696 if (OF_hasprop(node, "bias-pull-up"))
698 if (OF_hasprop(node, "bias-pull-down"))
705 rk3399_resolv_bias_value(int bank, int bias)
713 rv = GPIO_PIN_PULLUP;
715 rv = GPIO_PIN_PULLDOWN;
721 rv = GPIO_PIN_PULLUP;
723 rv = GPIO_PIN_PULLDOWN;
731 rk3399_get_bias_value(int bank, int bias)
738 if (bias & GPIO_PIN_PULLUP)
740 else if (bias & GPIO_PIN_PULLDOWN)
746 if (bias & GPIO_PIN_PULLUP)
748 else if (bias & GPIO_PIN_PULLDOWN)
756 struct rk_pinctrl_conf rk3399_conf = {
757 .iomux_conf = rk3399_iomux_bank,
758 .iomux_nbanks = nitems(rk3399_iomux_bank),
759 .pin_fixup = rk3399_pin_fixup,
760 .npin_fixup = nitems(rk3399_pin_fixup),
761 .pin_drive = rk3399_pin_drive,
762 .npin_drive = nitems(rk3399_pin_drive),
763 .gpio_bank = rk3399_gpio_bank,
764 .ngpio_bank = nitems(rk3399_gpio_bank),
765 .get_pd_offset = rk3399_get_pd_offset,
766 .get_syscon = rk3399_get_syscon,
767 .parse_bias = rk3399_parse_bias,
768 .resolv_bias_value = rk3399_resolv_bias_value,
769 .get_bias_value = rk3399_get_bias_value,
772 static struct ofw_compat_data compat_data[] = {
773 {"rockchip,rk3288-pinctrl", (uintptr_t)&rk3288_conf},
774 {"rockchip,rk3328-pinctrl", (uintptr_t)&rk3328_conf},
775 {"rockchip,rk3399-pinctrl", (uintptr_t)&rk3399_conf},
780 rk_pinctrl_parse_drive(struct rk_pinctrl_softc *sc, phandle_t node,
781 uint32_t bank, uint32_t subbank, uint32_t *drive, uint32_t *offset)
786 if (OF_getencprop(node, "drive-strength", &value,
790 /* Map to the correct drive value */
791 for (i = 0; i < sc->conf->npin_drive; i++) {
792 if (sc->conf->pin_drive[i].bank != bank &&
793 sc->conf->pin_drive[i].subbank != subbank)
795 if (sc->conf->pin_drive[i].ma == value) {
796 *drive = sc->conf->pin_drive[i].value;
805 rk_pinctrl_get_fixup(struct rk_pinctrl_softc *sc, uint32_t bank, uint32_t pin,
806 uint32_t *reg, uint32_t *mask, uint32_t *bit)
810 for (i = 0; i < sc->conf->npin_fixup; i++)
811 if (sc->conf->pin_fixup[i].bank == bank &&
812 sc->conf->pin_fixup[i].pin == pin) {
813 *reg = sc->conf->pin_fixup[i].reg;
814 *mask = sc->conf->pin_fixup[i].mask;
815 *bit = sc->conf->pin_fixup[i].bit;
822 rk_pinctrl_handle_io(struct rk_pinctrl_softc *sc, phandle_t node, uint32_t bank,
825 bool have_cfg, have_direction, have_value;
826 uint32_t direction_value, pin_value;
827 struct rk_pinctrl_gpio *gpio;
831 have_direction = false;
834 /* Get (subset of) GPIO pin properties. */
835 if (OF_hasprop(node, "output-disable")) {
837 have_direction = true;
838 direction_value = GPIO_PIN_INPUT;
841 if (OF_hasprop(node, "output-enable")) {
843 have_direction = true;
844 direction_value = GPIO_PIN_OUTPUT;
847 if (OF_hasprop(node, "output-low")) {
849 have_direction = true;
850 direction_value = GPIO_PIN_OUTPUT;
855 if (OF_hasprop(node, "output-high")) {
857 have_direction = true;
858 direction_value = GPIO_PIN_OUTPUT;
868 for(i = 0; i < sc->conf->ngpio_bank; i++) {
869 if (bank == sc->conf->gpio_bank[i].bank) {
870 gpio = sc->conf->gpio_bank + i;
875 device_printf(sc->dev, "Cannot find GPIO bank %d\n", bank);
878 if (gpio->gpio_dev == NULL) {
879 device_printf(sc->dev,
880 "No GPIO subdevice found for bank %d\n", bank);
886 rv = GPIO_PIN_SET(gpio->gpio_dev, pin, pin_value);
888 device_printf(sc->dev, "Cannot set GPIO value: %d\n",
894 if (have_direction) {
895 rv = GPIO_PIN_SETFLAGS(gpio->gpio_dev, pin, direction_value);
897 device_printf(sc->dev,
898 "Cannot set GPIO direction: %d\n", rv);
907 rk_pinctrl_configure_pin(struct rk_pinctrl_softc *sc, uint32_t *pindata)
910 struct syscon *syscon;
911 uint32_t bank, subbank, pin, function, bias;
912 uint32_t bit, mask, reg, drive;
917 function = pindata[2];
918 pin_conf = OF_node_from_xref(pindata[3]);
921 for (i = 0; i < sc->conf->iomux_nbanks; i++)
922 if (sc->conf->iomux_conf[i].bank == bank &&
923 sc->conf->iomux_conf[i].subbank == subbank)
926 if (i == sc->conf->iomux_nbanks) {
927 device_printf(sc->dev, "Unknown pin %d in bank %d\n", pin,
933 syscon = sc->conf->get_syscon(sc, bank);
935 /* Parse pin function */
936 reg = sc->conf->iomux_conf[i].offset;
937 switch (sc->conf->iomux_conf[i].nbits) {
947 bit = (pin % 8 % 5) * 3;
955 device_printf(sc->dev,
956 "Unknown pin stride width %d in bank %d\n",
957 sc->conf->iomux_conf[i].nbits, bank);
960 rk_pinctrl_get_fixup(sc, bank, pin, ®, &mask, &bit);
963 * NOTE: not all syscon registers uses hi-word write mask, thus
964 * register modify method should be used.
965 * XXXX We should not pass write mask to syscon register
966 * without hi-word write mask.
968 SYSCON_MODIFY_4(syscon, reg, mask, function << bit | (mask << 16));
971 bias = sc->conf->parse_bias(pin_conf, bank);
973 reg = sc->conf->get_pd_offset(sc, bank);
975 reg += bank * 0x10 + ((pin / 8) * 0x4);
978 SYSCON_MODIFY_4(syscon, reg, mask, bias << bit | (mask << 16));
982 rv = rk_pinctrl_parse_drive(sc, pin_conf, bank, subbank, &drive, ®);
986 SYSCON_MODIFY_4(syscon, reg, mask, drive << bit | (mask << 16));
989 /* Input/Outpot + default level */
990 rv = rk_pinctrl_handle_io(sc, pin_conf, bank, pin);
994 rk_pinctrl_configure_pins(device_t dev, phandle_t cfgxref)
996 struct rk_pinctrl_softc *sc;
1001 sc = device_get_softc(dev);
1002 node = OF_node_from_xref(cfgxref);
1004 npins = OF_getencprop_alloc_multi(node, "rockchip,pins", sizeof(*pins),
1009 for (i = 0; i != npins; i += 4)
1010 rk_pinctrl_configure_pin(sc, pins + i);
1016 rk_pinctrl_is_gpio_locked(struct rk_pinctrl_softc *sc, struct syscon *syscon,
1017 int bank, uint32_t pin, bool *is_gpio)
1019 uint32_t subbank, bit, mask, reg;
1023 RK_PINCTRL_LOCK_ASSERT(sc);
1028 for (i = 0; i < sc->conf->iomux_nbanks; i++)
1029 if (sc->conf->iomux_conf[i].bank == bank &&
1030 sc->conf->iomux_conf[i].subbank == subbank)
1033 if (i == sc->conf->iomux_nbanks) {
1034 device_printf(sc->dev, "Unknown pin %d in bank %d\n", pin,
1039 syscon = sc->conf->get_syscon(sc, bank);
1041 /* Parse pin function */
1042 reg = sc->conf->iomux_conf[i].offset;
1043 switch (sc->conf->iomux_conf[i].nbits) {
1047 bit = (pin % 4) * 4;
1048 mask = (0xF << bit);
1053 bit = (pin % 8 % 5) * 3;
1054 mask = (0x7 << bit);
1057 bit = (pin % 8) * 2;
1058 mask = (0x3 << bit);
1061 device_printf(sc->dev,
1062 "Unknown pin stride width %d in bank %d\n",
1063 sc->conf->iomux_conf[i].nbits, bank);
1066 rk_pinctrl_get_fixup(sc, bank, pin, ®, &mask, &bit);
1068 reg = SYSCON_READ_4(syscon, reg);
1069 pinfunc = (reg & mask) >> bit;
1071 /* Test if the pin is in gpio mode */
1079 rk_pinctrl_get_bank(struct rk_pinctrl_softc *sc, device_t gpio, int *bank)
1083 for (i = 0; i < sc->conf->ngpio_bank; i++) {
1084 if (sc->conf->gpio_bank[i].gpio_dev == gpio)
1087 if (i == sc->conf->ngpio_bank)
1095 rk_pinctrl_is_gpio(device_t pinctrl, device_t gpio, uint32_t pin, bool *is_gpio)
1097 struct rk_pinctrl_softc *sc;
1098 struct syscon *syscon;
1102 sc = device_get_softc(pinctrl);
1103 RK_PINCTRL_LOCK(sc);
1105 rv = rk_pinctrl_get_bank(sc, gpio, &bank);
1108 syscon = sc->conf->get_syscon(sc, bank);
1109 rv = rk_pinctrl_is_gpio_locked(sc, syscon, bank, pin, is_gpio);
1112 RK_PINCTRL_UNLOCK(sc);
1118 rk_pinctrl_get_flags(device_t pinctrl, device_t gpio, uint32_t pin,
1121 struct rk_pinctrl_softc *sc;
1122 struct syscon *syscon;
1123 uint32_t reg, mask, bit;
1129 sc = device_get_softc(pinctrl);
1130 RK_PINCTRL_LOCK(sc);
1132 rv = rk_pinctrl_get_bank(sc, gpio, &bank);
1135 syscon = sc->conf->get_syscon(sc, bank);
1136 rv = rk_pinctrl_is_gpio_locked(sc, syscon, bank, pin, &is_gpio);
1143 /* Get the pullup/pulldown configuration */
1144 reg = sc->conf->get_pd_offset(sc, bank);
1145 reg += bank * 0x10 + ((pin / 8) * 0x4);
1146 bit = (pin % 8) * 2;
1147 mask = (0x3 << bit) << 16;
1148 reg = SYSCON_READ_4(syscon, reg);
1149 reg = (reg >> bit) & 0x3;
1150 bias = sc->conf->resolv_bias_value(bank, reg);
1154 RK_PINCTRL_UNLOCK(sc);
1159 rk_pinctrl_set_flags(device_t pinctrl, device_t gpio, uint32_t pin,
1162 struct rk_pinctrl_softc *sc;
1163 struct syscon *syscon;
1164 uint32_t bit, mask, reg;
1170 sc = device_get_softc(pinctrl);
1171 RK_PINCTRL_LOCK(sc);
1173 rv = rk_pinctrl_get_bank(sc, gpio, &bank);
1176 syscon = sc->conf->get_syscon(sc, bank);
1177 rv = rk_pinctrl_is_gpio_locked(sc, syscon, bank, pin, &is_gpio);
1184 /* Get the pullup/pulldown configuration */
1185 reg = sc->conf->get_pd_offset(sc, bank);
1186 reg += bank * 0x10 + ((pin / 8) * 0x4);
1187 bit = (pin % 8) * 2;
1188 mask = (0x3 << bit);
1189 bias = sc->conf->get_bias_value(bank, flags);
1190 SYSCON_MODIFY_4(syscon, reg, mask, bias << bit | (mask << 16));
1193 RK_PINCTRL_UNLOCK(sc);
1198 rk_pinctrl_register_gpio(struct rk_pinctrl_softc *sc, char *gpio_name,
1203 for(i = 0; i < sc->conf->ngpio_bank; i++) {
1204 if (strcmp(gpio_name, sc->conf->gpio_bank[i].gpio_name) != 0)
1206 sc->conf->gpio_bank[i].gpio_dev = gpio_dev;
1213 rk_pinctrl_probe(device_t dev)
1216 if (!ofw_bus_status_okay(dev))
1219 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
1222 device_set_desc(dev, "RockChip Pinctrl controller");
1223 return (BUS_PROBE_DEFAULT);
1227 rk_pinctrl_attach(device_t dev)
1229 struct rk_pinctrl_softc *sc;
1232 char *gpio_name, *eptr;
1235 sc = device_get_softc(dev);
1238 node = ofw_bus_get_node(dev);
1240 if (OF_hasprop(node, "rockchip,grf") &&
1241 syscon_get_by_ofw_property(dev, node,
1242 "rockchip,grf", &sc->grf) != 0) {
1243 device_printf(dev, "cannot get grf driver handle\n");
1247 /* RK3399,RK3288 has banks in PMU. RK3328 does not have a PMU. */
1248 if (ofw_bus_node_is_compatible(node, "rockchip,rk3399-pinctrl") ||
1249 ofw_bus_node_is_compatible(node, "rockchip,rk3288-pinctrl")) {
1250 if (OF_hasprop(node, "rockchip,pmu") &&
1251 syscon_get_by_ofw_property(dev, node,
1252 "rockchip,pmu", &sc->pmu) != 0) {
1253 device_printf(dev, "cannot get pmu driver handle\n");
1258 mtx_init(&sc->mtx, "rk pinctrl", "pinctrl", MTX_SPIN);
1260 sc->conf = (struct rk_pinctrl_conf *)ofw_bus_search_compatible(dev,
1261 compat_data)->ocd_data;
1263 fdt_pinctrl_register(dev, "rockchip,pins");
1265 simplebus_init(dev, node);
1267 bus_generic_probe(dev);
1269 /* Attach child devices */
1270 for (node = OF_child(node); node > 0; node = OF_peer(node)) {
1271 if (!ofw_bus_node_is_compatible(node, "rockchip,gpio-bank"))
1274 rv = OF_getprop_alloc(node, "name", (void **)&gpio_name);
1276 device_printf(sc->dev, "Cannot GPIO subdevice name.\n");
1280 cdev = simplebus_add_device(dev, node, 0, NULL, -1, NULL);
1282 device_printf(dev, " Cannot add GPIO subdevice: %s\n",
1284 OF_prop_free(gpio_name);
1288 rv = device_probe_and_attach(cdev);
1290 device_printf(sc->dev,
1291 "Cannot attach GPIO subdevice: %s\n", gpio_name);
1292 OF_prop_free(gpio_name);
1296 /* Grep device name from name property */
1299 if (gpio_name == eptr) {
1300 device_printf(sc->dev,
1301 "Unrecognized format of GPIO subdevice name: %s\n",
1303 OF_prop_free(gpio_name);
1306 rv = rk_pinctrl_register_gpio(sc, gpio_name, cdev);
1308 device_printf(sc->dev,
1309 "Cannot register GPIO subdevice %s: %d\n",
1311 OF_prop_free(gpio_name);
1314 OF_prop_free(gpio_name);
1317 fdt_pinctrl_configure_tree(dev);
1319 return (bus_generic_attach(dev));
1323 rk_pinctrl_detach(device_t dev)
1329 static device_method_t rk_pinctrl_methods[] = {
1330 /* Device interface */
1331 DEVMETHOD(device_probe, rk_pinctrl_probe),
1332 DEVMETHOD(device_attach, rk_pinctrl_attach),
1333 DEVMETHOD(device_detach, rk_pinctrl_detach),
1335 /* fdt_pinctrl interface */
1336 DEVMETHOD(fdt_pinctrl_configure, rk_pinctrl_configure_pins),
1337 DEVMETHOD(fdt_pinctrl_is_gpio, rk_pinctrl_is_gpio),
1338 DEVMETHOD(fdt_pinctrl_get_flags, rk_pinctrl_get_flags),
1339 DEVMETHOD(fdt_pinctrl_set_flags, rk_pinctrl_set_flags),
1344 static devclass_t rk_pinctrl_devclass;
1346 DEFINE_CLASS_1(rk_pinctrl, rk_pinctrl_driver, rk_pinctrl_methods,
1347 sizeof(struct rk_pinctrl_softc), simplebus_driver);
1349 EARLY_DRIVER_MODULE(rk_pinctrl, simplebus, rk_pinctrl_driver,
1350 rk_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
1351 MODULE_VERSION(rk_pinctrl, 1);