sys/arm64/rockchip/rk_pwm.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org>
   5  * Copyright (c) 2019 Brandon Bergren <git@bdragon.rtk0.net>
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  *
  28  * $FreeBSD$
  29  */
  30
  31 #include <sys/cdefs.h>
  32 __FBSDID("$FreeBSD$");
  33
  34 #include <sys/param.h>
  35 #include <sys/systm.h>
  36 #include <sys/bus.h>
  37 #include <sys/kernel.h>
  38 #include <sys/module.h>
  39 #include <sys/rman.h>
  40 #include <sys/resource.h>
  41 #include <machine/bus.h>
  42
  43 #include <dev/ofw/ofw_bus.h>
  44 #include <dev/ofw/ofw_bus_subr.h>
  45
  46 #include <dev/extres/clk/clk.h>
  47
  48 #include "pwmbus_if.h"
  49
  50 /* Register offsets. */
  51 #define RK_PWM_COUNTER                  0x00
  52 #define RK_PWM_PERIOD                   0x04
  53 #define RK_PWM_DUTY                     0x08
  54 #define RK_PWM_CTRL                     0x0c
  55
  56 #define SET(reg,mask,val)               reg = ((reg & ~mask) | val)
  57
  58 #define RK_PWM_CTRL_ENABLE_MASK         (1 << 0)
  59 #define  RK_PWM_CTRL_ENABLED            (1 << 0)
  60 #define  RK_PWM_CTRL_DISABLED           (0)
  61
  62 #define RK_PWM_CTRL_MODE_MASK           (3 << 1)
  63 #define  RK_PWM_CTRL_MODE_ONESHOT       (0)
  64 #define  RK_PWM_CTRL_MODE_CONTINUOUS    (1 << 1)
  65 #define  RK_PWM_CTRL_MODE_CAPTURE       (1 << 2)
  66
  67 #define RK_PWM_CTRL_DUTY_MASK           (1 << 3)
  68 #define  RK_PWM_CTRL_DUTY_POSITIVE      (1 << 3)
  69 #define  RK_PWM_CTRL_DUTY_NEGATIVE      (0)
  70
  71 #define RK_PWM_CTRL_INACTIVE_MASK       (1 << 4)
  72 #define  RK_PWM_CTRL_INACTIVE_POSITIVE  (1 << 4)
  73 #define  RK_PWM_CTRL_INACTIVE_NEGATIVE  (0)
  74
  75 /* PWM Output Alignment */
  76 #define RK_PWM_CTRL_ALIGN_MASK          (1 << 5)
  77 #define  RK_PWM_CTRL_ALIGN_CENTER       (1 << 5)
  78 #define  RK_PWM_CTRL_ALIGN_LEFT         (0)
  79
  80 /* Low power mode: disable prescaler when inactive */
  81 #define RK_PWM_CTRL_LP_MASK             (1 << 8)
  82 #define  RK_PWM_CTRL_LP_ENABLE          (1 << 8)
  83 #define  RK_PWM_CTRL_LP_DISABLE         (0)
  84
  85 /* Clock source: bypass the scaler or not */
  86 #define RK_PWM_CTRL_CLOCKSRC_MASK       (1 << 9)
  87 #define  RK_PWM_CTRL_CLOCKSRC_NONSCALED (0)
  88 #define  RK_PWM_CTRL_CLOCKSRC_SCALED    (1 << 9)
  89
  90 #define RK_PWM_CTRL_PRESCALE_MASK       (7 << 12)
  91 #define RK_PWM_CTRL_PRESCALE_SHIFT      12
  92
  93 #define RK_PWM_CTRL_SCALE_MASK          (0xFF << 16)
  94 #define RK_PWM_CTRL_SCALE_SHIFT         16
  95
  96 #define RK_PWM_CTRL_REPEAT_MASK         (0xFF << 24)
  97 #define RK_PWM_CTRL_REPEAT_SHIFT        24
  98
  99 #define NS_PER_SEC      1000000000
 100
 101 static struct ofw_compat_data compat_data[] = {
 102         { "rockchip,rk3399-pwm",                1 },
 103         { NULL,                                 0 }
 104 };
 105
 106 static struct resource_spec rk_pwm_spec[] = {
 107         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
 108         { -1, 0 }
 109 };
 110
 111 struct rk_pwm_softc {
 112         device_t        dev;
 113         device_t        busdev;
 114         clk_t           clk;
 115         struct resource *res;
 116
 117         uint64_t        clk_freq;
 118         unsigned int    period;
 119         unsigned int    duty;
 120         uint32_t        flags;
 121         uint8_t         prescaler;
 122         uint8_t         scaler;
 123         bool            using_scaler;
 124         bool            enabled;
 125 };
 126
 127 #define RK_PWM_READ(sc, reg)            bus_read_4((sc)->res, (reg))
 128 #define RK_PWM_WRITE(sc, reg, val)      bus_write_4((sc)->res, (reg), (val))
 129
 130 static int rk_pwm_probe(device_t dev);
 131 static int rk_pwm_attach(device_t dev);
 132 static int rk_pwm_detach(device_t dev);
 133
 134 static int
 135 rk_pwm_probe(device_t dev)
 136 {
 137         if (!ofw_bus_status_okay(dev))
 138                 return (ENXIO);
 139
 140         if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
 141                 return (ENXIO);
 142
 143         device_set_desc(dev, "Rockchip PWM");
 144         return (BUS_PROBE_DEFAULT);
 145 }
 146
 147 static int
 148 rk_pwm_attach(device_t dev)
 149 {
 150         struct rk_pwm_softc *sc;
 151         phandle_t node;
 152         uint64_t clk_freq;
 153         uint32_t reg;
 154         int error;
 155
 156         sc = device_get_softc(dev);
 157         sc->dev = dev;
 158
 159         error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
 160         if (error != 0) {
 161                 device_printf(dev, "cannot get clock\n");
 162                 goto fail;
 163         }
 164         error = clk_enable(sc->clk);
 165         if (error != 0) {
 166                 device_printf(dev, "cannot enable clock\n");
 167                 goto fail;
 168         }
 169         error = clk_get_freq(sc->clk, &sc->clk_freq);
 170         if (error != 0) {
 171                 device_printf(dev, "cannot get base frequency\n");
 172                 goto fail;
 173         }
 174
 175         if (bus_alloc_resources(dev, rk_pwm_spec, &sc->res) != 0) {
 176                 device_printf(dev, "cannot allocate resources for device\n");
 177                 error = ENXIO;
 178                 goto fail;
 179         }
 180
 181         /* Read the configuration left by U-Boot */
 182         reg = RK_PWM_READ(sc, RK_PWM_CTRL);
 183         if ((reg & RK_PWM_CTRL_ENABLE_MASK) == RK_PWM_CTRL_ENABLED)
 184                 sc->enabled = true;
 185
 186         reg = RK_PWM_READ(sc, RK_PWM_CTRL);
 187         reg &= RK_PWM_CTRL_PRESCALE_MASK;
 188         sc->prescaler = reg >> RK_PWM_CTRL_PRESCALE_SHIFT;
 189
 190         reg = RK_PWM_READ(sc, RK_PWM_CTRL);
 191         reg &= RK_PWM_CTRL_SCALE_MASK;
 192         sc->scaler = reg >> RK_PWM_CTRL_SCALE_SHIFT;
 193
 194         reg = RK_PWM_READ(sc, RK_PWM_CTRL);
 195         if ((reg & RK_PWM_CTRL_CLOCKSRC_MASK) == RK_PWM_CTRL_CLOCKSRC_SCALED)
 196                 sc->using_scaler = true;
 197         else
 198                 sc->using_scaler = false;
 199
 200         clk_freq = sc->clk_freq / (2 ^ sc->prescaler);
 201
 202         if (sc->using_scaler) {
 203                 if (sc->scaler == 0)
 204                         clk_freq /= 512;
 205                 else
 206                         clk_freq /= (sc->scaler * 2);
 207         }
 208
 209         reg = RK_PWM_READ(sc, RK_PWM_PERIOD);
 210         sc->period = NS_PER_SEC /
 211                 (clk_freq / reg);
 212         reg = RK_PWM_READ(sc, RK_PWM_DUTY);
 213         sc->duty = NS_PER_SEC /
 214                 (clk_freq / reg);
 215
 216         node = ofw_bus_get_node(dev);
 217         OF_device_register_xref(OF_xref_from_node(node), dev);
 218
 219         sc->busdev = device_add_child(dev, "pwmbus", -1);
 220
 221         return (bus_generic_attach(dev));
 222
 223 fail:
 224         rk_pwm_detach(dev);
 225         return (error);
 226 }
 227
 228 static int
 229 rk_pwm_detach(device_t dev)
 230 {
 231         struct rk_pwm_softc *sc;
 232
 233         sc = device_get_softc(dev);
 234
 235         bus_generic_detach(sc->dev);
 236
 237         bus_release_resources(dev, rk_pwm_spec, &sc->res);
 238
 239         return (0);
 240 }
 241
 242 static phandle_t
 243 aw_pwm_get_node(device_t bus, device_t dev)
 244 {
 245
 246         /*
 247          * Share our controller node with our pwmbus child; it instantiates
 248          * devices by walking the children contained within our node.
 249          */
 250         return ofw_bus_get_node(bus);
 251 }
 252
 253 static int
 254 rk_pwm_channel_count(device_t dev, u_int *nchannel)
 255 {
 256         /* The device supports 4 channels, but attaches multiple times in the
 257          * device tree. This interferes with advanced usage though, as
 258          * the interrupt capability and channel 3 FIFO register offsets
 259          * don't work right in this situation.
 260          * But since we don't support those yet, pretend we are singlechannel.
 261          */
 262         *nchannel = 1;
 263
 264         return (0);
 265 }
 266
 267 static int
 268 rk_pwm_channel_config(device_t dev, u_int channel, u_int period, u_int duty)
 269 {
 270         struct rk_pwm_softc *sc;
 271         uint64_t period_freq, duty_freq;
 272         uint32_t reg;
 273         uint32_t period_out;
 274         uint32_t duty_out;
 275         uint8_t prescaler;
 276         uint8_t scaler;
 277         bool using_scaler;
 278
 279         sc = device_get_softc(dev);
 280
 281         period_freq = NS_PER_SEC / period;
 282         /* Datasheet doesn't define, so use Nyquist frequency. */
 283         if (period_freq > (sc->clk_freq / 2))
 284                 return (EINVAL);
 285         duty_freq = NS_PER_SEC / duty;
 286         if (duty_freq < period_freq) {
 287                 device_printf(sc->dev, "duty < period\n");
 288                 return (EINVAL);
 289         }
 290
 291         /* Assuming 24 MHz reference, we should never actually have
 292            to use the divider due to pwm API limitations. */
 293         prescaler = 0;
 294         scaler = 0;
 295         using_scaler = false;
 296
 297         /* XXX Expand API to allow for 64 bit period/duty. */
 298         period_out = (sc->clk_freq * period) / NS_PER_SEC;
 299         duty_out = (sc->clk_freq * duty) / NS_PER_SEC;
 300
 301         reg = RK_PWM_READ(sc, RK_PWM_CTRL);
 302
 303         if ((reg & RK_PWM_CTRL_MODE_MASK) != RK_PWM_CTRL_MODE_CONTINUOUS) {
 304                 /* Switching modes, disable just in case. */
 305                 SET(reg, RK_PWM_CTRL_ENABLE_MASK, RK_PWM_CTRL_DISABLED);
 306                 RK_PWM_WRITE(sc, RK_PWM_CTRL, reg);
 307         }
 308
 309         RK_PWM_WRITE(sc, RK_PWM_PERIOD, period_out);
 310         RK_PWM_WRITE(sc, RK_PWM_DUTY, duty_out);
 311
 312         SET(reg, RK_PWM_CTRL_ENABLE_MASK, RK_PWM_CTRL_ENABLED);
 313         SET(reg, RK_PWM_CTRL_MODE_MASK, RK_PWM_CTRL_MODE_CONTINUOUS);
 314         SET(reg, RK_PWM_CTRL_ALIGN_MASK, RK_PWM_CTRL_ALIGN_LEFT);
 315         SET(reg, RK_PWM_CTRL_CLOCKSRC_MASK, using_scaler);
 316         SET(reg, RK_PWM_CTRL_PRESCALE_MASK,
 317                 prescaler <<  RK_PWM_CTRL_PRESCALE_SHIFT);
 318         SET(reg, RK_PWM_CTRL_SCALE_MASK,
 319                 scaler << RK_PWM_CTRL_SCALE_SHIFT);
 320
 321         RK_PWM_WRITE(sc, RK_PWM_CTRL, reg);
 322
 323         sc->period = period;
 324         sc->duty = duty;
 325
 326         return (0);
 327 }
 328
 329 static int
 330 rk_pwm_channel_get_config(device_t dev, u_int channel, u_int *period, u_int *duty)
 331 {
 332         struct rk_pwm_softc *sc;
 333
 334         sc = device_get_softc(dev);
 335
 336         *period = sc->period;
 337         *duty = sc->duty;
 338
 339         return (0);
 340 }
 341
 342 static int
 343 rk_pwm_channel_enable(device_t dev, u_int channel, bool enable)
 344 {
 345         struct rk_pwm_softc *sc;
 346         uint32_t reg;
 347
 348         sc = device_get_softc(dev);
 349
 350         if (enable && sc->enabled)
 351                 return (0);
 352
 353         reg = RK_PWM_READ(sc, RK_PWM_CTRL);
 354         SET(reg, RK_PWM_CTRL_ENABLE_MASK, enable);
 355
 356         RK_PWM_WRITE(sc, RK_PWM_CTRL, reg);
 357
 358         sc->enabled = enable;
 359
 360         return (0);
 361 }
 362
 363 static int
 364 rk_pwm_channel_is_enabled(device_t dev, u_int channel, bool *enabled)
 365 {
 366         struct rk_pwm_softc *sc;
 367
 368         sc = device_get_softc(dev);
 369
 370         *enabled = sc->enabled;
 371
 372         return (0);
 373 }
 374
 375 static device_method_t rk_pwm_methods[] = {
 376         /* Device interface */
 377         DEVMETHOD(device_probe,         rk_pwm_probe),
 378         DEVMETHOD(device_attach,        rk_pwm_attach),
 379         DEVMETHOD(device_detach,        rk_pwm_detach),
 380
 381         /* ofw_bus interface */
 382         DEVMETHOD(ofw_bus_get_node,     aw_pwm_get_node),
 383
 384         /* pwm interface */
 385         DEVMETHOD(pwmbus_channel_count,         rk_pwm_channel_count),
 386         DEVMETHOD(pwmbus_channel_config,        rk_pwm_channel_config),
 387         DEVMETHOD(pwmbus_channel_get_config,    rk_pwm_channel_get_config),
 388         DEVMETHOD(pwmbus_channel_enable,        rk_pwm_channel_enable),
 389         DEVMETHOD(pwmbus_channel_is_enabled,    rk_pwm_channel_is_enabled),
 390
 391         DEVMETHOD_END
 392 };
 393
 394 static driver_t rk_pwm_driver = {
 395         "pwm",
 396         rk_pwm_methods,
 397         sizeof(struct rk_pwm_softc),
 398 };
 399
 400 static devclass_t rk_pwm_devclass;
 401
 402 DRIVER_MODULE(rk_pwm, simplebus, rk_pwm_driver, rk_pwm_devclass, 0, 0);
 403 SIMPLEBUS_PNP_INFO(compat_data);