sys/boot/fdt/dts/arm/sun7i-a20-hdmi.dtsi

   1 /*-
   2  * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 / {
  30         clocks {
  31                 hdmi_clk: clk@01c20150 {
  32                         #clock-cells = <0>;
  33                         compatible = "allwinner,sun4i-a10-hdmi-clk";
  34                         reg = <0x01c20150 0x4>;
  35                         clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
  36                         clock-output-names = "hdmi";
  37                 };
  38
  39                 lcd0_ch0_clk: clk@01c20118 {
  40                         #clock-cells = <0>;
  41                         #reset-cells = <0>;
  42                         compatible = "allwinner,sun4i-a10-lcd-ch0-clk";
  43                         reg = <0x01c20118 0x4>;
  44                         clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll6 2>;
  45                         clock-output-names = "lcd0_ch0";
  46                 };
  47
  48                 lcd0_ch1_clk: clk@01c2012c {
  49                         #clock-cells = <1>;
  50                         compatible = "allwinner,sun4i-a10-lcd-ch1-clk";
  51                         reg = <0x01c2012c 0x4>;
  52                         clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
  53                         clock-output-names = "lcd0_ch1_sclk1",
  54                                              "lcd0_ch1_sclk2";
  55                 };
  56
  57                 de_be0_clk: clk@01c20104 {
  58                         #clock-cells = <0>;
  59                         #reset-cells = <0>;
  60                         compatible = "allwinner,sun4i-a10-de-be-clk";
  61                         reg = <0x01c20104 0x4>;
  62                         clocks = <&pll3>, <&pll7>, <&pll5 1>;
  63                         clock-output-names = "de_be0";
  64                 };
  65         };
  66
  67         soc@01c00000 {
  68                 hdmi: hdmi@01c16000 {
  69                         compatible = "allwinner,sun7i-a20-hdmi";
  70                         reg = <0x01c16000 0x1000>;
  71                         clocks = <&ahb_gates 43>, <&hdmi_clk>,
  72                                  <&lcd0_ch1_clk 1>;
  73                         clock-names = "ahb", "hdmi",
  74                                       "lcd";
  75                         status = "disabled";
  76                 };
  77
  78                 hdmiaudio {
  79                         compatible = "allwinner,sun7i-a20-hdmiaudio";
  80                         status = "disabled";
  81                 };
  82
  83                 fb: fb@01e60000 {
  84                         compatible = "allwinner,sun7i-a20-fb";
  85                         reg = <0x01e60000 0x10000>,     /* DEBE0 */
  86                               <0x01c0c000 0x1000>;      /* LCD0 */
  87                         clocks = <&ahb_gates 44>, <&dram_gates 26>,
  88                                  <&de_be0_clk>, <&ahb_gates 36>,
  89                                  <&lcd0_ch1_clk 0>, <&lcd0_ch1_clk 1>;
  90                         clock-names = "ahb_de_be", "dram_de_be",
  91                                       "de_be", "ahb_lcd",
  92                                       "lcd_ch1_sclk1", "lcd_ch1_sclk2";
  93                         resets = <&de_be0_clk>, <&lcd0_ch0_clk>;
  94                         reset-names = "de_be", "lcd";
  95                 };
  96         };
  97 };