2 * Copyright (c) 2010 The FreeBSD Foundation
5 * This software was developed by Semihalf under sponsorship from
6 * the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * Marvell DB-88F5182 Device Tree Source.
37 model = "mrvl,DB-88F5182";
38 compatible = "DB-88F5182-BP", "DB-88F5182-BP-A";
55 compatible = "ARM,88FR531";
57 d-cache-line-size = <32>; // 32 bytes
58 i-cache-line-size = <32>; // 32 bytes
59 d-cache-size = <0x8000>; // L1, 32K
60 i-cache-size = <0x8000>; // L1, 32K
61 timebase-frequency = <0>;
63 clock-frequency = <0>;
68 device_type = "memory";
69 reg = <0x0 0x08000000>; // 128M at 0x0
75 compatible = "mrvl,lbc";
77 /* This reflects CPU decode windows setup. */
78 ranges = <0x0 0x0f 0xf9300000 0x00100000
79 0x1 0x1e 0xfa000000 0x00100000
80 0x2 0x1d 0xfa100000 0x02000000>;
85 compatible = "cfi-flash";
86 reg = <0x0 0x0 0x00100000>;
95 reg = <0x1 0x0 0x00100000>;
101 compatible = "cfi-flash";
102 reg = <0x2 0x0 0x02000000>;
108 soc88f5182@f1000000 {
109 #address-cells = <1>;
111 compatible = "simple-bus";
112 ranges = <0x0 0xf1000000 0x00100000>;
116 interrupt-controller;
117 #address-cells = <0>;
118 #interrupt-cells = <1>;
119 reg = <0x20200 0x3c>;
120 compatible = "mrvl,pic";
124 compatible = "mrvl,timer";
125 reg = <0x20300 0x30>;
127 interrupt-parent = <&PIC>;
133 compatible = "mrvl,mpp";
134 reg = <0x10000 0x54>;
137 0 3 /* MPP[0]: GPIO[0] */
138 2 2 /* MPP[2]: PCI_REQn[3] */
139 3 2 /* MPP[3]: PCI_GNTn[3] */
140 4 2 /* MPP[4]: PCI_REQn[4] */
141 5 2 /* MPP[5]: PCI_GNTn[4] */
142 6 5 /* MPP[6]: SATA0_ACT */
143 7 5 /* MPP[7]: SATA1_ACT */
144 12 5 /* MPP[12]: SATA0_PRESENT */
145 13 5 /* MPP[13]: SATA1_PRESENT */
146 14 4 /* MPP[14]: NAND Flash REn[2] */
147 15 4 /* MPP[15]: NAND Flash WEn[2] */
148 16 0 /* MPP[16]: UA1_RXD */
149 17 0 /* MPP[17]: UA1_TXD */
150 18 0 /* MPP[18]: UA1_CTS */
151 19 0 >; /* MPP[19]: UA1_RTS */
156 compatible = "mrvl,gpio";
157 reg = <0x10100 0x20>;
159 interrupts = <6 7 8 9>;
160 interrupt-parent = <&PIC>;
164 #address-cells = <1>;
166 compatible = "mrvl,twsi";
167 reg = <0x11000 0x20>;
169 interrupt-parent = <&PIC>;
172 enet0: ethernet@72000 {
173 #address-cells = <1>;
176 compatible = "mrvl,ge";
177 reg = <0x72000 0x2000>;
178 ranges = <0x0 0x72000 0x2000>;
179 local-mac-address = [ 00 00 00 00 00 00 ];
180 interrupts = <18 19 20 21 22>;
181 interrupt-parent = <&PIC>;
184 serial0: serial@12000 {
185 compatible = "ns16550";
186 reg = <0x12000 0x20>;
188 clock-frequency = <0>;
190 interrupt-parent = <&PIC>;
193 serial1: serial@12100 {
194 compatible = "ns16550";
195 reg = <0x12100 0x20>;
197 clock-frequency = <0>;
199 interrupt-parent = <&PIC>;
203 compatible = "mrvl,usb-ehci", "usb-ehci";
204 reg = <0x50000 0x1000>;
205 interrupts = <17 16>;
206 interrupt-parent = <&PIC>;
210 compatible = "mrvl,idma";
211 reg = <0x60000 0x1000>;
212 interrupts = <24 25 26 27 23>;
213 interrupt-parent = <&PIC>;
217 compatible = "mrvl,sata";
218 reg = <0x80000 0x6000>;
220 interrupt-parent = <&PIC>;