2 * Data structures and definitions for CAM Control Blocks (CCBs).
4 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
6 * Copyright (c) 1997, 1998 Justin T. Gibbs.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions, and the following disclaimer,
14 * without modification, immediately at the beginning of the file.
15 * 2. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
22 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #ifndef _CAM_CAM_CCB_H
34 #define _CAM_CAM_CCB_H 1
36 #include <sys/queue.h>
37 #include <sys/cdefs.h>
39 #include <sys/limits.h>
41 #include <sys/callout.h>
43 #include <cam/cam_debug.h>
44 #include <cam/scsi/scsi_all.h>
45 #include <cam/ata/ata_all.h>
46 #include <cam/nvme/nvme_all.h>
47 #include <cam/mmc/mmc_all.h>
49 /* General allocation length definitions for CCB structures */
50 #define IOCDBLEN CAM_MAX_CDBLEN /* Space for CDB bytes/pointer */
51 #define VUHBALEN 14 /* Vendor Unique HBA length */
52 #define SIM_IDLEN 16 /* ASCII string len for SIM ID */
53 #define HBA_IDLEN 16 /* ASCII string len for HBA ID */
54 #define DEV_IDLEN 16 /* ASCII string len for device names */
55 #define CCB_PERIPH_PRIV_SIZE 2 /* size of peripheral private area */
56 #define CCB_SIM_PRIV_SIZE 2 /* size of sim private area */
58 /* Struct definitions for CAM control blocks */
60 /* Common CCB header */
63 CAM_CDB_POINTER = 0x00000001,/* The CDB field is a pointer */
64 CAM_unused1 = 0x00000002,
65 CAM_unused2 = 0x00000004,
66 CAM_NEGOTIATE = 0x00000008,/*
67 * Perform transport negotiation
70 CAM_DATA_ISPHYS = 0x00000010,/* Data type with physical addrs */
71 CAM_DIS_AUTOSENSE = 0x00000020,/* Disable autosense feature */
72 CAM_DIR_BOTH = 0x00000000,/* Data direction (00:IN/OUT) */
73 CAM_DIR_IN = 0x00000040,/* Data direction (01:DATA IN) */
74 CAM_DIR_OUT = 0x00000080,/* Data direction (10:DATA OUT) */
75 CAM_DIR_NONE = 0x000000C0,/* Data direction (11:no data) */
76 CAM_DIR_MASK = 0x000000C0,/* Data direction Mask */
77 CAM_DATA_VADDR = 0x00000000,/* Data type (000:Virtual) */
78 CAM_DATA_PADDR = 0x00000010,/* Data type (001:Physical) */
79 CAM_DATA_SG = 0x00040000,/* Data type (010:sglist) */
80 CAM_DATA_SG_PADDR = 0x00040010,/* Data type (011:sglist phys) */
81 CAM_DATA_BIO = 0x00200000,/* Data type (100:bio) */
82 CAM_DATA_MASK = 0x00240010,/* Data type mask */
83 CAM_unused3 = 0x00000100,
84 CAM_unused4 = 0x00000200,
85 CAM_DEV_QFRZDIS = 0x00000400,/* Disable DEV Q freezing */
86 CAM_DEV_QFREEZE = 0x00000800,/* Freeze DEV Q on execution */
87 CAM_HIGH_POWER = 0x00001000,/* Command takes a lot of power */
88 CAM_SENSE_PTR = 0x00002000,/* Sense data is a pointer */
89 CAM_SENSE_PHYS = 0x00004000,/* Sense pointer is physical addr*/
90 CAM_TAG_ACTION_VALID = 0x00008000,/* Use the tag action in this ccb*/
91 CAM_PASS_ERR_RECOVER = 0x00010000,/* Pass driver does err. recovery*/
92 CAM_DIS_DISCONNECT = 0x00020000,/* Disable disconnect */
93 CAM_unused5 = 0x00080000,
94 CAM_unused6 = 0x00100000,
95 CAM_CDB_PHYS = 0x00400000,/* CDB poiner is physical */
96 CAM_unused7 = 0x00800000,
98 /* Phase cognizant mode flags */
99 CAM_unused8 = 0x01000000,
100 CAM_unused9 = 0x02000000,
101 CAM_unused10 = 0x04000000,
102 CAM_unused11 = 0x08000000,
103 CAM_unused12 = 0x10000000,
104 CAM_unused13 = 0x20000000,
105 CAM_unused14 = 0x40000000,
107 /* Host target Mode flags */
108 CAM_SEND_SENSE = 0x08000000,/* Send sense data with status */
109 CAM_unused15 = 0x10000000,
110 CAM_unused16 = 0x20000000,
111 CAM_SEND_STATUS = 0x40000000,/* Send status after data phase */
113 CAM_UNLOCKED = 0x80000000 /* Call callback without lock. */
117 CAM_USER_DATA_ADDR = 0x00000002,/* Userspace data pointers */
118 CAM_SG_FORMAT_IOVEC = 0x00000004,/* iovec instead of busdma S/G*/
119 CAM_UNMAPPED_BUF = 0x00000008 /* use unmapped I/O */
122 /* XPT Opcodes for xpt_action */
124 /* Function code flags are bits greater than 0xff */
125 XPT_FC_QUEUED = 0x100,
126 /* Non-immediate function code */
127 XPT_FC_USER_CCB = 0x200,
128 XPT_FC_XPT_ONLY = 0x400,
129 /* Only for the transport layer device */
130 XPT_FC_DEV_QUEUED = 0x800 | XPT_FC_QUEUED,
131 /* Passes through the device queues */
132 /* Common function commands: 0x00->0x0F */
134 /* Execute Nothing */
135 XPT_SCSI_IO = 0x01 | XPT_FC_DEV_QUEUED,
136 /* Execute the requested I/O operation */
137 XPT_GDEV_TYPE = 0x02,
138 /* Get type information for specified device */
140 /* Get a list of peripheral devices */
142 /* Path routing inquiry */
144 /* Release a frozen device queue */
145 XPT_SASYNC_CB = 0x06,
146 /* Set Asynchronous Callback Parameters */
147 XPT_SDEV_TYPE = 0x07,
148 /* Set device type information */
149 XPT_SCAN_BUS = 0x08 | XPT_FC_QUEUED | XPT_FC_USER_CCB
151 /* (Re)Scan the SCSI Bus */
152 XPT_DEV_MATCH = 0x09 | XPT_FC_XPT_ONLY,
153 /* Get EDT entries matching the given pattern */
155 /* Turn on debugging for a bus, target or lun */
156 XPT_PATH_STATS = 0x0b,
157 /* Path statistics (error counts, etc.) */
158 XPT_GDEV_STATS = 0x0c,
159 /* Device statistics (error counts, etc.) */
160 XPT_DEV_ADVINFO = 0x0e,
161 /* Get/Set Device advanced information */
162 XPT_ASYNC = 0x0f | XPT_FC_QUEUED | XPT_FC_USER_CCB
164 /* Asynchronous event */
165 /* SCSI Control Functions: 0x10->0x1F */
167 /* Abort the specified CCB */
168 XPT_RESET_BUS = 0x11 | XPT_FC_XPT_ONLY,
169 /* Reset the specified SCSI bus */
170 XPT_RESET_DEV = 0x12 | XPT_FC_DEV_QUEUED,
171 /* Bus Device Reset the specified SCSI device */
173 /* Terminate the I/O process */
174 XPT_SCAN_LUN = 0x14 | XPT_FC_QUEUED | XPT_FC_USER_CCB
176 /* Scan Logical Unit */
177 XPT_GET_TRAN_SETTINGS = 0x15,
179 * Get default/user transfer settings
182 XPT_SET_TRAN_SETTINGS = 0x16,
184 * Set transfer rate/width
185 * negotiation settings
187 XPT_CALC_GEOMETRY = 0x17,
189 * Calculate the geometry parameters for
190 * a device give the sector size and
193 XPT_ATA_IO = 0x18 | XPT_FC_DEV_QUEUED,
194 /* Execute the requested ATA I/O operation */
196 XPT_GET_SIM_KNOB_OLD = 0x18, /* Compat only */
198 XPT_SET_SIM_KNOB = 0x19,
200 * Set SIM specific knob values.
203 XPT_GET_SIM_KNOB = 0x1a,
205 * Get SIM specific knob values.
208 XPT_SMP_IO = 0x1b | XPT_FC_DEV_QUEUED,
209 /* Serial Management Protocol */
211 XPT_NVME_IO = 0x1c | XPT_FC_DEV_QUEUED,
212 /* Execute the requested NVMe I/O operation */
214 XPT_MMC_IO = 0x1d | XPT_FC_DEV_QUEUED,
215 /* Placeholder for MMC / SD / SDIO I/O stuff */
217 XPT_SCAN_TGT = 0x1e | XPT_FC_QUEUED | XPT_FC_USER_CCB
221 XPT_NVME_ADMIN = 0x1f | XPT_FC_DEV_QUEUED,
222 /* Execute the requested NVMe Admin operation */
224 /* HBA engine commands 0x20->0x2F */
225 XPT_ENG_INQ = 0x20 | XPT_FC_XPT_ONLY,
226 /* HBA engine feature inquiry */
227 XPT_ENG_EXEC = 0x21 | XPT_FC_DEV_QUEUED,
228 /* HBA execute engine request */
230 /* Target mode commands: 0x30->0x3F */
232 /* Enable LUN as a target */
233 XPT_TARGET_IO = 0x31 | XPT_FC_DEV_QUEUED,
234 /* Execute target I/O request */
235 XPT_ACCEPT_TARGET_IO = 0x32 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
236 /* Accept Host Target Mode CDB */
237 XPT_CONT_TARGET_IO = 0x33 | XPT_FC_DEV_QUEUED,
238 /* Continue Host Target I/O Connection */
239 XPT_IMMED_NOTIFY = 0x34 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
240 /* Notify Host Target driver of event (obsolete) */
241 XPT_NOTIFY_ACK = 0x35,
242 /* Acknowledgement of event (obsolete) */
243 XPT_IMMEDIATE_NOTIFY = 0x36 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
244 /* Notify Host Target driver of event */
245 XPT_NOTIFY_ACKNOWLEDGE = 0x37 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
246 /* Acknowledgement of event */
247 XPT_REPROBE_LUN = 0x38 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
248 /* Query device capacity and notify GEOM */
250 /* Vendor Unique codes: 0x80->0x8F */
254 #define XPT_FC_GROUP_MASK 0xF0
255 #define XPT_FC_GROUP(op) ((op) & XPT_FC_GROUP_MASK)
256 #define XPT_FC_GROUP_COMMON 0x00
257 #define XPT_FC_GROUP_SCSI_CONTROL 0x10
258 #define XPT_FC_GROUP_HBA_ENGINE 0x20
259 #define XPT_FC_GROUP_TMODE 0x30
260 #define XPT_FC_GROUP_VENDOR_UNIQUE 0x80
262 #define XPT_FC_IS_DEV_QUEUED(ccb) \
263 (((ccb)->ccb_h.func_code & XPT_FC_DEV_QUEUED) == XPT_FC_DEV_QUEUED)
264 #define XPT_FC_IS_QUEUED(ccb) \
265 (((ccb)->ccb_h.func_code & XPT_FC_QUEUED) != 0)
270 PROTO_SCSI, /* Small Computer System Interface */
271 PROTO_ATA, /* AT Attachment */
272 PROTO_ATAPI, /* AT Attachment Packetized Interface */
273 PROTO_SATAPM, /* SATA Port Multiplier */
274 PROTO_SEMB, /* SATA Enclosure Management Bridge */
275 PROTO_NVME, /* NVME */
276 PROTO_MMCSD, /* MMC, SD, SDIO */
282 XPORT_SPI, /* SCSI Parallel Interface */
283 XPORT_FC, /* Fiber Channel */
284 XPORT_SSA, /* Serial Storage Architecture */
285 XPORT_USB, /* Universal Serial Bus */
286 XPORT_PPB, /* Parallel Port Bus */
287 XPORT_ATA, /* AT Attachment */
288 XPORT_SAS, /* Serial Attached SCSI */
289 XPORT_SATA, /* Serial AT Attachment */
290 XPORT_ISCSI, /* iSCSI */
291 XPORT_SRP, /* SCSI RDMA Protocol */
292 XPORT_NVME, /* NVMe over PCIe */
293 XPORT_MMCSD, /* MMC, SD, SDIO card */
296 #define XPORT_IS_NVME(t) ((t) == XPORT_NVME)
297 #define XPORT_IS_ATA(t) ((t) == XPORT_ATA || (t) == XPORT_SATA)
298 #define XPORT_IS_SCSI(t) ((t) != XPORT_UNKNOWN && \
299 (t) != XPORT_UNSPECIFIED && \
300 !XPORT_IS_ATA(t) && !XPORT_IS_NVME(t))
301 #define XPORT_DEVSTAT_TYPE(t) (XPORT_IS_ATA(t) ? DEVSTAT_TYPE_IF_IDE : \
302 XPORT_IS_SCSI(t) ? DEVSTAT_TYPE_IF_SCSI : \
303 DEVSTAT_TYPE_IF_OTHER)
305 #define PROTO_VERSION_UNKNOWN (UINT_MAX - 1)
306 #define PROTO_VERSION_UNSPECIFIED UINT_MAX
307 #define XPORT_VERSION_UNKNOWN (UINT_MAX - 1)
308 #define XPORT_VERSION_UNSPECIFIED UINT_MAX
311 LIST_ENTRY(ccb_hdr) le;
312 SLIST_ENTRY(ccb_hdr) sle;
313 TAILQ_ENTRY(ccb_hdr) tqe;
314 STAILQ_ENTRY(ccb_hdr) stqe;
320 u_int8_t bytes[sizeof(uintptr_t)];
324 ccb_priv_entry entries[CCB_PERIPH_PRIV_SIZE];
325 u_int8_t bytes[CCB_PERIPH_PRIV_SIZE * sizeof(ccb_priv_entry)];
329 ccb_priv_entry entries[CCB_SIM_PRIV_SIZE];
330 u_int8_t bytes[CCB_SIM_PRIV_SIZE * sizeof(ccb_priv_entry)];
334 struct timeval *etime;
336 uintptr_t periph_data;
340 cam_pinfo pinfo; /* Info for priority scheduling */
341 camq_entry xpt_links; /* For chaining in the XPT layer */
342 camq_entry sim_links; /* For chaining in the SIM layer */
343 camq_entry periph_links; /* For chaining in the type driver */
344 u_int32_t retry_count;
345 void (*cbfcnp)(struct cam_periph *, union ccb *);
346 /* Callback on completion function */
347 xpt_opcode func_code; /* XPT function code */
348 u_int32_t status; /* Status returned by CAM subsystem */
349 struct cam_path *path; /* Compiled path for this ccb */
350 path_id_t path_id; /* Path ID for the request */
351 target_id_t target_id; /* Target device ID */
352 lun_id_t target_lun; /* Target LUN number */
353 u_int32_t flags; /* ccb_flags */
354 u_int32_t xflags; /* Extended flags */
355 ccb_ppriv_area periph_priv;
356 ccb_spriv_area sim_priv;
358 u_int32_t timeout; /* Hard timeout value in mseconds */
359 struct timeval softtimeout; /* Soft timeout value in sec + usec */
362 /* Get Device Information CCB */
364 struct ccb_hdr ccb_h;
366 struct scsi_inquiry_data inq_data;
367 struct ata_params ident_data;
368 u_int8_t serial_num[252];
370 u_int8_t serial_num_len;
374 /* Device Statistics CCB */
375 struct ccb_getdevstats {
376 struct ccb_hdr ccb_h;
377 int dev_openings; /* Space left for more work on device*/
378 int dev_active; /* Transactions running on the device */
379 int allocated; /* CCBs allocated for the device */
380 int queued; /* CCBs queued to be sent to the device */
382 * CCBs held by peripheral drivers
386 * Boundary conditions for number of
390 struct timeval last_reset; /* Time of last bus reset/loop init */
394 CAM_GDEVLIST_LAST_DEVICE,
395 CAM_GDEVLIST_LIST_CHANGED,
396 CAM_GDEVLIST_MORE_DEVS,
398 } ccb_getdevlist_status_e;
400 struct ccb_getdevlist {
401 struct ccb_hdr ccb_h;
402 char periph_name[DEV_IDLEN];
403 u_int32_t unit_number;
404 unsigned int generation;
406 ccb_getdevlist_status_e status;
410 PERIPH_MATCH_NONE = 0x000,
411 PERIPH_MATCH_PATH = 0x001,
412 PERIPH_MATCH_TARGET = 0x002,
413 PERIPH_MATCH_LUN = 0x004,
414 PERIPH_MATCH_NAME = 0x008,
415 PERIPH_MATCH_UNIT = 0x010,
416 PERIPH_MATCH_ANY = 0x01f
417 } periph_pattern_flags;
419 struct periph_match_pattern {
420 char periph_name[DEV_IDLEN];
421 u_int32_t unit_number;
423 target_id_t target_id;
425 periph_pattern_flags flags;
429 DEV_MATCH_NONE = 0x000,
430 DEV_MATCH_PATH = 0x001,
431 DEV_MATCH_TARGET = 0x002,
432 DEV_MATCH_LUN = 0x004,
433 DEV_MATCH_INQUIRY = 0x008,
434 DEV_MATCH_DEVID = 0x010,
435 DEV_MATCH_ANY = 0x00f
438 struct device_id_match_pattern {
443 struct device_match_pattern {
445 target_id_t target_id;
447 dev_pattern_flags flags;
449 struct scsi_static_inquiry_pattern inq_pat;
450 struct device_id_match_pattern devid_pat;
455 BUS_MATCH_NONE = 0x000,
456 BUS_MATCH_PATH = 0x001,
457 BUS_MATCH_NAME = 0x002,
458 BUS_MATCH_UNIT = 0x004,
459 BUS_MATCH_BUS_ID = 0x008,
460 BUS_MATCH_ANY = 0x00f
463 struct bus_match_pattern {
465 char dev_name[DEV_IDLEN];
466 u_int32_t unit_number;
468 bus_pattern_flags flags;
471 union match_pattern {
472 struct periph_match_pattern periph_pattern;
473 struct device_match_pattern device_pattern;
474 struct bus_match_pattern bus_pattern;
483 struct dev_match_pattern {
485 union match_pattern pattern;
488 struct periph_match_result {
489 char periph_name[DEV_IDLEN];
490 u_int32_t unit_number;
492 target_id_t target_id;
497 DEV_RESULT_NOFLAG = 0x00,
498 DEV_RESULT_UNCONFIGURED = 0x01
501 struct device_match_result {
503 target_id_t target_id;
506 struct scsi_inquiry_data inq_data;
507 struct ata_params ident_data;
508 dev_result_flags flags;
511 struct bus_match_result {
513 char dev_name[DEV_IDLEN];
514 u_int32_t unit_number;
519 struct periph_match_result periph_result;
520 struct device_match_result device_result;
521 struct bus_match_result bus_result;
524 struct dev_match_result {
526 union match_result result;
532 CAM_DEV_MATCH_LIST_CHANGED,
533 CAM_DEV_MATCH_SIZE_ERROR,
535 } ccb_dev_match_status;
538 CAM_DEV_POS_NONE = 0x000,
539 CAM_DEV_POS_BUS = 0x001,
540 CAM_DEV_POS_TARGET = 0x002,
541 CAM_DEV_POS_DEVICE = 0x004,
542 CAM_DEV_POS_PERIPH = 0x008,
543 CAM_DEV_POS_PDPTR = 0x010,
544 CAM_DEV_POS_TYPEMASK = 0xf00,
545 CAM_DEV_POS_EDT = 0x100,
546 CAM_DEV_POS_PDRV = 0x200
549 struct ccb_dm_cookie {
557 struct ccb_dev_position {
558 u_int generations[4];
559 #define CAM_BUS_GENERATION 0x00
560 #define CAM_TARGET_GENERATION 0x01
561 #define CAM_DEV_GENERATION 0x02
562 #define CAM_PERIPH_GENERATION 0x03
563 dev_pos_type position_type;
564 struct ccb_dm_cookie cookie;
567 struct ccb_dev_match {
568 struct ccb_hdr ccb_h;
569 ccb_dev_match_status status;
570 u_int32_t num_patterns;
571 u_int32_t pattern_buf_len;
572 struct dev_match_pattern *patterns;
573 u_int32_t num_matches;
574 u_int32_t match_buf_len;
575 struct dev_match_result *matches;
576 struct ccb_dev_position pos;
580 * Definitions for the path inquiry CCB fields.
582 #define CAM_VERSION 0x19 /* Hex value for current version */
585 PI_MDP_ABLE = 0x80, /* Supports MDP message */
586 PI_WIDE_32 = 0x40, /* Supports 32 bit wide SCSI */
587 PI_WIDE_16 = 0x20, /* Supports 16 bit wide SCSI */
588 PI_SDTR_ABLE = 0x10, /* Supports SDTR message */
589 PI_LINKED_CDB = 0x08, /* Supports linked CDBs */
590 PI_SATAPM = 0x04, /* Supports SATA PM */
591 PI_TAG_ABLE = 0x02, /* Supports tag queue messages */
592 PI_SOFT_RST = 0x01 /* Supports soft reset alternative */
596 PIT_PROCESSOR = 0x80, /* Target mode processor mode */
597 PIT_PHASE = 0x40, /* Target mode phase cog. mode */
598 PIT_DISCONNECT = 0x20, /* Disconnects supported in target mode */
599 PIT_TERM_IO = 0x10, /* Terminate I/O message supported in TM */
600 PIT_GRP_6 = 0x08, /* Group 6 commands supported */
601 PIT_GRP_7 = 0x04 /* Group 7 commands supported */
605 PIM_ATA_EXT = 0x200,/* ATA requests can understand ata_ext requests */
606 PIM_EXTLUNS = 0x100,/* 64bit extended LUNs supported */
607 PIM_SCANHILO = 0x80, /* Bus scans from high ID to low ID */
608 PIM_NOREMOVE = 0x40, /* Removeable devices not included in scan */
609 PIM_NOINITIATOR = 0x20, /* Initiator role not supported. */
610 PIM_NOBUSRESET = 0x10, /* User has disabled initial BUS RESET */
611 PIM_NO_6_BYTE = 0x08, /* Do not send 6-byte commands */
612 PIM_SEQSCAN = 0x04, /* Do bus scans sequentially, not in parallel */
614 PIM_NOSCAN = 0x01 /* SIM does its own scanning */
617 /* Path Inquiry CCB */
618 struct ccb_pathinq_settings_spi {
619 u_int8_t ppr_options;
622 struct ccb_pathinq_settings_fc {
623 u_int64_t wwnn; /* world wide node name */
624 u_int64_t wwpn; /* world wide port name */
625 u_int32_t port; /* 24 bit port id, if known */
626 u_int32_t bitrate; /* Mbps */
629 struct ccb_pathinq_settings_sas {
630 u_int32_t bitrate; /* Mbps */
633 #define NVME_DEV_NAME_LEN 52
634 struct ccb_pathinq_settings_nvme {
635 uint32_t nsid; /* Namespace ID for this path */
641 char dev_name[NVME_DEV_NAME_LEN]; /* nvme controller dev name for this device */
643 _Static_assert(sizeof(struct ccb_pathinq_settings_nvme) == 64,
644 "ccb_pathinq_settings_nvme too big");
646 #define PATHINQ_SETTINGS_SIZE 128
649 struct ccb_hdr ccb_h;
650 u_int8_t version_num; /* Version number for the SIM/HBA */
651 u_int8_t hba_inquiry; /* Mimic of INQ byte 7 for the HBA */
652 u_int16_t target_sprt; /* Flags for target mode support */
653 u_int32_t hba_misc; /* Misc HBA features */
654 u_int16_t hba_eng_cnt; /* HBA engine count */
655 /* Vendor Unique capabilities */
656 u_int8_t vuhba_flags[VUHBALEN];
657 u_int32_t max_target; /* Maximum supported Target */
658 u_int32_t max_lun; /* Maximum supported Lun */
659 u_int32_t async_flags; /* Installed Async handlers */
660 path_id_t hpath_id; /* Highest Path ID in the subsystem */
661 target_id_t initiator_id; /* ID of the HBA on the SCSI bus */
662 char sim_vid[SIM_IDLEN]; /* Vendor ID of the SIM */
663 char hba_vid[HBA_IDLEN]; /* Vendor ID of the HBA */
664 char dev_name[DEV_IDLEN];/* Device name for SIM */
665 u_int32_t unit_number; /* Unit number for SIM */
666 u_int32_t bus_id; /* Bus ID for SIM */
667 u_int32_t base_transfer_speed;/* Base bus speed in KB/sec */
669 u_int protocol_version;
671 u_int transport_version;
673 struct ccb_pathinq_settings_spi spi;
674 struct ccb_pathinq_settings_fc fc;
675 struct ccb_pathinq_settings_sas sas;
676 struct ccb_pathinq_settings_nvme nvme;
677 char ccb_pathinq_settings_opaque[PATHINQ_SETTINGS_SIZE];
679 u_int maxio; /* Max supported I/O size, in bytes. */
680 u_int16_t hba_vendor; /* HBA vendor ID */
681 u_int16_t hba_device; /* HBA device ID */
682 u_int16_t hba_subvendor; /* HBA subvendor ID */
683 u_int16_t hba_subdevice; /* HBA subdevice ID */
686 /* Path Statistics CCB */
687 struct ccb_pathstats {
688 struct ccb_hdr ccb_h;
689 struct timeval last_reset; /* Time of last bus reset/loop init */
693 SMP_FLAG_NONE = 0x00,
694 SMP_FLAG_REQ_SG = 0x01,
695 SMP_FLAG_RSP_SG = 0x02
696 } ccb_smp_pass_flags;
699 * Serial Management Protocol CCB
700 * XXX Currently the semantics for this CCB are that it is executed either
701 * by the addressed device, or that device's parent (i.e. an expander for
702 * any device on an expander) if the addressed device doesn't support SMP.
703 * Later, once we have the ability to probe SMP-only devices and put them
704 * in CAM's topology, the CCB will only be executed by the addressed device
708 struct ccb_hdr ccb_h;
709 uint8_t *smp_request;
711 uint16_t smp_request_sglist_cnt;
712 uint8_t *smp_response;
713 int smp_response_len;
714 uint16_t smp_response_sglist_cnt;
715 ccb_smp_pass_flags flags;
719 u_int8_t *sense_ptr; /*
721 * for sense information
723 /* Storage Area for sense information */
724 struct scsi_sense_data sense_buf;
728 u_int8_t *cdb_ptr; /* Pointer to the CDB bytes to send */
729 /* Area for the CDB send */
730 u_int8_t cdb_bytes[IOCDBLEN];
734 * SCSI I/O Request CCB used for the XPT_SCSI_IO and XPT_CONT_TARGET_IO
738 struct ccb_hdr ccb_h;
739 union ccb *next_ccb; /* Ptr for next CCB for action */
740 u_int8_t *req_map; /* Ptr to mapping info */
741 u_int8_t *data_ptr; /* Ptr to the data buf/SG list */
742 u_int32_t dxfer_len; /* Data transfer length */
743 /* Autosense storage */
744 struct scsi_sense_data sense_data;
745 u_int8_t sense_len; /* Number of bytes to autosense */
746 u_int8_t cdb_len; /* Number of bytes for the CDB */
747 u_int16_t sglist_cnt; /* Number of SG list entries */
748 u_int8_t scsi_status; /* Returned SCSI status */
749 u_int8_t sense_resid; /* Autosense resid length: 2's comp */
750 u_int32_t resid; /* Transfer residual length: 2's comp */
751 cdb_t cdb_io; /* Union for CDB bytes/pointer */
752 u_int8_t *msg_ptr; /* Pointer to the message buffer */
753 u_int16_t msg_len; /* Number of bytes for the Message */
754 u_int8_t tag_action; /* What to do for tag queueing */
756 * The tag action should be either the define below (to send a
757 * non-tagged transaction) or one of the defined scsi tag messages
758 * from scsi_message.h.
760 #define CAM_TAG_ACTION_NONE 0x00
761 uint8_t priority; /* Command priority for SIMPLE tag */
762 u_int tag_id; /* tag id from initator (target mode) */
763 u_int init_id; /* initiator id of who selected */
764 #if defined(BUF_TRACKING) || defined(FULL_BUF_TRACKING)
765 struct bio *bio; /* Associated bio */
769 static __inline uint8_t *
770 scsiio_cdb_ptr(struct ccb_scsiio *ccb)
772 return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ?
773 ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes);
777 * ATA I/O Request CCB used for the XPT_ATA_IO function code.
780 struct ccb_hdr ccb_h;
781 union ccb *next_ccb; /* Ptr for next CCB for action */
782 struct ata_cmd cmd; /* ATA command register set */
783 struct ata_res res; /* ATA result register set */
784 u_int8_t *data_ptr; /* Ptr to the data buf/SG list */
785 u_int32_t dxfer_len; /* Data transfer length */
786 u_int32_t resid; /* Transfer residual length: 2's comp */
787 u_int8_t ata_flags; /* Flags for the rest of the buffer */
788 #define ATA_FLAG_AUX 0x1
789 #define ATA_FLAG_ICC 0x2
790 uint8_t icc; /* Isochronous Command Completion */
796 * MMC I/O Request CCB used for the XPT_MMC_IO function code.
799 struct ccb_hdr ccb_h;
800 union ccb *next_ccb; /* Ptr for next CCB for action */
801 struct mmc_command cmd;
802 struct mmc_command stop;
805 struct ccb_accept_tio {
806 struct ccb_hdr ccb_h;
807 cdb_t cdb_io; /* Union for CDB bytes/pointer */
808 u_int8_t cdb_len; /* Number of bytes for the CDB */
809 u_int8_t tag_action; /* What to do for tag queueing */
810 u_int8_t sense_len; /* Number of bytes of Sense Data */
811 uint8_t priority; /* Command priority for SIMPLE tag */
812 u_int tag_id; /* tag id from initator (target mode) */
813 u_int init_id; /* initiator id of who selected */
814 struct scsi_sense_data sense_data;
817 static __inline uint8_t *
818 atio_cdb_ptr(struct ccb_accept_tio *ccb)
820 return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ?
821 ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes);
824 /* Release SIM Queue */
826 struct ccb_hdr ccb_h;
827 u_int32_t release_flags;
828 #define RELSIM_ADJUST_OPENINGS 0x01
829 #define RELSIM_RELEASE_AFTER_TIMEOUT 0x02
830 #define RELSIM_RELEASE_AFTER_CMDCMPLT 0x04
831 #define RELSIM_RELEASE_AFTER_QEMPTY 0x08
833 u_int32_t release_timeout; /* Abstract argument. */
834 u_int32_t qfrozen_cnt;
838 * NVMe I/O Request CCB used for the XPT_NVME_IO and XPT_NVME_ADMIN function codes.
841 struct ccb_hdr ccb_h;
842 union ccb *next_ccb; /* Ptr for next CCB for action */
843 struct nvme_command cmd; /* NVME command, per NVME standard */
844 struct nvme_completion cpl; /* NVME completion, per NVME standard */
845 uint8_t *data_ptr; /* Ptr to the data buf/SG list */
846 uint32_t dxfer_len; /* Data transfer length */
847 uint16_t sglist_cnt; /* Number of SG list entries */
848 uint16_t unused; /* padding for removed uint32_t */
852 * Definitions for the asynchronous callback CCB fields.
855 AC_UNIT_ATTENTION = 0x4000,/* Device reported UNIT ATTENTION */
856 AC_ADVINFO_CHANGED = 0x2000,/* Advance info might have changes */
857 AC_CONTRACT = 0x1000,/* A contractual callback */
858 AC_GETDEV_CHANGED = 0x800,/* Getdev info might have changed */
859 AC_INQ_CHANGED = 0x400,/* Inquiry info might have changed */
860 AC_TRANSFER_NEG = 0x200,/* New transfer settings in effect */
861 AC_LOST_DEVICE = 0x100,/* A device went away */
862 AC_FOUND_DEVICE = 0x080,/* A new device was found */
863 AC_PATH_DEREGISTERED = 0x040,/* A path has de-registered */
864 AC_PATH_REGISTERED = 0x020,/* A new path has been registered */
865 AC_SENT_BDR = 0x010,/* A BDR message was sent to target */
866 AC_SCSI_AEN = 0x008,/* A SCSI AEN has been received */
867 AC_UNSOL_RESEL = 0x002,/* Unsolicited reselection occurred */
868 AC_BUS_RESET = 0x001 /* A SCSI bus reset occurred */
871 typedef void ac_callback_t (void *softc, u_int32_t code,
872 struct cam_path *path, void *args);
875 * Generic Asynchronous callbacks.
877 * Generic arguments passed bac which are then interpreted between a per-system
880 #define AC_CONTRACT_DATA_MAX (128 - sizeof (u_int64_t))
882 u_int64_t contract_number;
883 u_int8_t contract_data[AC_CONTRACT_DATA_MAX];
886 #define AC_CONTRACT_DEV_CHG 1
887 struct ac_device_changed {
894 /* Set Asynchronous Callback CCB */
895 struct ccb_setasync {
896 struct ccb_hdr ccb_h;
897 u_int32_t event_enable; /* Async Event enables */
898 ac_callback_t *callback;
902 /* Set Device Type CCB */
904 struct ccb_hdr ccb_h;
905 u_int8_t dev_type; /* Value for dev type field in EDT */
908 /* SCSI Control Functions */
910 /* Abort XPT request CCB */
912 struct ccb_hdr ccb_h;
913 union ccb *abort_ccb; /* Pointer to CCB to abort */
916 /* Reset SCSI Bus CCB */
917 struct ccb_resetbus {
918 struct ccb_hdr ccb_h;
921 /* Reset SCSI Device CCB */
922 struct ccb_resetdev {
923 struct ccb_hdr ccb_h;
926 /* Terminate I/O Process Request CCB */
928 struct ccb_hdr ccb_h;
929 union ccb *termio_ccb; /* Pointer to CCB to terminate */
933 CTS_TYPE_CURRENT_SETTINGS,
934 CTS_TYPE_USER_SETTINGS
937 struct ccb_trans_settings_scsi
939 u_int valid; /* Which fields to honor */
940 #define CTS_SCSI_VALID_TQ 0x01
942 #define CTS_SCSI_FLAGS_TAG_ENB 0x01
945 struct ccb_trans_settings_ata
947 u_int valid; /* Which fields to honor */
948 #define CTS_ATA_VALID_TQ 0x01
950 #define CTS_ATA_FLAGS_TAG_ENB 0x01
953 struct ccb_trans_settings_spi
955 u_int valid; /* Which fields to honor */
956 #define CTS_SPI_VALID_SYNC_RATE 0x01
957 #define CTS_SPI_VALID_SYNC_OFFSET 0x02
958 #define CTS_SPI_VALID_BUS_WIDTH 0x04
959 #define CTS_SPI_VALID_DISC 0x08
960 #define CTS_SPI_VALID_PPR_OPTIONS 0x10
962 #define CTS_SPI_FLAGS_DISC_ENB 0x01
969 struct ccb_trans_settings_fc {
970 u_int valid; /* Which fields to honor */
971 #define CTS_FC_VALID_WWNN 0x8000
972 #define CTS_FC_VALID_WWPN 0x4000
973 #define CTS_FC_VALID_PORT 0x2000
974 #define CTS_FC_VALID_SPEED 0x1000
975 u_int64_t wwnn; /* world wide node name */
976 u_int64_t wwpn; /* world wide port name */
977 u_int32_t port; /* 24 bit port id, if known */
978 u_int32_t bitrate; /* Mbps */
981 struct ccb_trans_settings_sas {
982 u_int valid; /* Which fields to honor */
983 #define CTS_SAS_VALID_SPEED 0x1000
984 u_int32_t bitrate; /* Mbps */
987 struct ccb_trans_settings_pata {
988 u_int valid; /* Which fields to honor */
989 #define CTS_ATA_VALID_MODE 0x01
990 #define CTS_ATA_VALID_BYTECOUNT 0x02
991 #define CTS_ATA_VALID_ATAPI 0x20
992 #define CTS_ATA_VALID_CAPS 0x40
994 u_int bytecount; /* Length of PIO transaction */
995 u_int atapi; /* Length of ATAPI CDB */
996 u_int caps; /* Device and host SATA caps. */
997 #define CTS_ATA_CAPS_H 0x0000ffff
998 #define CTS_ATA_CAPS_H_DMA48 0x00000001 /* 48-bit DMA */
999 #define CTS_ATA_CAPS_D 0xffff0000
1002 struct ccb_trans_settings_sata {
1003 u_int valid; /* Which fields to honor */
1004 #define CTS_SATA_VALID_MODE 0x01
1005 #define CTS_SATA_VALID_BYTECOUNT 0x02
1006 #define CTS_SATA_VALID_REVISION 0x04
1007 #define CTS_SATA_VALID_PM 0x08
1008 #define CTS_SATA_VALID_TAGS 0x10
1009 #define CTS_SATA_VALID_ATAPI 0x20
1010 #define CTS_SATA_VALID_CAPS 0x40
1011 int mode; /* Legacy PATA mode */
1012 u_int bytecount; /* Length of PIO transaction */
1013 int revision; /* SATA revision */
1014 u_int pm_present; /* PM is present (XPT->SIM) */
1015 u_int tags; /* Number of allowed tags */
1016 u_int atapi; /* Length of ATAPI CDB */
1017 u_int caps; /* Device and host SATA caps. */
1018 #define CTS_SATA_CAPS_H 0x0000ffff
1019 #define CTS_SATA_CAPS_H_PMREQ 0x00000001
1020 #define CTS_SATA_CAPS_H_APST 0x00000002
1021 #define CTS_SATA_CAPS_H_DMAAA 0x00000010 /* Auto-activation */
1022 #define CTS_SATA_CAPS_H_AN 0x00000020 /* Async. notification */
1023 #define CTS_SATA_CAPS_D 0xffff0000
1024 #define CTS_SATA_CAPS_D_PMREQ 0x00010000
1025 #define CTS_SATA_CAPS_D_APST 0x00020000
1028 struct ccb_trans_settings_nvme
1030 u_int valid; /* Which fields to honor */
1031 #define CTS_NVME_VALID_SPEC 0x01
1032 #define CTS_NVME_VALID_CAPS 0x02
1033 #define CTS_NVME_VALID_LINK 0x04
1034 uint32_t spec; /* NVMe spec implemented -- same as vs register */
1035 uint32_t max_xfer; /* Max transfer size (0 -> unlimited */
1037 uint8_t lanes; /* Number of PCIe lanes */
1038 uint8_t speed; /* PCIe generation for each lane */
1039 uint8_t max_lanes; /* Number of PCIe lanes */
1040 uint8_t max_speed; /* PCIe generation for each lane */
1043 #include <cam/mmc/mmc_bus.h>
1044 struct ccb_trans_settings_mmc {
1046 #define MMC_CLK (1 << 1)
1047 #define MMC_VDD (1 << 2)
1048 #define MMC_CS (1 << 3)
1049 #define MMC_BW (1 << 4)
1050 #define MMC_PM (1 << 5)
1051 #define MMC_BT (1 << 6)
1052 #define MMC_BM (1 << 7)
1053 #define MMC_VCCQ (1 << 8)
1055 /* The folowing is used only for GET_TRAN_SETTINGS */
1059 /* Copied from sys/dev/mmc/bridge.h */
1060 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can do 4-bit data transfers */
1061 #define MMC_CAP_8_BIT_DATA (1 << 1) /* Can do 8-bit data transfers */
1062 #define MMC_CAP_HSPEED (1 << 2) /* Can do High Speed transfers */
1063 #define MMC_CAP_BOOT_NOACC (1 << 4) /* Cannot access boot partitions */
1064 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 5) /* Host waits for busy responses */
1065 #define MMC_CAP_UHS_SDR12 (1 << 6) /* Can do UHS SDR12 */
1066 #define MMC_CAP_UHS_SDR25 (1 << 7) /* Can do UHS SDR25 */
1067 #define MMC_CAP_UHS_SDR50 (1 << 8) /* Can do UHS SDR50 */
1068 #define MMC_CAP_UHS_SDR104 (1 << 9) /* Can do UHS SDR104 */
1069 #define MMC_CAP_UHS_DDR50 (1 << 10) /* Can do UHS DDR50 */
1070 #define MMC_CAP_MMC_DDR52_120 (1 << 11) /* Can do eMMC DDR52 at 1.2 V */
1071 #define MMC_CAP_MMC_DDR52_180 (1 << 12) /* Can do eMMC DDR52 at 1.8 V */
1072 #define MMC_CAP_MMC_DDR52 (MMC_CAP_MMC_DDR52_120 | MMC_CAP_MMC_DDR52_180)
1073 #define MMC_CAP_MMC_HS200_120 (1 << 13) /* Can do eMMC HS200 at 1.2 V */
1074 #define MMC_CAP_MMC_HS200_180 (1 << 14) /* Can do eMMC HS200 at 1.8 V */
1075 #define MMC_CAP_MMC_HS200 (MMC_CAP_MMC_HS200_120| MMC_CAP_MMC_HS200_180)
1076 #define MMC_CAP_MMC_HS400_120 (1 << 15) /* Can do eMMC HS400 at 1.2 V */
1077 #define MMC_CAP_MMC_HS400_180 (1 << 16) /* Can do eMMC HS400 at 1.8 V */
1078 #define MMC_CAP_MMC_HS400 (MMC_CAP_MMC_HS400_120 | MMC_CAP_MMC_HS400_180)
1079 #define MMC_CAP_MMC_HSX00_120 (MMC_CAP_MMC_HS200_120 | MMC_CAP_MMC_HS400_120)
1080 #define MMC_CAP_MMC_ENH_STROBE (1 << 17) /* Can do eMMC Enhanced Strobe */
1081 #define MMC_CAP_SIGNALING_120 (1 << 18) /* Can do signaling at 1.2 V */
1082 #define MMC_CAP_SIGNALING_180 (1 << 19) /* Can do signaling at 1.8 V */
1083 #define MMC_CAP_SIGNALING_330 (1 << 20) /* Can do signaling at 3.3 V */
1084 #define MMC_CAP_DRIVER_TYPE_A (1 << 21) /* Can do Driver Type A */
1085 #define MMC_CAP_DRIVER_TYPE_C (1 << 22) /* Can do Driver Type C */
1086 #define MMC_CAP_DRIVER_TYPE_D (1 << 23) /* Can do Driver Type D */
1089 uint32_t host_max_data;
1092 /* Get/Set transfer rate/width/disconnection/tag queueing settings */
1093 struct ccb_trans_settings {
1094 struct ccb_hdr ccb_h;
1095 cts_type type; /* Current or User settings */
1097 u_int protocol_version;
1098 cam_xport transport;
1099 u_int transport_version;
1101 u_int valid; /* Which fields to honor */
1102 struct ccb_trans_settings_ata ata;
1103 struct ccb_trans_settings_scsi scsi;
1104 struct ccb_trans_settings_nvme nvme;
1105 struct ccb_trans_settings_mmc mmc;
1108 u_int valid; /* Which fields to honor */
1109 struct ccb_trans_settings_spi spi;
1110 struct ccb_trans_settings_fc fc;
1111 struct ccb_trans_settings_sas sas;
1112 struct ccb_trans_settings_pata ata;
1113 struct ccb_trans_settings_sata sata;
1114 struct ccb_trans_settings_nvme nvme;
1119 * Calculate the geometry parameters for a device
1120 * give the block size and volume size in blocks.
1122 struct ccb_calc_geometry {
1123 struct ccb_hdr ccb_h;
1124 u_int32_t block_size;
1125 u_int64_t volume_size;
1126 u_int32_t cylinders;
1128 u_int8_t secs_per_track;
1132 * Set or get SIM (and transport) specific knobs
1135 #define KNOB_VALID_ADDRESS 0x1
1136 #define KNOB_VALID_ROLE 0x2
1138 #define KNOB_ROLE_NONE 0x0
1139 #define KNOB_ROLE_INITIATOR 0x1
1140 #define KNOB_ROLE_TARGET 0x2
1141 #define KNOB_ROLE_BOTH 0x3
1143 struct ccb_sim_knob_settings_spi {
1149 struct ccb_sim_knob_settings_fc {
1151 u_int64_t wwnn; /* world wide node name */
1152 u_int64_t wwpn; /* world wide port name */
1156 struct ccb_sim_knob_settings_sas {
1158 u_int64_t wwnn; /* world wide node name */
1161 #define KNOB_SETTINGS_SIZE 128
1163 struct ccb_sim_knob {
1164 struct ccb_hdr ccb_h;
1166 u_int valid; /* Which fields to honor */
1167 struct ccb_sim_knob_settings_spi spi;
1168 struct ccb_sim_knob_settings_fc fc;
1169 struct ccb_sim_knob_settings_sas sas;
1170 char pad[KNOB_SETTINGS_SIZE];
1175 * Rescan the given bus, or bus/target/lun
1178 struct ccb_hdr ccb_h;
1183 * Turn on debugging for the given bus, bus/target, or bus/target/lun.
1186 struct ccb_hdr ccb_h;
1187 cam_debug_flags flags;
1190 /* Target mode structures. */
1193 struct ccb_hdr ccb_h;
1194 u_int16_t grp6_len; /* Group 6 VU CDB length */
1195 u_int16_t grp7_len; /* Group 7 VU CDB length */
1199 /* old, barely used immediate notify, binary compatibility */
1200 struct ccb_immed_notify {
1201 struct ccb_hdr ccb_h;
1202 struct scsi_sense_data sense_data;
1203 u_int8_t sense_len; /* Number of bytes in sense buffer */
1204 u_int8_t initiator_id; /* Id of initiator that selected */
1205 u_int8_t message_args[7]; /* Message Arguments */
1208 struct ccb_notify_ack {
1209 struct ccb_hdr ccb_h;
1210 u_int16_t seq_id; /* Sequence identifier */
1211 u_int8_t event; /* Event flags */
1214 struct ccb_immediate_notify {
1215 struct ccb_hdr ccb_h;
1216 u_int tag_id; /* Tag for immediate notify */
1217 u_int seq_id; /* Tag for target of notify */
1218 u_int initiator_id; /* Initiator Identifier */
1219 u_int arg; /* Function specific */
1222 struct ccb_notify_acknowledge {
1223 struct ccb_hdr ccb_h;
1224 u_int tag_id; /* Tag for immediate notify */
1225 u_int seq_id; /* Tar for target of notify */
1226 u_int initiator_id; /* Initiator Identifier */
1227 u_int arg; /* Response information */
1229 * Lower byte of arg is one of RESPONSE CODE values defined below
1230 * (subset of response codes from SPL-4 and FCP-4 specifications),
1231 * upper 3 bytes is code-specific ADDITIONAL RESPONSE INFORMATION.
1233 #define CAM_RSP_TMF_COMPLETE 0x00
1234 #define CAM_RSP_TMF_REJECTED 0x04
1235 #define CAM_RSP_TMF_FAILED 0x05
1236 #define CAM_RSP_TMF_SUCCEEDED 0x08
1237 #define CAM_RSP_TMF_INCORRECT_LUN 0x09
1240 /* HBA engine structures. */
1243 EIT_BUFFER, /* Engine type: buffer memory */
1244 EIT_LOSSLESS, /* Engine type: lossless compression */
1245 EIT_LOSSY, /* Engine type: lossy compression */
1246 EIT_ENCRYPT /* Engine type: encryption */
1250 EAD_VUNIQUE, /* Engine algorithm ID: vendor unique */
1251 EAD_LZ1V1, /* Engine algorithm ID: LZ1 var.1 */
1252 EAD_LZ2V1, /* Engine algorithm ID: LZ2 var.1 */
1253 EAD_LZ2V2 /* Engine algorithm ID: LZ2 var.2 */
1256 struct ccb_eng_inq {
1257 struct ccb_hdr ccb_h;
1258 u_int16_t eng_num; /* The engine number for this inquiry */
1259 ei_type eng_type; /* Returned engine type */
1260 ei_algo eng_algo; /* Returned engine algorithm type */
1261 u_int32_t eng_memeory; /* Returned engine memory size */
1264 struct ccb_eng_exec { /* This structure must match SCSIIO size */
1265 struct ccb_hdr ccb_h;
1266 u_int8_t *pdrv_ptr; /* Ptr used by the peripheral driver */
1267 u_int8_t *req_map; /* Ptr for mapping info on the req. */
1268 u_int8_t *data_ptr; /* Pointer to the data buf/SG list */
1269 u_int32_t dxfer_len; /* Data transfer length */
1270 u_int8_t *engdata_ptr; /* Pointer to the engine buffer data */
1271 u_int16_t sglist_cnt; /* Num of scatter gather list entries */
1272 u_int32_t dmax_len; /* Destination data maximum length */
1273 u_int32_t dest_len; /* Destination data length */
1274 int32_t src_resid; /* Source residual length: 2's comp */
1275 u_int32_t timeout; /* Timeout value */
1276 u_int16_t eng_num; /* Engine number for this request */
1277 u_int16_t vu_flags; /* Vendor Unique flags */
1281 * Definitions for the timeout field in the SCSI I/O CCB.
1283 #define CAM_TIME_DEFAULT 0x00000000 /* Use SIM default value */
1284 #define CAM_TIME_INFINITY 0xFFFFFFFF /* Infinite timeout */
1286 #define CAM_SUCCESS 0 /* For signaling general success */
1287 #define CAM_FAILURE 1 /* For signaling general failure */
1292 #define XPT_CCB_INVALID -1 /* for signaling a bad CCB to free */
1295 * CCB for working with advanced device information. This operates in a fashion
1296 * similar to XPT_GDEV_TYPE. Specify the target in ccb_h, the buffer
1297 * type requested, and provide a buffer size/buffer to write to. If the
1298 * buffer is too small, provsiz will be larger than bufsiz.
1300 struct ccb_dev_advinfo {
1301 struct ccb_hdr ccb_h;
1303 #define CDAI_FLAG_NONE 0x0 /* No flags set */
1304 #define CDAI_FLAG_STORE 0x1 /* If set, action becomes store */
1305 uint32_t buftype; /* IN: Type of data being requested */
1306 /* NB: buftype is interpreted on a per-transport basis */
1307 #define CDAI_TYPE_SCSI_DEVID 1
1308 #define CDAI_TYPE_SERIAL_NUM 2
1309 #define CDAI_TYPE_PHYS_PATH 3
1310 #define CDAI_TYPE_RCAPLONG 4
1311 #define CDAI_TYPE_EXT_INQ 5
1312 #define CDAI_TYPE_NVME_CNTRL 6 /* NVMe Identify Controller data */
1313 #define CDAI_TYPE_NVME_NS 7 /* NVMe Identify Namespace data */
1314 #define CDAI_TYPE_MMC_PARAMS 8 /* MMC/SD ident */
1315 off_t bufsiz; /* IN: Size of external buffer */
1316 #define CAM_SCSI_DEVID_MAXLEN 65536 /* length in buffer is an uint16_t */
1317 off_t provsiz; /* OUT: Size required/used */
1318 uint8_t *buf; /* IN/OUT: Buffer for requested data */
1322 * CCB for sending async events
1325 struct ccb_hdr ccb_h;
1326 uint32_t async_code;
1327 off_t async_arg_size;
1328 void *async_arg_ptr;
1332 * Union of all CCB types for kernel space allocation. This union should
1333 * never be used for manipulating CCBs - its only use is for the allocation
1334 * and deallocation of raw CCB space and is the return type of xpt_ccb_alloc
1335 * and the argument to xpt_ccb_free.
1338 struct ccb_hdr ccb_h; /* For convenience */
1339 struct ccb_scsiio csio;
1340 struct ccb_getdev cgd;
1341 struct ccb_getdevlist cgdl;
1342 struct ccb_pathinq cpi;
1343 struct ccb_relsim crs;
1344 struct ccb_setasync csa;
1345 struct ccb_setdev csd;
1346 struct ccb_pathstats cpis;
1347 struct ccb_getdevstats cgds;
1348 struct ccb_dev_match cdm;
1349 struct ccb_trans_settings cts;
1350 struct ccb_calc_geometry ccg;
1351 struct ccb_sim_knob knob;
1352 struct ccb_abort cab;
1353 struct ccb_resetbus crb;
1354 struct ccb_resetdev crd;
1355 struct ccb_termio tio;
1356 struct ccb_accept_tio atio;
1357 struct ccb_scsiio ctio;
1358 struct ccb_en_lun cel;
1359 struct ccb_immed_notify cin;
1360 struct ccb_notify_ack cna;
1361 struct ccb_immediate_notify cin1;
1362 struct ccb_notify_acknowledge cna2;
1363 struct ccb_eng_inq cei;
1364 struct ccb_eng_exec cee;
1365 struct ccb_smpio smpio;
1366 struct ccb_rescan crcn;
1367 struct ccb_debug cdbg;
1368 struct ccb_ataio ataio;
1369 struct ccb_dev_advinfo cdai;
1370 struct ccb_async casync;
1371 struct ccb_nvmeio nvmeio;
1372 struct ccb_mmcio mmcio;
1375 #define CCB_CLEAR_ALL_EXCEPT_HDR(ccbp) \
1376 bzero((char *)(ccbp) + sizeof((ccbp)->ccb_h), \
1377 sizeof(*(ccbp)) - sizeof((ccbp)->ccb_h))
1380 static __inline void
1381 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries,
1382 void (*cbfcnp)(struct cam_periph *, union ccb *),
1383 u_int32_t flags, u_int8_t tag_action,
1384 u_int8_t *data_ptr, u_int32_t dxfer_len,
1385 u_int8_t sense_len, u_int8_t cdb_len,
1388 csio->ccb_h.func_code = XPT_SCSI_IO;
1389 csio->ccb_h.flags = flags;
1390 csio->ccb_h.xflags = 0;
1391 csio->ccb_h.retry_count = retries;
1392 csio->ccb_h.cbfcnp = cbfcnp;
1393 csio->ccb_h.timeout = timeout;
1394 csio->data_ptr = data_ptr;
1395 csio->dxfer_len = dxfer_len;
1396 csio->sense_len = sense_len;
1397 csio->cdb_len = cdb_len;
1398 csio->tag_action = tag_action;
1400 #if defined(BUF_TRACKING) || defined(FULL_BUF_TRACKING)
1405 static __inline void
1406 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries,
1407 void (*cbfcnp)(struct cam_periph *, union ccb *),
1408 u_int32_t flags, u_int tag_action, u_int tag_id,
1409 u_int init_id, u_int scsi_status, u_int8_t *data_ptr,
1410 u_int32_t dxfer_len, u_int32_t timeout)
1412 csio->ccb_h.func_code = XPT_CONT_TARGET_IO;
1413 csio->ccb_h.flags = flags;
1414 csio->ccb_h.xflags = 0;
1415 csio->ccb_h.retry_count = retries;
1416 csio->ccb_h.cbfcnp = cbfcnp;
1417 csio->ccb_h.timeout = timeout;
1418 csio->data_ptr = data_ptr;
1419 csio->dxfer_len = dxfer_len;
1420 csio->scsi_status = scsi_status;
1421 csio->tag_action = tag_action;
1423 csio->tag_id = tag_id;
1424 csio->init_id = init_id;
1427 static __inline void
1428 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries,
1429 void (*cbfcnp)(struct cam_periph *, union ccb *),
1430 u_int32_t flags, u_int tag_action __unused,
1431 u_int8_t *data_ptr, u_int32_t dxfer_len,
1434 ataio->ccb_h.func_code = XPT_ATA_IO;
1435 ataio->ccb_h.flags = flags;
1436 ataio->ccb_h.retry_count = retries;
1437 ataio->ccb_h.cbfcnp = cbfcnp;
1438 ataio->ccb_h.timeout = timeout;
1439 ataio->data_ptr = data_ptr;
1440 ataio->dxfer_len = dxfer_len;
1441 ataio->ata_flags = 0;
1444 static __inline void
1445 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries,
1446 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1447 uint8_t *smp_request, int smp_request_len,
1448 uint8_t *smp_response, int smp_response_len,
1452 KASSERT((flags & CAM_DIR_MASK) == CAM_DIR_BOTH,
1453 ("direction != CAM_DIR_BOTH"));
1454 KASSERT((smp_request != NULL) && (smp_response != NULL),
1455 ("need valid request and response buffers"));
1456 KASSERT((smp_request_len != 0) && (smp_response_len != 0),
1457 ("need non-zero request and response lengths"));
1459 smpio->ccb_h.func_code = XPT_SMP_IO;
1460 smpio->ccb_h.flags = flags;
1461 smpio->ccb_h.retry_count = retries;
1462 smpio->ccb_h.cbfcnp = cbfcnp;
1463 smpio->ccb_h.timeout = timeout;
1464 smpio->smp_request = smp_request;
1465 smpio->smp_request_len = smp_request_len;
1466 smpio->smp_response = smp_response;
1467 smpio->smp_response_len = smp_response_len;
1470 static __inline void
1471 cam_fill_mmcio(struct ccb_mmcio *mmcio, uint32_t retries,
1472 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1473 uint32_t mmc_opcode, uint32_t mmc_arg, uint32_t mmc_flags,
1474 struct mmc_data *mmc_d,
1477 mmcio->ccb_h.func_code = XPT_MMC_IO;
1478 mmcio->ccb_h.flags = flags;
1479 mmcio->ccb_h.retry_count = retries;
1480 mmcio->ccb_h.cbfcnp = cbfcnp;
1481 mmcio->ccb_h.timeout = timeout;
1482 mmcio->cmd.opcode = mmc_opcode;
1483 mmcio->cmd.arg = mmc_arg;
1484 mmcio->cmd.flags = mmc_flags;
1485 mmcio->stop.opcode = 0;
1486 mmcio->stop.arg = 0;
1487 mmcio->stop.flags = 0;
1488 if (mmc_d != NULL) {
1489 mmcio->cmd.data = mmc_d;
1491 mmcio->cmd.data = NULL;
1492 mmcio->cmd.resp[0] = 0;
1493 mmcio->cmd.resp[1] = 0;
1494 mmcio->cmd.resp[2] = 0;
1495 mmcio->cmd.resp[3] = 0;
1498 static __inline void
1499 cam_set_ccbstatus(union ccb *ccb, cam_status status)
1501 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
1502 ccb->ccb_h.status |= status;
1505 static __inline cam_status
1506 cam_ccb_status(union ccb *ccb)
1508 return ((cam_status)(ccb->ccb_h.status & CAM_STATUS_MASK));
1511 void cam_calc_geometry(struct ccb_calc_geometry *ccg, int extended);
1513 static __inline void
1514 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1515 void (*cbfcnp)(struct cam_periph *, union ccb *),
1516 u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1519 nvmeio->ccb_h.func_code = XPT_NVME_IO;
1520 nvmeio->ccb_h.flags = flags;
1521 nvmeio->ccb_h.retry_count = retries;
1522 nvmeio->ccb_h.cbfcnp = cbfcnp;
1523 nvmeio->ccb_h.timeout = timeout;
1524 nvmeio->data_ptr = data_ptr;
1525 nvmeio->dxfer_len = dxfer_len;
1528 static __inline void
1529 cam_fill_nvmeadmin(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1530 void (*cbfcnp)(struct cam_periph *, union ccb *),
1531 u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1534 nvmeio->ccb_h.func_code = XPT_NVME_ADMIN;
1535 nvmeio->ccb_h.flags = flags;
1536 nvmeio->ccb_h.retry_count = retries;
1537 nvmeio->ccb_h.cbfcnp = cbfcnp;
1538 nvmeio->ccb_h.timeout = timeout;
1539 nvmeio->data_ptr = data_ptr;
1540 nvmeio->dxfer_len = dxfer_len;
1544 #endif /* _CAM_CAM_CCB_H */