2 * Data structures and definitions for CAM Control Blocks (CCBs).
4 * Copyright (c) 1997, 1998 Justin T. Gibbs.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification, immediately at the beginning of the file.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #ifndef _CAM_CAM_CCB_H
32 #define _CAM_CAM_CCB_H 1
34 #include <sys/queue.h>
35 #include <sys/cdefs.h>
37 #include <sys/limits.h>
39 #include <sys/callout.h>
41 #include <cam/cam_debug.h>
42 #include <cam/scsi/scsi_all.h>
43 #include <cam/ata/ata_all.h>
44 #include <cam/nvme/nvme_all.h>
46 /* General allocation length definitions for CCB structures */
47 #define IOCDBLEN CAM_MAX_CDBLEN /* Space for CDB bytes/pointer */
48 #define VUHBALEN 14 /* Vendor Unique HBA length */
49 #define SIM_IDLEN 16 /* ASCII string len for SIM ID */
50 #define HBA_IDLEN 16 /* ASCII string len for HBA ID */
51 #define DEV_IDLEN 16 /* ASCII string len for device names */
52 #define CCB_PERIPH_PRIV_SIZE 2 /* size of peripheral private area */
53 #define CCB_SIM_PRIV_SIZE 2 /* size of sim private area */
55 /* Struct definitions for CAM control blocks */
57 /* Common CCB header */
60 CAM_CDB_POINTER = 0x00000001,/* The CDB field is a pointer */
61 CAM_QUEUE_ENABLE = 0x00000002,/* SIM queue actions are enabled */
62 CAM_CDB_LINKED = 0x00000004,/* CCB contains a linked CDB */
63 CAM_NEGOTIATE = 0x00000008,/*
64 * Perform transport negotiation
67 CAM_DATA_ISPHYS = 0x00000010,/* Data type with physical addrs */
68 CAM_DIS_AUTOSENSE = 0x00000020,/* Disable autosense feature */
69 CAM_DIR_BOTH = 0x00000000,/* Data direction (00:IN/OUT) */
70 CAM_DIR_IN = 0x00000040,/* Data direction (01:DATA IN) */
71 CAM_DIR_OUT = 0x00000080,/* Data direction (10:DATA OUT) */
72 CAM_DIR_NONE = 0x000000C0,/* Data direction (11:no data) */
73 CAM_DIR_MASK = 0x000000C0,/* Data direction Mask */
74 CAM_DATA_VADDR = 0x00000000,/* Data type (000:Virtual) */
75 CAM_DATA_PADDR = 0x00000010,/* Data type (001:Physical) */
76 CAM_DATA_SG = 0x00040000,/* Data type (010:sglist) */
77 CAM_DATA_SG_PADDR = 0x00040010,/* Data type (011:sglist phys) */
78 CAM_DATA_BIO = 0x00200000,/* Data type (100:bio) */
79 CAM_DATA_MASK = 0x00240010,/* Data type mask */
80 CAM_SOFT_RST_OP = 0x00000100,/* Use Soft reset alternative */
81 CAM_ENG_SYNC = 0x00000200,/* Flush resid bytes on complete */
82 CAM_DEV_QFRZDIS = 0x00000400,/* Disable DEV Q freezing */
83 CAM_DEV_QFREEZE = 0x00000800,/* Freeze DEV Q on execution */
84 CAM_HIGH_POWER = 0x00001000,/* Command takes a lot of power */
85 CAM_SENSE_PTR = 0x00002000,/* Sense data is a pointer */
86 CAM_SENSE_PHYS = 0x00004000,/* Sense pointer is physical addr*/
87 CAM_TAG_ACTION_VALID = 0x00008000,/* Use the tag action in this ccb*/
88 CAM_PASS_ERR_RECOVER = 0x00010000,/* Pass driver does err. recovery*/
89 CAM_DIS_DISCONNECT = 0x00020000,/* Disable disconnect */
90 CAM_MSG_BUF_PHYS = 0x00080000,/* Message buffer ptr is physical*/
91 CAM_SNS_BUF_PHYS = 0x00100000,/* Autosense data ptr is physical*/
92 CAM_CDB_PHYS = 0x00400000,/* CDB poiner is physical */
93 CAM_ENG_SGLIST = 0x00800000,/* SG list is for the HBA engine */
95 /* Phase cognizant mode flags */
96 CAM_DIS_AUTOSRP = 0x01000000,/* Disable autosave/restore ptrs */
97 CAM_DIS_AUTODISC = 0x02000000,/* Disable auto disconnect */
98 CAM_TGT_CCB_AVAIL = 0x04000000,/* Target CCB available */
99 CAM_TGT_PHASE_MODE = 0x08000000,/* The SIM runs in phase mode */
100 CAM_MSGB_VALID = 0x10000000,/* Message buffer valid */
101 CAM_STATUS_VALID = 0x20000000,/* Status buffer valid */
102 CAM_DATAB_VALID = 0x40000000,/* Data buffer valid */
104 /* Host target Mode flags */
105 CAM_SEND_SENSE = 0x08000000,/* Send sense data with status */
106 CAM_TERM_IO = 0x10000000,/* Terminate I/O Message sup. */
107 CAM_DISCONNECT = 0x20000000,/* Disconnects are mandatory */
108 CAM_SEND_STATUS = 0x40000000,/* Send status after data phase */
110 CAM_UNLOCKED = 0x80000000 /* Call callback without lock. */
114 CAM_USER_DATA_ADDR = 0x00000002,/* Userspace data pointers */
115 CAM_SG_FORMAT_IOVEC = 0x00000004,/* iovec instead of busdma S/G*/
116 CAM_UNMAPPED_BUF = 0x00000008 /* use unmapped I/O */
119 /* XPT Opcodes for xpt_action */
121 /* Function code flags are bits greater than 0xff */
122 XPT_FC_QUEUED = 0x100,
123 /* Non-immediate function code */
124 XPT_FC_USER_CCB = 0x200,
125 XPT_FC_XPT_ONLY = 0x400,
126 /* Only for the transport layer device */
127 XPT_FC_DEV_QUEUED = 0x800 | XPT_FC_QUEUED,
128 /* Passes through the device queues */
129 /* Common function commands: 0x00->0x0F */
131 /* Execute Nothing */
132 XPT_SCSI_IO = 0x01 | XPT_FC_DEV_QUEUED,
133 /* Execute the requested I/O operation */
134 XPT_GDEV_TYPE = 0x02,
135 /* Get type information for specified device */
137 /* Get a list of peripheral devices */
139 /* Path routing inquiry */
141 /* Release a frozen device queue */
142 XPT_SASYNC_CB = 0x06,
143 /* Set Asynchronous Callback Parameters */
144 XPT_SDEV_TYPE = 0x07,
145 /* Set device type information */
146 XPT_SCAN_BUS = 0x08 | XPT_FC_QUEUED | XPT_FC_USER_CCB
148 /* (Re)Scan the SCSI Bus */
149 XPT_DEV_MATCH = 0x09 | XPT_FC_XPT_ONLY,
150 /* Get EDT entries matching the given pattern */
152 /* Turn on debugging for a bus, target or lun */
153 XPT_PATH_STATS = 0x0b,
154 /* Path statistics (error counts, etc.) */
155 XPT_GDEV_STATS = 0x0c,
156 /* Device statistics (error counts, etc.) */
157 XPT_DEV_ADVINFO = 0x0e,
158 /* Get/Set Device advanced information */
159 XPT_ASYNC = 0x0f | XPT_FC_QUEUED | XPT_FC_USER_CCB
161 /* Asynchronous event */
162 /* SCSI Control Functions: 0x10->0x1F */
164 /* Abort the specified CCB */
165 XPT_RESET_BUS = 0x11 | XPT_FC_XPT_ONLY,
166 /* Reset the specified SCSI bus */
167 XPT_RESET_DEV = 0x12 | XPT_FC_DEV_QUEUED,
168 /* Bus Device Reset the specified SCSI device */
170 /* Terminate the I/O process */
171 XPT_SCAN_LUN = 0x14 | XPT_FC_QUEUED | XPT_FC_USER_CCB
173 /* Scan Logical Unit */
174 XPT_GET_TRAN_SETTINGS = 0x15,
176 * Get default/user transfer settings
179 XPT_SET_TRAN_SETTINGS = 0x16,
181 * Set transfer rate/width
182 * negotiation settings
184 XPT_CALC_GEOMETRY = 0x17,
186 * Calculate the geometry parameters for
187 * a device give the sector size and
190 XPT_ATA_IO = 0x18 | XPT_FC_DEV_QUEUED,
191 /* Execute the requested ATA I/O operation */
193 XPT_GET_SIM_KNOB_OLD = 0x18, /* Compat only */
195 XPT_SET_SIM_KNOB = 0x19,
197 * Set SIM specific knob values.
200 XPT_GET_SIM_KNOB = 0x1a,
202 * Get SIM specific knob values.
205 XPT_SMP_IO = 0x1b | XPT_FC_DEV_QUEUED,
206 /* Serial Management Protocol */
208 XPT_NVME_IO = 0x1c | XPT_FC_DEV_QUEUED,
209 /* Execiute the requestred NVMe I/O operation */
211 XPT_MMCSD_IO = 0x1d | XPT_FC_DEV_QUEUED,
212 /* Placeholder for MMC / SD / SDIO I/O stuff */
214 XPT_SCAN_TGT = 0x1E | XPT_FC_QUEUED | XPT_FC_USER_CCB
218 /* HBA engine commands 0x20->0x2F */
219 XPT_ENG_INQ = 0x20 | XPT_FC_XPT_ONLY,
220 /* HBA engine feature inquiry */
221 XPT_ENG_EXEC = 0x21 | XPT_FC_DEV_QUEUED,
222 /* HBA execute engine request */
224 /* Target mode commands: 0x30->0x3F */
226 /* Enable LUN as a target */
227 XPT_TARGET_IO = 0x31 | XPT_FC_DEV_QUEUED,
228 /* Execute target I/O request */
229 XPT_ACCEPT_TARGET_IO = 0x32 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
230 /* Accept Host Target Mode CDB */
231 XPT_CONT_TARGET_IO = 0x33 | XPT_FC_DEV_QUEUED,
232 /* Continue Host Target I/O Connection */
233 XPT_IMMED_NOTIFY = 0x34 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
234 /* Notify Host Target driver of event (obsolete) */
235 XPT_NOTIFY_ACK = 0x35,
236 /* Acknowledgement of event (obsolete) */
237 XPT_IMMEDIATE_NOTIFY = 0x36 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
238 /* Notify Host Target driver of event */
239 XPT_NOTIFY_ACKNOWLEDGE = 0x37 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
240 /* Acknowledgement of event */
241 XPT_REPROBE_LUN = 0x38 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
242 /* Query device capacity and notify GEOM */
244 /* Vendor Unique codes: 0x80->0x8F */
248 #define XPT_FC_GROUP_MASK 0xF0
249 #define XPT_FC_GROUP(op) ((op) & XPT_FC_GROUP_MASK)
250 #define XPT_FC_GROUP_COMMON 0x00
251 #define XPT_FC_GROUP_SCSI_CONTROL 0x10
252 #define XPT_FC_GROUP_HBA_ENGINE 0x20
253 #define XPT_FC_GROUP_TMODE 0x30
254 #define XPT_FC_GROUP_VENDOR_UNIQUE 0x80
256 #define XPT_FC_IS_DEV_QUEUED(ccb) \
257 (((ccb)->ccb_h.func_code & XPT_FC_DEV_QUEUED) == XPT_FC_DEV_QUEUED)
258 #define XPT_FC_IS_QUEUED(ccb) \
259 (((ccb)->ccb_h.func_code & XPT_FC_QUEUED) != 0)
264 PROTO_SCSI, /* Small Computer System Interface */
265 PROTO_ATA, /* AT Attachment */
266 PROTO_ATAPI, /* AT Attachment Packetized Interface */
267 PROTO_SATAPM, /* SATA Port Multiplier */
268 PROTO_SEMB, /* SATA Enclosure Management Bridge */
269 PROTO_NVME, /* NVME */
275 XPORT_SPI, /* SCSI Parallel Interface */
276 XPORT_FC, /* Fiber Channel */
277 XPORT_SSA, /* Serial Storage Architecture */
278 XPORT_USB, /* Universal Serial Bus */
279 XPORT_PPB, /* Parallel Port Bus */
280 XPORT_ATA, /* AT Attachment */
281 XPORT_SAS, /* Serial Attached SCSI */
282 XPORT_SATA, /* Serial AT Attachment */
283 XPORT_ISCSI, /* iSCSI */
284 XPORT_SRP, /* SCSI RDMA Protocol */
285 XPORT_NVME, /* NVMe over PCIe */
288 #define XPORT_IS_NVME(t) ((t) == XPORT_NVME)
289 #define XPORT_IS_ATA(t) ((t) == XPORT_ATA || (t) == XPORT_SATA)
290 #define XPORT_IS_SCSI(t) ((t) != XPORT_UNKNOWN && \
291 (t) != XPORT_UNSPECIFIED && \
292 !XPORT_IS_ATA(t) && !XPORT_IS_NVME(t))
293 #define XPORT_DEVSTAT_TYPE(t) (XPORT_IS_ATA(t) ? DEVSTAT_TYPE_IF_IDE : \
294 XPORT_IS_SCSI(t) ? DEVSTAT_TYPE_IF_SCSI : \
295 DEVSTAT_TYPE_IF_OTHER)
297 #define PROTO_VERSION_UNKNOWN (UINT_MAX - 1)
298 #define PROTO_VERSION_UNSPECIFIED UINT_MAX
299 #define XPORT_VERSION_UNKNOWN (UINT_MAX - 1)
300 #define XPORT_VERSION_UNSPECIFIED UINT_MAX
303 LIST_ENTRY(ccb_hdr) le;
304 SLIST_ENTRY(ccb_hdr) sle;
305 TAILQ_ENTRY(ccb_hdr) tqe;
306 STAILQ_ENTRY(ccb_hdr) stqe;
312 u_int8_t bytes[sizeof(uintptr_t)];
316 ccb_priv_entry entries[CCB_PERIPH_PRIV_SIZE];
317 u_int8_t bytes[CCB_PERIPH_PRIV_SIZE * sizeof(ccb_priv_entry)];
321 ccb_priv_entry entries[CCB_SIM_PRIV_SIZE];
322 u_int8_t bytes[CCB_SIM_PRIV_SIZE * sizeof(ccb_priv_entry)];
326 struct timeval *etime;
328 uintptr_t periph_data;
332 cam_pinfo pinfo; /* Info for priority scheduling */
333 camq_entry xpt_links; /* For chaining in the XPT layer */
334 camq_entry sim_links; /* For chaining in the SIM layer */
335 camq_entry periph_links; /* For chaining in the type driver */
336 u_int32_t retry_count;
337 void (*cbfcnp)(struct cam_periph *, union ccb *);
338 /* Callback on completion function */
339 xpt_opcode func_code; /* XPT function code */
340 u_int32_t status; /* Status returned by CAM subsystem */
341 struct cam_path *path; /* Compiled path for this ccb */
342 path_id_t path_id; /* Path ID for the request */
343 target_id_t target_id; /* Target device ID */
344 lun_id_t target_lun; /* Target LUN number */
345 u_int32_t flags; /* ccb_flags */
346 u_int32_t xflags; /* Extended flags */
347 ccb_ppriv_area periph_priv;
348 ccb_spriv_area sim_priv;
350 u_int32_t timeout; /* Hard timeout value in mseconds */
351 struct timeval softtimeout; /* Soft timeout value in sec + usec */
354 /* Get Device Information CCB */
356 struct ccb_hdr ccb_h;
358 struct scsi_inquiry_data inq_data;
359 struct ata_params ident_data;
360 u_int8_t serial_num[252];
362 u_int8_t serial_num_len;
363 const struct nvme_controller_data *nvme_cdata;
364 const struct nvme_namespace_data *nvme_data;
367 /* Device Statistics CCB */
368 struct ccb_getdevstats {
369 struct ccb_hdr ccb_h;
370 int dev_openings; /* Space left for more work on device*/
371 int dev_active; /* Transactions running on the device */
372 int allocated; /* CCBs allocated for the device */
373 int queued; /* CCBs queued to be sent to the device */
375 * CCBs held by peripheral drivers
379 * Boundary conditions for number of
383 struct timeval last_reset; /* Time of last bus reset/loop init */
387 CAM_GDEVLIST_LAST_DEVICE,
388 CAM_GDEVLIST_LIST_CHANGED,
389 CAM_GDEVLIST_MORE_DEVS,
391 } ccb_getdevlist_status_e;
393 struct ccb_getdevlist {
394 struct ccb_hdr ccb_h;
395 char periph_name[DEV_IDLEN];
396 u_int32_t unit_number;
397 unsigned int generation;
399 ccb_getdevlist_status_e status;
403 PERIPH_MATCH_NONE = 0x000,
404 PERIPH_MATCH_PATH = 0x001,
405 PERIPH_MATCH_TARGET = 0x002,
406 PERIPH_MATCH_LUN = 0x004,
407 PERIPH_MATCH_NAME = 0x008,
408 PERIPH_MATCH_UNIT = 0x010,
409 PERIPH_MATCH_ANY = 0x01f
410 } periph_pattern_flags;
412 struct periph_match_pattern {
413 char periph_name[DEV_IDLEN];
414 u_int32_t unit_number;
416 target_id_t target_id;
418 periph_pattern_flags flags;
422 DEV_MATCH_NONE = 0x000,
423 DEV_MATCH_PATH = 0x001,
424 DEV_MATCH_TARGET = 0x002,
425 DEV_MATCH_LUN = 0x004,
426 DEV_MATCH_INQUIRY = 0x008,
427 DEV_MATCH_DEVID = 0x010,
428 DEV_MATCH_ANY = 0x00f
431 struct device_id_match_pattern {
436 struct device_match_pattern {
438 target_id_t target_id;
440 dev_pattern_flags flags;
442 struct scsi_static_inquiry_pattern inq_pat;
443 struct device_id_match_pattern devid_pat;
448 BUS_MATCH_NONE = 0x000,
449 BUS_MATCH_PATH = 0x001,
450 BUS_MATCH_NAME = 0x002,
451 BUS_MATCH_UNIT = 0x004,
452 BUS_MATCH_BUS_ID = 0x008,
453 BUS_MATCH_ANY = 0x00f
456 struct bus_match_pattern {
458 char dev_name[DEV_IDLEN];
459 u_int32_t unit_number;
461 bus_pattern_flags flags;
464 union match_pattern {
465 struct periph_match_pattern periph_pattern;
466 struct device_match_pattern device_pattern;
467 struct bus_match_pattern bus_pattern;
476 struct dev_match_pattern {
478 union match_pattern pattern;
481 struct periph_match_result {
482 char periph_name[DEV_IDLEN];
483 u_int32_t unit_number;
485 target_id_t target_id;
490 DEV_RESULT_NOFLAG = 0x00,
491 DEV_RESULT_UNCONFIGURED = 0x01
494 struct device_match_result {
496 target_id_t target_id;
499 struct scsi_inquiry_data inq_data;
500 struct ata_params ident_data;
501 dev_result_flags flags;
504 struct bus_match_result {
506 char dev_name[DEV_IDLEN];
507 u_int32_t unit_number;
512 struct periph_match_result periph_result;
513 struct device_match_result device_result;
514 struct bus_match_result bus_result;
517 struct dev_match_result {
519 union match_result result;
525 CAM_DEV_MATCH_LIST_CHANGED,
526 CAM_DEV_MATCH_SIZE_ERROR,
528 } ccb_dev_match_status;
531 CAM_DEV_POS_NONE = 0x000,
532 CAM_DEV_POS_BUS = 0x001,
533 CAM_DEV_POS_TARGET = 0x002,
534 CAM_DEV_POS_DEVICE = 0x004,
535 CAM_DEV_POS_PERIPH = 0x008,
536 CAM_DEV_POS_PDPTR = 0x010,
537 CAM_DEV_POS_TYPEMASK = 0xf00,
538 CAM_DEV_POS_EDT = 0x100,
539 CAM_DEV_POS_PDRV = 0x200
542 struct ccb_dm_cookie {
550 struct ccb_dev_position {
551 u_int generations[4];
552 #define CAM_BUS_GENERATION 0x00
553 #define CAM_TARGET_GENERATION 0x01
554 #define CAM_DEV_GENERATION 0x02
555 #define CAM_PERIPH_GENERATION 0x03
556 dev_pos_type position_type;
557 struct ccb_dm_cookie cookie;
560 struct ccb_dev_match {
561 struct ccb_hdr ccb_h;
562 ccb_dev_match_status status;
563 u_int32_t num_patterns;
564 u_int32_t pattern_buf_len;
565 struct dev_match_pattern *patterns;
566 u_int32_t num_matches;
567 u_int32_t match_buf_len;
568 struct dev_match_result *matches;
569 struct ccb_dev_position pos;
573 * Definitions for the path inquiry CCB fields.
575 #define CAM_VERSION 0x19 /* Hex value for current version */
578 PI_MDP_ABLE = 0x80, /* Supports MDP message */
579 PI_WIDE_32 = 0x40, /* Supports 32 bit wide SCSI */
580 PI_WIDE_16 = 0x20, /* Supports 16 bit wide SCSI */
581 PI_SDTR_ABLE = 0x10, /* Supports SDTR message */
582 PI_LINKED_CDB = 0x08, /* Supports linked CDBs */
583 PI_SATAPM = 0x04, /* Supports SATA PM */
584 PI_TAG_ABLE = 0x02, /* Supports tag queue messages */
585 PI_SOFT_RST = 0x01 /* Supports soft reset alternative */
589 PIT_PROCESSOR = 0x80, /* Target mode processor mode */
590 PIT_PHASE = 0x40, /* Target mode phase cog. mode */
591 PIT_DISCONNECT = 0x20, /* Disconnects supported in target mode */
592 PIT_TERM_IO = 0x10, /* Terminate I/O message supported in TM */
593 PIT_GRP_6 = 0x08, /* Group 6 commands supported */
594 PIT_GRP_7 = 0x04 /* Group 7 commands supported */
598 PIM_ATA_EXT = 0x200,/* ATA requests can understand ata_ext requests */
599 PIM_EXTLUNS = 0x100,/* 64bit extended LUNs supported */
600 PIM_SCANHILO = 0x80, /* Bus scans from high ID to low ID */
601 PIM_NOREMOVE = 0x40, /* Removeable devices not included in scan */
602 PIM_NOINITIATOR = 0x20, /* Initiator role not supported. */
603 PIM_NOBUSRESET = 0x10, /* User has disabled initial BUS RESET */
604 PIM_NO_6_BYTE = 0x08, /* Do not send 6-byte commands */
605 PIM_SEQSCAN = 0x04, /* Do bus scans sequentially, not in parallel */
607 PIM_NOSCAN = 0x01 /* SIM does its own scanning */
610 /* Path Inquiry CCB */
611 struct ccb_pathinq_settings_spi {
612 u_int8_t ppr_options;
615 struct ccb_pathinq_settings_fc {
616 u_int64_t wwnn; /* world wide node name */
617 u_int64_t wwpn; /* world wide port name */
618 u_int32_t port; /* 24 bit port id, if known */
619 u_int32_t bitrate; /* Mbps */
622 struct ccb_pathinq_settings_sas {
623 u_int32_t bitrate; /* Mbps */
626 struct ccb_pathinq_settings_nvme {
627 uint16_t nsid; /* Namespace ID for this path */
630 #define PATHINQ_SETTINGS_SIZE 128
633 struct ccb_hdr ccb_h;
634 u_int8_t version_num; /* Version number for the SIM/HBA */
635 u_int8_t hba_inquiry; /* Mimic of INQ byte 7 for the HBA */
636 u_int16_t target_sprt; /* Flags for target mode support */
637 u_int32_t hba_misc; /* Misc HBA features */
638 u_int16_t hba_eng_cnt; /* HBA engine count */
639 /* Vendor Unique capabilities */
640 u_int8_t vuhba_flags[VUHBALEN];
641 u_int32_t max_target; /* Maximum supported Target */
642 u_int32_t max_lun; /* Maximum supported Lun */
643 u_int32_t async_flags; /* Installed Async handlers */
644 path_id_t hpath_id; /* Highest Path ID in the subsystem */
645 target_id_t initiator_id; /* ID of the HBA on the SCSI bus */
646 char sim_vid[SIM_IDLEN]; /* Vendor ID of the SIM */
647 char hba_vid[HBA_IDLEN]; /* Vendor ID of the HBA */
648 char dev_name[DEV_IDLEN];/* Device name for SIM */
649 u_int32_t unit_number; /* Unit number for SIM */
650 u_int32_t bus_id; /* Bus ID for SIM */
651 u_int32_t base_transfer_speed;/* Base bus speed in KB/sec */
653 u_int protocol_version;
655 u_int transport_version;
657 struct ccb_pathinq_settings_spi spi;
658 struct ccb_pathinq_settings_fc fc;
659 struct ccb_pathinq_settings_sas sas;
660 struct ccb_pathinq_settings_nvme nvme;
661 char ccb_pathinq_settings_opaque[PATHINQ_SETTINGS_SIZE];
663 u_int maxio; /* Max supported I/O size, in bytes. */
664 u_int16_t hba_vendor; /* HBA vendor ID */
665 u_int16_t hba_device; /* HBA device ID */
666 u_int16_t hba_subvendor; /* HBA subvendor ID */
667 u_int16_t hba_subdevice; /* HBA subdevice ID */
670 /* Path Statistics CCB */
671 struct ccb_pathstats {
672 struct ccb_hdr ccb_h;
673 struct timeval last_reset; /* Time of last bus reset/loop init */
677 SMP_FLAG_NONE = 0x00,
678 SMP_FLAG_REQ_SG = 0x01,
679 SMP_FLAG_RSP_SG = 0x02
680 } ccb_smp_pass_flags;
683 * Serial Management Protocol CCB
684 * XXX Currently the semantics for this CCB are that it is executed either
685 * by the addressed device, or that device's parent (i.e. an expander for
686 * any device on an expander) if the addressed device doesn't support SMP.
687 * Later, once we have the ability to probe SMP-only devices and put them
688 * in CAM's topology, the CCB will only be executed by the addressed device
692 struct ccb_hdr ccb_h;
693 uint8_t *smp_request;
695 uint16_t smp_request_sglist_cnt;
696 uint8_t *smp_response;
697 int smp_response_len;
698 uint16_t smp_response_sglist_cnt;
699 ccb_smp_pass_flags flags;
703 u_int8_t *sense_ptr; /*
705 * for sense information
707 /* Storage Area for sense information */
708 struct scsi_sense_data sense_buf;
712 u_int8_t *cdb_ptr; /* Pointer to the CDB bytes to send */
713 /* Area for the CDB send */
714 u_int8_t cdb_bytes[IOCDBLEN];
718 * SCSI I/O Request CCB used for the XPT_SCSI_IO and XPT_CONT_TARGET_IO
722 struct ccb_hdr ccb_h;
723 union ccb *next_ccb; /* Ptr for next CCB for action */
724 u_int8_t *req_map; /* Ptr to mapping info */
725 u_int8_t *data_ptr; /* Ptr to the data buf/SG list */
726 u_int32_t dxfer_len; /* Data transfer length */
727 /* Autosense storage */
728 struct scsi_sense_data sense_data;
729 u_int8_t sense_len; /* Number of bytes to autosense */
730 u_int8_t cdb_len; /* Number of bytes for the CDB */
731 u_int16_t sglist_cnt; /* Number of SG list entries */
732 u_int8_t scsi_status; /* Returned SCSI status */
733 u_int8_t sense_resid; /* Autosense resid length: 2's comp */
734 u_int32_t resid; /* Transfer residual length: 2's comp */
735 cdb_t cdb_io; /* Union for CDB bytes/pointer */
736 u_int8_t *msg_ptr; /* Pointer to the message buffer */
737 u_int16_t msg_len; /* Number of bytes for the Message */
738 u_int8_t tag_action; /* What to do for tag queueing */
740 * The tag action should be either the define below (to send a
741 * non-tagged transaction) or one of the defined scsi tag messages
742 * from scsi_message.h.
744 #define CAM_TAG_ACTION_NONE 0x00
745 u_int tag_id; /* tag id from initator (target mode) */
746 u_int init_id; /* initiator id of who selected */
747 #if defined(BUF_TRACKING) || defined(FULL_BUF_TRACKING)
748 struct bio *bio; /* Associated bio */
752 static __inline uint8_t *
753 scsiio_cdb_ptr(struct ccb_scsiio *ccb)
755 return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ?
756 ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes);
760 * ATA I/O Request CCB used for the XPT_ATA_IO function code.
763 struct ccb_hdr ccb_h;
764 union ccb *next_ccb; /* Ptr for next CCB for action */
765 struct ata_cmd cmd; /* ATA command register set */
766 struct ata_res res; /* ATA result register set */
767 u_int8_t *data_ptr; /* Ptr to the data buf/SG list */
768 u_int32_t dxfer_len; /* Data transfer length */
769 u_int32_t resid; /* Transfer residual length: 2's comp */
770 u_int8_t ata_flags; /* Flags for the rest of the buffer */
771 #define ATA_FLAG_AUX 0x1
776 struct ccb_accept_tio {
777 struct ccb_hdr ccb_h;
778 cdb_t cdb_io; /* Union for CDB bytes/pointer */
779 u_int8_t cdb_len; /* Number of bytes for the CDB */
780 u_int8_t tag_action; /* What to do for tag queueing */
781 u_int8_t sense_len; /* Number of bytes of Sense Data */
782 u_int tag_id; /* tag id from initator (target mode) */
783 u_int init_id; /* initiator id of who selected */
784 struct scsi_sense_data sense_data;
787 /* Release SIM Queue */
789 struct ccb_hdr ccb_h;
790 u_int32_t release_flags;
791 #define RELSIM_ADJUST_OPENINGS 0x01
792 #define RELSIM_RELEASE_AFTER_TIMEOUT 0x02
793 #define RELSIM_RELEASE_AFTER_CMDCMPLT 0x04
794 #define RELSIM_RELEASE_AFTER_QEMPTY 0x08
796 u_int32_t release_timeout; /* Abstract argument. */
797 u_int32_t qfrozen_cnt;
801 * NVMe I/O Request CCB used for the XPT_NVME_IO function code.
804 struct ccb_hdr ccb_h;
805 union ccb *next_ccb; /* Ptr for next CCB for action */
806 struct nvme_command cmd; /* NVME command, per NVME standard */
807 struct nvme_completion cpl; /* NVME completion, per NVME standard */
808 uint8_t *data_ptr; /* Ptr to the data buf/SG list */
809 uint32_t dxfer_len; /* Data transfer length */
810 uint32_t resid; /* Transfer residual length: 2's comp unused ?*/
814 * Definitions for the asynchronous callback CCB fields.
817 AC_UNIT_ATTENTION = 0x4000,/* Device reported UNIT ATTENTION */
818 AC_ADVINFO_CHANGED = 0x2000,/* Advance info might have changes */
819 AC_CONTRACT = 0x1000,/* A contractual callback */
820 AC_GETDEV_CHANGED = 0x800,/* Getdev info might have changed */
821 AC_INQ_CHANGED = 0x400,/* Inquiry info might have changed */
822 AC_TRANSFER_NEG = 0x200,/* New transfer settings in effect */
823 AC_LOST_DEVICE = 0x100,/* A device went away */
824 AC_FOUND_DEVICE = 0x080,/* A new device was found */
825 AC_PATH_DEREGISTERED = 0x040,/* A path has de-registered */
826 AC_PATH_REGISTERED = 0x020,/* A new path has been registered */
827 AC_SENT_BDR = 0x010,/* A BDR message was sent to target */
828 AC_SCSI_AEN = 0x008,/* A SCSI AEN has been received */
829 AC_UNSOL_RESEL = 0x002,/* Unsolicited reselection occurred */
830 AC_BUS_RESET = 0x001 /* A SCSI bus reset occurred */
833 typedef void ac_callback_t (void *softc, u_int32_t code,
834 struct cam_path *path, void *args);
837 * Generic Asynchronous callbacks.
839 * Generic arguments passed bac which are then interpreted between a per-system
842 #define AC_CONTRACT_DATA_MAX (128 - sizeof (u_int64_t))
844 u_int64_t contract_number;
845 u_int8_t contract_data[AC_CONTRACT_DATA_MAX];
848 #define AC_CONTRACT_DEV_CHG 1
849 struct ac_device_changed {
856 /* Set Asynchronous Callback CCB */
857 struct ccb_setasync {
858 struct ccb_hdr ccb_h;
859 u_int32_t event_enable; /* Async Event enables */
860 ac_callback_t *callback;
864 /* Set Device Type CCB */
866 struct ccb_hdr ccb_h;
867 u_int8_t dev_type; /* Value for dev type field in EDT */
870 /* SCSI Control Functions */
872 /* Abort XPT request CCB */
874 struct ccb_hdr ccb_h;
875 union ccb *abort_ccb; /* Pointer to CCB to abort */
878 /* Reset SCSI Bus CCB */
879 struct ccb_resetbus {
880 struct ccb_hdr ccb_h;
883 /* Reset SCSI Device CCB */
884 struct ccb_resetdev {
885 struct ccb_hdr ccb_h;
888 /* Terminate I/O Process Request CCB */
890 struct ccb_hdr ccb_h;
891 union ccb *termio_ccb; /* Pointer to CCB to terminate */
895 CTS_TYPE_CURRENT_SETTINGS,
896 CTS_TYPE_USER_SETTINGS
899 struct ccb_trans_settings_scsi
901 u_int valid; /* Which fields to honor */
902 #define CTS_SCSI_VALID_TQ 0x01
904 #define CTS_SCSI_FLAGS_TAG_ENB 0x01
907 struct ccb_trans_settings_ata
909 u_int valid; /* Which fields to honor */
910 #define CTS_ATA_VALID_TQ 0x01
912 #define CTS_ATA_FLAGS_TAG_ENB 0x01
915 struct ccb_trans_settings_spi
917 u_int valid; /* Which fields to honor */
918 #define CTS_SPI_VALID_SYNC_RATE 0x01
919 #define CTS_SPI_VALID_SYNC_OFFSET 0x02
920 #define CTS_SPI_VALID_BUS_WIDTH 0x04
921 #define CTS_SPI_VALID_DISC 0x08
922 #define CTS_SPI_VALID_PPR_OPTIONS 0x10
924 #define CTS_SPI_FLAGS_DISC_ENB 0x01
931 struct ccb_trans_settings_fc {
932 u_int valid; /* Which fields to honor */
933 #define CTS_FC_VALID_WWNN 0x8000
934 #define CTS_FC_VALID_WWPN 0x4000
935 #define CTS_FC_VALID_PORT 0x2000
936 #define CTS_FC_VALID_SPEED 0x1000
937 u_int64_t wwnn; /* world wide node name */
938 u_int64_t wwpn; /* world wide port name */
939 u_int32_t port; /* 24 bit port id, if known */
940 u_int32_t bitrate; /* Mbps */
943 struct ccb_trans_settings_sas {
944 u_int valid; /* Which fields to honor */
945 #define CTS_SAS_VALID_SPEED 0x1000
946 u_int32_t bitrate; /* Mbps */
949 struct ccb_trans_settings_pata {
950 u_int valid; /* Which fields to honor */
951 #define CTS_ATA_VALID_MODE 0x01
952 #define CTS_ATA_VALID_BYTECOUNT 0x02
953 #define CTS_ATA_VALID_ATAPI 0x20
954 #define CTS_ATA_VALID_CAPS 0x40
956 u_int bytecount; /* Length of PIO transaction */
957 u_int atapi; /* Length of ATAPI CDB */
958 u_int caps; /* Device and host SATA caps. */
959 #define CTS_ATA_CAPS_H 0x0000ffff
960 #define CTS_ATA_CAPS_H_DMA48 0x00000001 /* 48-bit DMA */
961 #define CTS_ATA_CAPS_D 0xffff0000
964 struct ccb_trans_settings_sata {
965 u_int valid; /* Which fields to honor */
966 #define CTS_SATA_VALID_MODE 0x01
967 #define CTS_SATA_VALID_BYTECOUNT 0x02
968 #define CTS_SATA_VALID_REVISION 0x04
969 #define CTS_SATA_VALID_PM 0x08
970 #define CTS_SATA_VALID_TAGS 0x10
971 #define CTS_SATA_VALID_ATAPI 0x20
972 #define CTS_SATA_VALID_CAPS 0x40
973 int mode; /* Legacy PATA mode */
974 u_int bytecount; /* Length of PIO transaction */
975 int revision; /* SATA revision */
976 u_int pm_present; /* PM is present (XPT->SIM) */
977 u_int tags; /* Number of allowed tags */
978 u_int atapi; /* Length of ATAPI CDB */
979 u_int caps; /* Device and host SATA caps. */
980 #define CTS_SATA_CAPS_H 0x0000ffff
981 #define CTS_SATA_CAPS_H_PMREQ 0x00000001
982 #define CTS_SATA_CAPS_H_APST 0x00000002
983 #define CTS_SATA_CAPS_H_DMAAA 0x00000010 /* Auto-activation */
984 #define CTS_SATA_CAPS_H_AN 0x00000020 /* Async. notification */
985 #define CTS_SATA_CAPS_D 0xffff0000
986 #define CTS_SATA_CAPS_D_PMREQ 0x00010000
987 #define CTS_SATA_CAPS_D_APST 0x00020000
990 struct ccb_trans_settings_nvme
992 u_int valid; /* Which fields to honor */
993 #define CTS_NVME_VALID_SPEC 0x01
994 #define CTS_NVME_VALID_CAPS 0x02
995 u_int spec_major; /* Major version of spec supported */
996 u_int spec_minor; /* Minor verison of spec supported */
997 u_int spec_tiny; /* Tiny version of spec supported */
998 u_int max_xfer; /* Max transfer size (0 -> unlimited */
1002 /* Get/Set transfer rate/width/disconnection/tag queueing settings */
1003 struct ccb_trans_settings {
1004 struct ccb_hdr ccb_h;
1005 cts_type type; /* Current or User settings */
1007 u_int protocol_version;
1008 cam_xport transport;
1009 u_int transport_version;
1011 u_int valid; /* Which fields to honor */
1012 struct ccb_trans_settings_ata ata;
1013 struct ccb_trans_settings_scsi scsi;
1014 struct ccb_trans_settings_nvme nvme;
1017 u_int valid; /* Which fields to honor */
1018 struct ccb_trans_settings_spi spi;
1019 struct ccb_trans_settings_fc fc;
1020 struct ccb_trans_settings_sas sas;
1021 struct ccb_trans_settings_pata ata;
1022 struct ccb_trans_settings_sata sata;
1023 struct ccb_trans_settings_nvme nvme;
1029 * Calculate the geometry parameters for a device
1030 * give the block size and volume size in blocks.
1032 struct ccb_calc_geometry {
1033 struct ccb_hdr ccb_h;
1034 u_int32_t block_size;
1035 u_int64_t volume_size;
1036 u_int32_t cylinders;
1038 u_int8_t secs_per_track;
1042 * Set or get SIM (and transport) specific knobs
1045 #define KNOB_VALID_ADDRESS 0x1
1046 #define KNOB_VALID_ROLE 0x2
1049 #define KNOB_ROLE_NONE 0x0
1050 #define KNOB_ROLE_INITIATOR 0x1
1051 #define KNOB_ROLE_TARGET 0x2
1052 #define KNOB_ROLE_BOTH 0x3
1054 struct ccb_sim_knob_settings_spi {
1060 struct ccb_sim_knob_settings_fc {
1062 u_int64_t wwnn; /* world wide node name */
1063 u_int64_t wwpn; /* world wide port name */
1067 struct ccb_sim_knob_settings_sas {
1069 u_int64_t wwnn; /* world wide node name */
1072 #define KNOB_SETTINGS_SIZE 128
1074 struct ccb_sim_knob {
1075 struct ccb_hdr ccb_h;
1077 u_int valid; /* Which fields to honor */
1078 struct ccb_sim_knob_settings_spi spi;
1079 struct ccb_sim_knob_settings_fc fc;
1080 struct ccb_sim_knob_settings_sas sas;
1081 char pad[KNOB_SETTINGS_SIZE];
1086 * Rescan the given bus, or bus/target/lun
1089 struct ccb_hdr ccb_h;
1094 * Turn on debugging for the given bus, bus/target, or bus/target/lun.
1097 struct ccb_hdr ccb_h;
1098 cam_debug_flags flags;
1101 /* Target mode structures. */
1104 struct ccb_hdr ccb_h;
1105 u_int16_t grp6_len; /* Group 6 VU CDB length */
1106 u_int16_t grp7_len; /* Group 7 VU CDB length */
1110 /* old, barely used immediate notify, binary compatibility */
1111 struct ccb_immed_notify {
1112 struct ccb_hdr ccb_h;
1113 struct scsi_sense_data sense_data;
1114 u_int8_t sense_len; /* Number of bytes in sense buffer */
1115 u_int8_t initiator_id; /* Id of initiator that selected */
1116 u_int8_t message_args[7]; /* Message Arguments */
1119 struct ccb_notify_ack {
1120 struct ccb_hdr ccb_h;
1121 u_int16_t seq_id; /* Sequence identifier */
1122 u_int8_t event; /* Event flags */
1125 struct ccb_immediate_notify {
1126 struct ccb_hdr ccb_h;
1127 u_int tag_id; /* Tag for immediate notify */
1128 u_int seq_id; /* Tag for target of notify */
1129 u_int initiator_id; /* Initiator Identifier */
1130 u_int arg; /* Function specific */
1133 struct ccb_notify_acknowledge {
1134 struct ccb_hdr ccb_h;
1135 u_int tag_id; /* Tag for immediate notify */
1136 u_int seq_id; /* Tar for target of notify */
1137 u_int initiator_id; /* Initiator Identifier */
1138 u_int arg; /* Response information */
1140 * Lower byte of arg is one of RESPONSE CODE values defined below
1141 * (subset of response codes from SPL-4 and FCP-4 specifications),
1142 * upper 3 bytes is code-specific ADDITIONAL RESPONSE INFORMATION.
1144 #define CAM_RSP_TMF_COMPLETE 0x00
1145 #define CAM_RSP_TMF_REJECTED 0x04
1146 #define CAM_RSP_TMF_FAILED 0x05
1147 #define CAM_RSP_TMF_SUCCEEDED 0x08
1148 #define CAM_RSP_TMF_INCORRECT_LUN 0x09
1151 /* HBA engine structures. */
1154 EIT_BUFFER, /* Engine type: buffer memory */
1155 EIT_LOSSLESS, /* Engine type: lossless compression */
1156 EIT_LOSSY, /* Engine type: lossy compression */
1157 EIT_ENCRYPT /* Engine type: encryption */
1161 EAD_VUNIQUE, /* Engine algorithm ID: vendor unique */
1162 EAD_LZ1V1, /* Engine algorithm ID: LZ1 var.1 */
1163 EAD_LZ2V1, /* Engine algorithm ID: LZ2 var.1 */
1164 EAD_LZ2V2 /* Engine algorithm ID: LZ2 var.2 */
1167 struct ccb_eng_inq {
1168 struct ccb_hdr ccb_h;
1169 u_int16_t eng_num; /* The engine number for this inquiry */
1170 ei_type eng_type; /* Returned engine type */
1171 ei_algo eng_algo; /* Returned engine algorithm type */
1172 u_int32_t eng_memeory; /* Returned engine memory size */
1175 struct ccb_eng_exec { /* This structure must match SCSIIO size */
1176 struct ccb_hdr ccb_h;
1177 u_int8_t *pdrv_ptr; /* Ptr used by the peripheral driver */
1178 u_int8_t *req_map; /* Ptr for mapping info on the req. */
1179 u_int8_t *data_ptr; /* Pointer to the data buf/SG list */
1180 u_int32_t dxfer_len; /* Data transfer length */
1181 u_int8_t *engdata_ptr; /* Pointer to the engine buffer data */
1182 u_int16_t sglist_cnt; /* Num of scatter gather list entries */
1183 u_int32_t dmax_len; /* Destination data maximum length */
1184 u_int32_t dest_len; /* Destination data length */
1185 int32_t src_resid; /* Source residual length: 2's comp */
1186 u_int32_t timeout; /* Timeout value */
1187 u_int16_t eng_num; /* Engine number for this request */
1188 u_int16_t vu_flags; /* Vendor Unique flags */
1192 * Definitions for the timeout field in the SCSI I/O CCB.
1194 #define CAM_TIME_DEFAULT 0x00000000 /* Use SIM default value */
1195 #define CAM_TIME_INFINITY 0xFFFFFFFF /* Infinite timeout */
1197 #define CAM_SUCCESS 0 /* For signaling general success */
1198 #define CAM_FAILURE 1 /* For signaling general failure */
1203 #define XPT_CCB_INVALID -1 /* for signaling a bad CCB to free */
1206 * CCB for working with advanced device information. This operates in a fashion
1207 * similar to XPT_GDEV_TYPE. Specify the target in ccb_h, the buffer
1208 * type requested, and provide a buffer size/buffer to write to. If the
1209 * buffer is too small, provsiz will be larger than bufsiz.
1211 struct ccb_dev_advinfo {
1212 struct ccb_hdr ccb_h;
1214 #define CDAI_FLAG_NONE 0x0 /* No flags set */
1215 #define CDAI_FLAG_STORE 0x1 /* If set, action becomes store */
1216 uint32_t buftype; /* IN: Type of data being requested */
1217 /* NB: buftype is interpreted on a per-transport basis */
1218 #define CDAI_TYPE_SCSI_DEVID 1
1219 #define CDAI_TYPE_SERIAL_NUM 2
1220 #define CDAI_TYPE_PHYS_PATH 3
1221 #define CDAI_TYPE_RCAPLONG 4
1222 #define CDAI_TYPE_EXT_INQ 5
1223 off_t bufsiz; /* IN: Size of external buffer */
1224 #define CAM_SCSI_DEVID_MAXLEN 65536 /* length in buffer is an uint16_t */
1225 off_t provsiz; /* OUT: Size required/used */
1226 uint8_t *buf; /* IN/OUT: Buffer for requested data */
1230 * CCB for sending async events
1233 struct ccb_hdr ccb_h;
1234 uint32_t async_code;
1235 off_t async_arg_size;
1236 void *async_arg_ptr;
1240 * Union of all CCB types for kernel space allocation. This union should
1241 * never be used for manipulating CCBs - its only use is for the allocation
1242 * and deallocation of raw CCB space and is the return type of xpt_ccb_alloc
1243 * and the argument to xpt_ccb_free.
1246 struct ccb_hdr ccb_h; /* For convenience */
1247 struct ccb_scsiio csio;
1248 struct ccb_getdev cgd;
1249 struct ccb_getdevlist cgdl;
1250 struct ccb_pathinq cpi;
1251 struct ccb_relsim crs;
1252 struct ccb_setasync csa;
1253 struct ccb_setdev csd;
1254 struct ccb_pathstats cpis;
1255 struct ccb_getdevstats cgds;
1256 struct ccb_dev_match cdm;
1257 struct ccb_trans_settings cts;
1258 struct ccb_calc_geometry ccg;
1259 struct ccb_sim_knob knob;
1260 struct ccb_abort cab;
1261 struct ccb_resetbus crb;
1262 struct ccb_resetdev crd;
1263 struct ccb_termio tio;
1264 struct ccb_accept_tio atio;
1265 struct ccb_scsiio ctio;
1266 struct ccb_en_lun cel;
1267 struct ccb_immed_notify cin;
1268 struct ccb_notify_ack cna;
1269 struct ccb_immediate_notify cin1;
1270 struct ccb_notify_acknowledge cna2;
1271 struct ccb_eng_inq cei;
1272 struct ccb_eng_exec cee;
1273 struct ccb_smpio smpio;
1274 struct ccb_rescan crcn;
1275 struct ccb_debug cdbg;
1276 struct ccb_ataio ataio;
1277 struct ccb_dev_advinfo cdai;
1278 struct ccb_async casync;
1279 struct ccb_nvmeio nvmeio;
1282 #define CCB_CLEAR_ALL_EXCEPT_HDR(ccbp) \
1283 bzero((char *)(ccbp) + sizeof((ccbp)->ccb_h), \
1284 sizeof(*(ccbp)) - sizeof((ccbp)->ccb_h))
1287 static __inline void
1288 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries,
1289 void (*cbfcnp)(struct cam_periph *, union ccb *),
1290 u_int32_t flags, u_int8_t tag_action,
1291 u_int8_t *data_ptr, u_int32_t dxfer_len,
1292 u_int8_t sense_len, u_int8_t cdb_len,
1295 static __inline void
1296 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1297 void (*cbfcnp)(struct cam_periph *, union ccb *),
1298 u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1301 static __inline void
1302 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries,
1303 void (*cbfcnp)(struct cam_periph *, union ccb *),
1304 u_int32_t flags, u_int tag_action, u_int tag_id,
1305 u_int init_id, u_int scsi_status, u_int8_t *data_ptr,
1306 u_int32_t dxfer_len, u_int32_t timeout);
1308 static __inline void
1309 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries,
1310 void (*cbfcnp)(struct cam_periph *, union ccb *),
1311 u_int32_t flags, u_int tag_action,
1312 u_int8_t *data_ptr, u_int32_t dxfer_len,
1315 static __inline void
1316 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries,
1317 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1318 uint8_t *smp_request, int smp_request_len,
1319 uint8_t *smp_response, int smp_response_len,
1322 static __inline void
1323 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries,
1324 void (*cbfcnp)(struct cam_periph *, union ccb *),
1325 u_int32_t flags, u_int8_t tag_action,
1326 u_int8_t *data_ptr, u_int32_t dxfer_len,
1327 u_int8_t sense_len, u_int8_t cdb_len,
1330 csio->ccb_h.func_code = XPT_SCSI_IO;
1331 csio->ccb_h.flags = flags;
1332 csio->ccb_h.xflags = 0;
1333 csio->ccb_h.retry_count = retries;
1334 csio->ccb_h.cbfcnp = cbfcnp;
1335 csio->ccb_h.timeout = timeout;
1336 csio->data_ptr = data_ptr;
1337 csio->dxfer_len = dxfer_len;
1338 csio->sense_len = sense_len;
1339 csio->cdb_len = cdb_len;
1340 csio->tag_action = tag_action;
1341 #if defined(BUF_TRACKING) || defined(FULL_BUF_TRACKING)
1346 static __inline void
1347 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries,
1348 void (*cbfcnp)(struct cam_periph *, union ccb *),
1349 u_int32_t flags, u_int tag_action, u_int tag_id,
1350 u_int init_id, u_int scsi_status, u_int8_t *data_ptr,
1351 u_int32_t dxfer_len, u_int32_t timeout)
1353 csio->ccb_h.func_code = XPT_CONT_TARGET_IO;
1354 csio->ccb_h.flags = flags;
1355 csio->ccb_h.xflags = 0;
1356 csio->ccb_h.retry_count = retries;
1357 csio->ccb_h.cbfcnp = cbfcnp;
1358 csio->ccb_h.timeout = timeout;
1359 csio->data_ptr = data_ptr;
1360 csio->dxfer_len = dxfer_len;
1361 csio->scsi_status = scsi_status;
1362 csio->tag_action = tag_action;
1363 csio->tag_id = tag_id;
1364 csio->init_id = init_id;
1367 static __inline void
1368 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries,
1369 void (*cbfcnp)(struct cam_periph *, union ccb *),
1370 u_int32_t flags, u_int tag_action __unused,
1371 u_int8_t *data_ptr, u_int32_t dxfer_len,
1374 ataio->ccb_h.func_code = XPT_ATA_IO;
1375 ataio->ccb_h.flags = flags;
1376 ataio->ccb_h.retry_count = retries;
1377 ataio->ccb_h.cbfcnp = cbfcnp;
1378 ataio->ccb_h.timeout = timeout;
1379 ataio->data_ptr = data_ptr;
1380 ataio->dxfer_len = dxfer_len;
1381 ataio->ata_flags = 0;
1384 static __inline void
1385 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries,
1386 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1387 uint8_t *smp_request, int smp_request_len,
1388 uint8_t *smp_response, int smp_response_len,
1392 KASSERT((flags & CAM_DIR_MASK) == CAM_DIR_BOTH,
1393 ("direction != CAM_DIR_BOTH"));
1394 KASSERT((smp_request != NULL) && (smp_response != NULL),
1395 ("need valid request and response buffers"));
1396 KASSERT((smp_request_len != 0) && (smp_response_len != 0),
1397 ("need non-zero request and response lengths"));
1399 smpio->ccb_h.func_code = XPT_SMP_IO;
1400 smpio->ccb_h.flags = flags;
1401 smpio->ccb_h.retry_count = retries;
1402 smpio->ccb_h.cbfcnp = cbfcnp;
1403 smpio->ccb_h.timeout = timeout;
1404 smpio->smp_request = smp_request;
1405 smpio->smp_request_len = smp_request_len;
1406 smpio->smp_response = smp_response;
1407 smpio->smp_response_len = smp_response_len;
1410 static __inline void
1411 cam_set_ccbstatus(union ccb *ccb, cam_status status)
1413 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
1414 ccb->ccb_h.status |= status;
1417 static __inline cam_status
1418 cam_ccb_status(union ccb *ccb)
1420 return ((cam_status)(ccb->ccb_h.status & CAM_STATUS_MASK));
1423 void cam_calc_geometry(struct ccb_calc_geometry *ccg, int extended);
1425 static __inline void
1426 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1427 void (*cbfcnp)(struct cam_periph *, union ccb *),
1428 u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1431 nvmeio->ccb_h.func_code = XPT_NVME_IO;
1432 nvmeio->ccb_h.flags = flags;
1433 nvmeio->ccb_h.retry_count = retries;
1434 nvmeio->ccb_h.cbfcnp = cbfcnp;
1435 nvmeio->ccb_h.timeout = timeout;
1436 nvmeio->data_ptr = data_ptr;
1437 nvmeio->dxfer_len = dxfer_len;
1441 #endif /* _CAM_CAM_CCB_H */