2 * Copyright (c) 2006 Bernd Walter <tisco@FreeBSD.org>
3 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org>
4 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org>
5 * Copyright (c) 2015-2017 Ilya Bakulin <kibab@FreeBSD.org>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer,
13 * without modification, immediately at the beginning of the file.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * Some code derived from the sys/dev/mmc and sys/cam/ata
30 * Thanks to Warner Losh <imp@FreeBSD.org>, Alexander Motin <mav@FreeBSD.org>
31 * Bernd Walter <tisco@FreeBSD.org>, and other authors.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 //#include "opt_sdda.h"
39 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
45 #include <sys/endian.h>
46 #include <sys/taskqueue.h>
48 #include <sys/mutex.h>
50 #include <sys/devicestat.h>
51 #include <sys/eventhandler.h>
52 #include <sys/malloc.h>
55 #include <sys/reboot.h>
56 #include <geom/geom_disk.h>
57 #include <machine/_inttypes.h> /* for PRIu64 */
66 #include <cam/cam_ccb.h>
67 #include <cam/cam_queue.h>
68 #include <cam/cam_periph.h>
69 #include <cam/cam_sim.h>
70 #include <cam/cam_xpt.h>
71 #include <cam/cam_xpt_sim.h>
72 #include <cam/cam_xpt_periph.h>
73 #include <cam/cam_xpt_internal.h>
74 #include <cam/cam_debug.h>
77 #include <cam/mmc/mmc_all.h>
79 #include <machine/md_var.h> /* geometry translation */
84 SDDA_FLAG_OPEN = 0x0002,
85 SDDA_FLAG_DIRTY = 0x0004
95 struct bio_queue_head bio_queue;
96 int outstanding_cmds; /* Number of active commands */
97 int refcount; /* Active xpt_action() calls */
100 struct mmc_data *mmcdata;
101 // sdda_quirks quirks;
102 struct task start_init_task;
105 uint8_t raw_ext_csd[512]; /* MMC only? */
109 /* Calculated from CSD */
110 uint64_t sector_count;
113 /* Calculated from CID */
114 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */
115 char card_sn_string[16];/* Formatted serial # for disk->d_ident */
116 /* Determined from CSD + is highspeed card*/
120 #define ccb_bp ppriv_ptr1
122 static disk_strategy_t sddastrategy;
123 static periph_init_t sddainit;
124 static void sddaasync(void *callback_arg, u_int32_t code,
125 struct cam_path *path, void *arg);
126 static periph_ctor_t sddaregister;
127 static periph_dtor_t sddacleanup;
128 static periph_start_t sddastart;
129 static periph_oninv_t sddaoninvalidate;
130 static void sddadone(struct cam_periph *periph,
131 union ccb *done_ccb);
132 static int sddaerror(union ccb *ccb, u_int32_t cam_flags,
133 u_int32_t sense_flags);
135 static uint16_t get_rca(struct cam_periph *periph);
136 static cam_status sdda_hook_into_geom(struct cam_periph *periph);
137 static void sdda_start_init(void *context, union ccb *start_ccb);
138 static void sdda_start_init_task(void *context, int pending);
140 static struct periph_driver sddadriver =
143 TAILQ_HEAD_INITIALIZER(sddadriver.units), /* generation */ 0
146 PERIPHDRIVER_DECLARE(sdda, sddadriver);
148 static MALLOC_DEFINE(M_SDDA, "sd_da", "sd_da buffers");
150 static const int exp[8] = {
151 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
154 static const int mant[16] = {
155 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
158 static const int cur_min[8] = {
159 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
162 static const int cur_max[8] = {
163 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
167 get_rca(struct cam_periph *periph) {
168 return periph->path->device->mmc_ident_data.card_rca;
172 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
174 const int i = (bit_len / 32) - (start / 32) - 1;
175 const int shift = start & 31;
176 uint32_t retval = bits[i] >> shift;
177 if (size + shift > 32)
178 retval |= bits[i - 1] << (32 - shift);
179 return (retval & ((1llu << size) - 1));
184 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
190 memset(csd, 0, sizeof(*csd));
191 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
193 m = mmc_get_bits(raw_csd, 128, 115, 4);
194 e = mmc_get_bits(raw_csd, 128, 112, 3);
195 csd->tacc = (exp[e] * mant[m] + 9) / 10;
196 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
197 m = mmc_get_bits(raw_csd, 128, 99, 4);
198 e = mmc_get_bits(raw_csd, 128, 96, 3);
199 csd->tran_speed = exp[e] * 10000 * mant[m];
200 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
201 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
202 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
203 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
204 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
205 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
206 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
207 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
208 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
209 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
210 m = mmc_get_bits(raw_csd, 128, 62, 12);
211 e = mmc_get_bits(raw_csd, 128, 47, 3);
212 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
213 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
214 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
215 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
216 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
217 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
218 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
219 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
221 m = mmc_get_bits(raw_csd, 128, 115, 4);
222 e = mmc_get_bits(raw_csd, 128, 112, 3);
223 csd->tacc = (exp[e] * mant[m] + 9) / 10;
224 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
225 m = mmc_get_bits(raw_csd, 128, 99, 4);
226 e = mmc_get_bits(raw_csd, 128, 96, 3);
227 csd->tran_speed = exp[e] * 10000 * mant[m];
228 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
229 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
230 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
231 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
232 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
233 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
234 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) *
236 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
237 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
238 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
239 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
240 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
241 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
242 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
244 panic("unknown SD CSD version");
248 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
253 memset(csd, 0, sizeof(*csd));
254 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
255 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
256 m = mmc_get_bits(raw_csd, 128, 115, 4);
257 e = mmc_get_bits(raw_csd, 128, 112, 3);
258 csd->tacc = exp[e] * mant[m] + 9 / 10;
259 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
260 m = mmc_get_bits(raw_csd, 128, 99, 4);
261 e = mmc_get_bits(raw_csd, 128, 96, 3);
262 csd->tran_speed = exp[e] * 10000 * mant[m];
263 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
264 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
265 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
266 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
267 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
268 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
269 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
270 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
271 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
272 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
273 m = mmc_get_bits(raw_csd, 128, 62, 12);
274 e = mmc_get_bits(raw_csd, 128, 47, 3);
275 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
276 csd->erase_blk_en = 0;
277 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
278 (mmc_get_bits(raw_csd, 128, 37, 5) + 1);
279 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
280 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
281 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
282 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
283 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
287 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
291 /* There's no version info, so we take it on faith */
292 memset(cid, 0, sizeof(*cid));
293 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
294 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
295 for (i = 0; i < 5; i++)
296 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
298 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
299 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
300 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
301 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
305 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid)
309 /* There's no version info, so we take it on faith */
310 memset(cid, 0, sizeof(*cid));
311 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
312 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
313 for (i = 0; i < 6; i++)
314 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
316 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
317 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
318 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
319 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997;
323 mmc_format_card_id_string(struct sdda_softc *sc, struct mmc_params *mmcp)
330 * Format a card ID string for use by the mmcsd driver, it's what
331 * appears between the <> in the following:
332 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0
333 * 22.5MHz/4bit/128-block
335 * Also format just the card serial number, which the mmcsd driver will
336 * use as the disk->d_ident string.
338 * The card_id_string in mmc_ivars is currently allocated as 64 bytes,
339 * and our max formatted length is currently 55 bytes if every field
340 * contains the largest value.
342 * Sometimes the oid is two printable ascii chars; when it's not,
343 * format it as 0xnnnn instead.
345 c1 = (sc->cid.oid >> 8) & 0x0ff;
346 c2 = sc->cid.oid & 0x0ff;
347 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f)
348 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2);
350 snprintf(oidstr, sizeof(oidstr), "0x%04x", sc->cid.oid);
351 snprintf(sc->card_sn_string, sizeof(sc->card_sn_string),
352 "%08X", sc->cid.psn);
353 snprintf(sc->card_id_string, sizeof(sc->card_id_string),
354 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s",
355 mmcp->card_features & CARD_FEATURE_MMC ? "MMC" : "SD",
356 mmcp->card_features & CARD_FEATURE_SDHC ? "HC" : "",
357 sc->cid.pnm, sc->cid.prv >> 4, sc->cid.prv & 0x0f,
358 sc->cid.psn, sc->cid.mdt_month, sc->cid.mdt_year,
359 sc->cid.mid, oidstr);
363 sddaopen(struct disk *dp)
365 struct cam_periph *periph;
366 struct sdda_softc *softc;
369 periph = (struct cam_periph *)dp->d_drv1;
370 if (cam_periph_acquire(periph) != CAM_REQ_CMP) {
374 cam_periph_lock(periph);
375 if ((error = cam_periph_hold(periph, PRIBIO|PCATCH)) != 0) {
376 cam_periph_unlock(periph);
377 cam_periph_release(periph);
381 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaopen\n"));
383 softc = (struct sdda_softc *)periph->softc;
384 softc->flags |= SDDA_FLAG_OPEN;
386 cam_periph_unhold(periph);
387 cam_periph_unlock(periph);
392 sddaclose(struct disk *dp)
394 struct cam_periph *periph;
395 struct sdda_softc *softc;
399 periph = (struct cam_periph *)dp->d_drv1;
400 softc = (struct sdda_softc *)periph->softc;
401 softc->flags &= ~SDDA_FLAG_OPEN;
403 cam_periph_lock(periph);
405 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaclose\n"));
407 while (softc->refcount != 0)
408 cam_periph_sleep(periph, &softc->refcount, PRIBIO, "sddaclose", 1);
409 cam_periph_unlock(periph);
410 cam_periph_release(periph);
415 sddaschedule(struct cam_periph *periph)
417 struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
419 /* Check if we have more work to do. */
420 if (bioq_first(&softc->bio_queue)) {
421 xpt_schedule(periph, CAM_PRIORITY_NORMAL);
426 * Actually translate the requested transfer into one the physical driver
427 * can understand. The transfer is described by a buf and will include
428 * only one physical transfer.
431 sddastrategy(struct bio *bp)
433 struct cam_periph *periph;
434 struct sdda_softc *softc;
436 periph = (struct cam_periph *)bp->bio_disk->d_drv1;
437 softc = (struct sdda_softc *)periph->softc;
439 cam_periph_lock(periph);
441 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastrategy(%p)\n", bp));
444 * If the device has been made invalid, error out
446 if ((periph->flags & CAM_PERIPH_INVALID) != 0) {
447 cam_periph_unlock(periph);
448 biofinish(bp, NULL, ENXIO);
453 * Place it in the queue of disk activities for this disk
455 bioq_disksort(&softc->bio_queue, bp);
458 * Schedule ourselves for performing the work.
460 sddaschedule(periph);
461 cam_periph_unlock(periph);
472 * Install a global async callback. This callback will
473 * receive async callbacks like "new device found".
475 status = xpt_register_async(AC_FOUND_DEVICE, sddaasync, NULL, NULL);
477 if (status != CAM_REQ_CMP) {
478 printf("sdda: Failed to attach master async callback "
479 "due to status 0x%x!\n", status);
484 * Callback from GEOM, called when it has finished cleaning up its
488 sddadiskgonecb(struct disk *dp)
490 struct cam_periph *periph;
492 periph = (struct cam_periph *)dp->d_drv1;
493 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddadiskgonecb\n"));
495 cam_periph_release(periph);
499 sddaoninvalidate(struct cam_periph *periph)
501 struct sdda_softc *softc;
503 softc = (struct sdda_softc *)periph->softc;
505 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaoninvalidate\n"));
508 * De-register any async callbacks.
510 xpt_register_async(0, sddaasync, periph, periph->path);
513 * Return all queued I/O with ENXIO.
514 * XXX Handle any transactions queued to the card
515 * with XPT_ABORT_CCB.
517 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush start\n"));
518 bioq_flush(&softc->bio_queue, NULL, ENXIO);
519 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush end\n"));
521 disk_gone(softc->disk);
525 sddacleanup(struct cam_periph *periph)
527 struct sdda_softc *softc;
529 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddacleanup\n"));
530 softc = (struct sdda_softc *)periph->softc;
532 cam_periph_unlock(periph);
534 disk_destroy(softc->disk);
535 free(softc, M_DEVBUF);
536 cam_periph_lock(periph);
540 sddaasync(void *callback_arg, u_int32_t code,
541 struct cam_path *path, void *arg)
543 struct ccb_getdev cgd;
544 struct cam_periph *periph;
545 struct sdda_softc *softc;
547 periph = (struct cam_periph *)callback_arg;
548 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddaasync(code=%d)\n", code));
550 case AC_FOUND_DEVICE:
552 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_FOUND_DEVICE\n"));
553 struct ccb_getdev *cgd;
556 cgd = (struct ccb_getdev *)arg;
560 if (cgd->protocol != PROTO_MMCSD)
563 if (!(path->device->mmc_ident_data.card_features & CARD_FEATURE_MEMORY)) {
564 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("No memory on the card!\n"));
569 * Allocate a peripheral instance for
570 * this device and start the probe
573 status = cam_periph_alloc(sddaregister, sddaoninvalidate,
574 sddacleanup, sddastart,
575 "sdda", CAM_PERIPH_BIO,
577 AC_FOUND_DEVICE, cgd);
579 if (status != CAM_REQ_CMP
580 && status != CAM_REQ_INPROG)
581 printf("sddaasync: Unable to attach to new device "
582 "due to status 0x%x\n", status);
585 case AC_GETDEV_CHANGED:
587 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_GETDEV_CHANGED\n"));
588 softc = (struct sdda_softc *)periph->softc;
589 xpt_setup_ccb(&cgd.ccb_h, periph->path, CAM_PRIORITY_NORMAL);
590 cgd.ccb_h.func_code = XPT_GDEV_TYPE;
591 xpt_action((union ccb *)&cgd);
592 cam_periph_async(periph, code, path, arg);
595 case AC_ADVINFO_CHANGED:
598 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_ADVINFO_CHANGED\n"));
599 buftype = (uintptr_t)arg;
600 if (buftype == CDAI_TYPE_PHYS_PATH) {
601 struct sdda_softc *softc;
603 softc = periph->softc;
604 disk_attr_changed(softc->disk, "GEOM::physpath",
612 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("AC_BUS_RESET"));
615 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> default?!\n"));
616 cam_periph_async(periph, code, path, arg);
623 sddagetattr(struct bio *bp)
626 struct cam_periph *periph;
628 periph = (struct cam_periph *)bp->bio_disk->d_drv1;
629 cam_periph_lock(periph);
630 ret = xpt_getattr(bp->bio_data, bp->bio_length, bp->bio_attribute,
632 cam_periph_unlock(periph);
634 bp->bio_completed = bp->bio_length;
639 sddaregister(struct cam_periph *periph, void *arg)
641 struct sdda_softc *softc;
642 // struct ccb_pathinq cpi;
643 struct ccb_getdev *cgd;
644 // char announce_buf[80], buf1[32];
646 union ccb *request_ccb; /* CCB representing the probe request */
648 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaregister\n"));
649 cgd = (struct ccb_getdev *)arg;
651 printf("sddaregister: no getdev CCB, can't register device\n");
652 return(CAM_REQ_CMP_ERR);
655 softc = (struct sdda_softc *)malloc(sizeof(*softc), M_DEVBUF,
659 printf("sddaregister: Unable to probe new device. "
660 "Unable to allocate softc\n");
661 return(CAM_REQ_CMP_ERR);
664 bioq_init(&softc->bio_queue);
665 softc->state = SDDA_STATE_INIT;
667 (struct mmc_data *) malloc(sizeof(struct mmc_data), M_DEVBUF, M_NOWAIT|M_ZERO);
668 periph->softc = softc;
670 request_ccb = (union ccb*) arg;
671 xpt_schedule(periph, CAM_PRIORITY_XPT);
672 TASK_INIT(&softc->start_init_task, 0, sdda_start_init_task, periph);
673 taskqueue_enqueue(taskqueue_thread, &softc->start_init_task);
675 return (CAM_REQ_CMP);
679 sdda_hook_into_geom(struct cam_periph *periph)
681 struct sdda_softc *softc;
682 struct ccb_pathinq cpi;
683 struct ccb_getdev cgd;
686 softc = (struct sdda_softc*) periph->softc;
688 xpt_path_inq(&cpi, periph->path);
690 bzero(&cgd, sizeof(cgd));
691 xpt_setup_ccb(&cgd.ccb_h, periph->path, CAM_PRIORITY_NONE);
692 cpi.ccb_h.func_code = XPT_GDEV_TYPE;
693 xpt_action((union ccb *)&cgd);
696 * Register this media as a disk
698 (void)cam_periph_hold(periph, PRIBIO);
699 cam_periph_unlock(periph);
701 softc->disk = disk_alloc();
702 softc->disk->d_rotation_rate = 0;
703 softc->disk->d_devstat = devstat_new_entry(periph->periph_name,
704 periph->unit_number, 512,
705 DEVSTAT_ALL_SUPPORTED,
706 DEVSTAT_TYPE_DIRECT |
707 XPORT_DEVSTAT_TYPE(cpi.transport),
708 DEVSTAT_PRIORITY_DISK);
709 softc->disk->d_open = sddaopen;
710 softc->disk->d_close = sddaclose;
711 softc->disk->d_strategy = sddastrategy;
712 softc->disk->d_getattr = sddagetattr;
713 // softc->disk->d_dump = sddadump;
714 softc->disk->d_gone = sddadiskgonecb;
715 softc->disk->d_name = "sdda";
716 softc->disk->d_drv1 = periph;
717 maxio = cpi.maxio; /* Honor max I/O size of SIM */
719 maxio = DFLTPHYS; /* traditional default */
720 else if (maxio > MAXPHYS)
721 maxio = MAXPHYS; /* for safety */
722 softc->disk->d_maxsize = maxio;
723 softc->disk->d_unit = periph->unit_number;
724 softc->disk->d_flags = DISKFLAG_CANDELETE;
725 strlcpy(softc->disk->d_descr, softc->card_id_string,
726 MIN(sizeof(softc->disk->d_descr), sizeof(softc->card_id_string)));
727 strlcpy(softc->disk->d_ident, softc->card_sn_string,
728 MIN(sizeof(softc->disk->d_ident), sizeof(softc->card_sn_string)));
729 softc->disk->d_hba_vendor = cpi.hba_vendor;
730 softc->disk->d_hba_device = cpi.hba_device;
731 softc->disk->d_hba_subvendor = cpi.hba_subvendor;
732 softc->disk->d_hba_subdevice = cpi.hba_subdevice;
734 softc->disk->d_sectorsize = 512;
735 softc->disk->d_mediasize = softc->mediasize;
736 softc->disk->d_stripesize = 0;
737 softc->disk->d_fwsectors = 0;
738 softc->disk->d_fwheads = 0;
741 * Acquire a reference to the periph before we register with GEOM.
742 * We'll release this reference once GEOM calls us back (via
743 * sddadiskgonecb()) telling us that our provider has been freed.
745 if (cam_periph_acquire(periph) != CAM_REQ_CMP) {
746 xpt_print(periph->path, "%s: lost periph during "
747 "registration!\n", __func__);
748 cam_periph_lock(periph);
749 return (CAM_REQ_CMP_ERR);
751 disk_create(softc->disk, DISK_VERSION);
752 cam_periph_lock(periph);
753 cam_periph_unhold(periph);
755 xpt_announce_periph(periph, softc->card_id_string);
758 * Add async callbacks for bus reset and
759 * bus device reset calls. I don't bother
760 * checking if this fails as, in most cases,
761 * the system will function just fine without
762 * them and the only alternative would be to
763 * not attach the device on failure.
765 xpt_register_async(AC_SENT_BDR | AC_BUS_RESET | AC_LOST_DEVICE |
766 AC_GETDEV_CHANGED | AC_ADVINFO_CHANGED,
767 sddaasync, periph, periph->path);
773 mmc_exec_app_cmd(struct cam_periph *periph, union ccb *ccb,
774 struct mmc_command *cmd) {
777 /* Send APP_CMD first */
778 memset(&ccb->mmcio.cmd, 0, sizeof(struct mmc_command));
779 memset(&ccb->mmcio.stop, 0, sizeof(struct mmc_command));
780 cam_fill_mmcio(&ccb->mmcio,
783 /*flags*/ CAM_DIR_NONE,
784 /*mmc_opcode*/ MMC_APP_CMD,
785 /*mmc_arg*/ get_rca(periph) << 16,
786 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_AC,
790 err = cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
793 if (!(ccb->mmcio.cmd.resp[0] & R1_APP_CMD))
794 return MMC_ERR_FAILED;
796 /* Now exec actual command */
798 if (cmd->data != NULL) {
799 ccb->mmcio.cmd.data = cmd->data;
800 if (cmd->data->flags & MMC_DATA_READ)
802 if (cmd->data->flags & MMC_DATA_WRITE)
803 flags |= CAM_DIR_OUT;
804 } else flags = CAM_DIR_NONE;
806 cam_fill_mmcio(&ccb->mmcio,
810 /*mmc_opcode*/ cmd->opcode,
811 /*mmc_arg*/ cmd->arg,
812 /*mmc_flags*/ cmd->flags,
813 /*mmc_data*/ cmd->data,
816 err = cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
817 memcpy(cmd->resp, ccb->mmcio.cmd.resp, sizeof(cmd->resp));
818 cmd->error = ccb->mmcio.cmd.error;
825 mmc_app_get_scr(struct cam_periph *periph, union ccb *ccb, uint32_t *rawscr) {
827 struct mmc_command cmd;
830 memset(&cmd, 0, sizeof(cmd));
832 memset(rawscr, 0, 8);
833 cmd.opcode = ACMD_SEND_SCR;
834 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
839 d.flags = MMC_DATA_READ;
842 err = mmc_exec_app_cmd(periph, ccb, &cmd);
843 rawscr[0] = be32toh(rawscr[0]);
844 rawscr[1] = be32toh(rawscr[1]);
849 mmc_send_ext_csd(struct cam_periph *periph, union ccb *ccb,
850 uint8_t *rawextcsd, size_t buf_len) {
854 KASSERT(buf_len == 512, ("Buffer for ext csd must be 512 bytes"));
857 d.flags = MMC_DATA_READ;
858 memset(d.data, 0, d.len);
860 cam_fill_mmcio(&ccb->mmcio,
863 /*flags*/ CAM_DIR_IN,
864 /*mmc_opcode*/ MMC_SEND_EXT_CSD,
866 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC,
870 err = cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
873 if (!(ccb->mmcio.cmd.resp[0] & R1_APP_CMD))
874 return MMC_ERR_FAILED;
880 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
882 unsigned int scr_struct;
884 memset(scr, 0, sizeof(*scr));
886 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
887 if (scr_struct != 0) {
888 printf("Unrecognised SCR structure version %d\n",
892 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
893 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
897 mmc_switch(struct cam_periph *periph, union ccb *ccb,
898 uint8_t set, uint8_t index, uint8_t value)
900 int arg = (MMC_SWITCH_FUNC_WR << 24) |
904 cam_fill_mmcio(&ccb->mmcio,
907 /*flags*/ CAM_DIR_NONE,
908 /*mmc_opcode*/ MMC_SWITCH_FUNC,
910 /*mmc_flags*/ MMC_RSP_R1B | MMC_CMD_AC,
914 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
916 if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP)) {
917 if (ccb->mmcio.cmd.error != 0) {
918 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH,
919 ("%s: MMC command failed", __func__));
922 return 0; /* Normal return */
924 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH,
925 ("%s: CAM request failed\n", __func__));
932 mmc_sd_switch(struct cam_periph *periph, union ccb *ccb,
933 uint8_t mode, uint8_t grp, uint8_t value,
936 struct mmc_data mmc_d;
941 mmc_d.flags = MMC_DATA_READ;
943 cam_fill_mmcio(&ccb->mmcio,
946 /*flags*/ CAM_DIR_IN,
947 /*mmc_opcode*/ SD_SWITCH_FUNC,
948 /*mmc_arg*/ mode << 31,
949 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC,
953 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
955 if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP)) {
956 if (ccb->mmcio.cmd.error != 0) {
957 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH,
958 ("%s: MMC command failed", __func__));
961 return 0; /* Normal return */
963 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH,
964 ("%s: CAM request failed\n", __func__));
970 mmc_set_timing(struct cam_periph *periph,
972 enum mmc_bus_timing timing)
974 u_char switch_res[64];
977 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
979 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE,
980 ("mmc_set_timing(timing=%d)", timing));
982 case bus_timing_normal:
989 return (MMC_ERR_INVALID);
991 if (mmcp->card_features & CARD_FEATURE_MMC) {
992 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL,
993 EXT_CSD_HS_TIMING, value);
995 err = mmc_sd_switch(periph, ccb, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, value, switch_res);
998 /* Set high-speed timing on the host */
999 struct ccb_trans_settings_mmc *cts;
1000 cts = &ccb->cts.proto_specific.mmc;
1001 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1002 ccb->ccb_h.flags = CAM_DIR_NONE;
1003 ccb->ccb_h.retry_count = 0;
1004 ccb->ccb_h.timeout = 100;
1005 ccb->ccb_h.cbfcnp = NULL;
1006 cts->ios.timing = timing;
1007 cts->ios_valid = MMC_BT;
1014 sdda_start_init_task(void *context, int pending) {
1016 struct cam_periph *periph;
1018 periph = (struct cam_periph *)context;
1019 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init_task\n"));
1020 new_ccb = xpt_alloc_ccb();
1021 xpt_setup_ccb(&new_ccb->ccb_h, periph->path,
1024 cam_periph_lock(periph);
1025 sdda_start_init(context, new_ccb);
1026 cam_periph_unlock(periph);
1027 xpt_free_ccb(new_ccb);
1031 sdda_set_bus_width(struct cam_periph *periph, union ccb *ccb, int width) {
1032 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1035 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_set_bus_width\n"));
1037 /* First set for the card, then for the host */
1038 if (mmcp->card_features & CARD_FEATURE_MMC) {
1042 value = EXT_CSD_BUS_WIDTH_1;
1045 value = EXT_CSD_BUS_WIDTH_4;
1048 value = EXT_CSD_BUS_WIDTH_8;
1051 panic("Invalid bus width %d", width);
1053 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL,
1054 EXT_CSD_BUS_WIDTH, value);
1056 /* For SD cards we send ACMD6 with the required bus width in arg */
1057 struct mmc_command cmd;
1058 memset(&cmd, 0, sizeof(struct mmc_command));
1059 cmd.opcode = ACMD_SET_BUS_WIDTH;
1061 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1062 err = mmc_exec_app_cmd(periph, ccb, &cmd);
1065 if (err != MMC_ERR_NONE) {
1066 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Error %d when setting bus width on the card\n", err));
1069 /* Now card is done, set the host to the same width */
1070 struct ccb_trans_settings_mmc *cts;
1071 cts = &ccb->cts.proto_specific.mmc;
1072 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1073 ccb->ccb_h.flags = CAM_DIR_NONE;
1074 ccb->ccb_h.retry_count = 0;
1075 ccb->ccb_h.timeout = 100;
1076 ccb->ccb_h.cbfcnp = NULL;
1077 cts->ios.bus_width = width;
1078 cts->ios_valid = MMC_BW;
1082 static inline const char *bus_width_str(enum mmc_bus_width w) {
1094 sdda_start_init(void *context, union ccb *start_ccb) {
1095 struct cam_periph *periph;
1096 periph = (struct cam_periph *)context;
1099 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init\n"));
1100 /* periph was held for us when this task was enqueued */
1101 if ((periph->flags & CAM_PERIPH_INVALID) != 0) {
1102 cam_periph_release(periph);
1106 struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
1107 //struct ccb_mmcio *mmcio = &start_ccb->mmcio;
1108 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1109 struct cam_ed *device = periph->path->device;
1111 if (mmcp->card_features & CARD_FEATURE_MMC) {
1112 mmc_decode_csd_mmc(mmcp->card_csd, &softc->csd);
1113 mmc_decode_cid_mmc(mmcp->card_cid, &softc->cid);
1114 if (softc->csd.spec_vers >= 4)
1115 err = mmc_send_ext_csd(periph, start_ccb,
1116 (uint8_t *)&softc->raw_ext_csd,
1117 sizeof(softc->raw_ext_csd));
1119 mmc_decode_csd_sd(mmcp->card_csd, &softc->csd);
1120 mmc_decode_cid_sd(mmcp->card_cid, &softc->cid);
1123 softc->sector_count = softc->csd.capacity / 512;
1124 softc->mediasize = softc->csd.capacity;
1126 /* MMC >= 4.x have EXT_CSD that has its own opinion about capacity */
1127 if (softc->csd.spec_vers >= 4) {
1128 uint32_t sec_count = softc->raw_ext_csd[EXT_CSD_SEC_CNT] +
1129 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) +
1130 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) +
1131 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1132 if (sec_count != 0) {
1133 softc->sector_count = sec_count;
1134 softc->mediasize = softc->sector_count * 512;
1135 /* FIXME: there should be a better name for this option...*/
1136 mmcp->card_features |= CARD_FEATURE_SDHC;
1140 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1141 ("Capacity: %"PRIu64", sectors: %"PRIu64"\n",
1143 softc->sector_count));
1144 mmc_format_card_id_string(softc, mmcp);
1146 /* Update info for CAM */
1147 device->serial_num_len = strlen(softc->card_sn_string);
1148 device->serial_num =
1149 (u_int8_t *)malloc((device->serial_num_len + 1),
1150 M_CAMXPT, M_NOWAIT);
1151 strlcpy(device->serial_num, softc->card_sn_string, device->serial_num_len);
1153 device->device_id_len = strlen(softc->card_id_string);
1155 (u_int8_t *)malloc((device->device_id_len + 1),
1156 M_CAMXPT, M_NOWAIT);
1157 strlcpy(device->device_id, softc->card_id_string, device->device_id_len);
1159 strlcpy(mmcp->model, softc->card_id_string, sizeof(mmcp->model));
1161 /* Set the clock frequency that the card can handle */
1162 struct ccb_trans_settings_mmc *cts;
1163 cts = &start_ccb->cts.proto_specific.mmc;
1165 /* First, get the host's max freq */
1166 start_ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS;
1167 start_ccb->ccb_h.flags = CAM_DIR_NONE;
1168 start_ccb->ccb_h.retry_count = 0;
1169 start_ccb->ccb_h.timeout = 100;
1170 start_ccb->ccb_h.cbfcnp = NULL;
1171 xpt_action(start_ccb);
1173 if (start_ccb->ccb_h.status != CAM_REQ_CMP)
1174 panic("Cannot get max host freq");
1175 int host_f_max = cts->host_f_max;
1176 uint32_t host_caps = cts->host_caps;
1177 if (cts->ios.bus_width != bus_width_1)
1178 panic("Bus width in ios is not 1-bit");
1180 /* Now check if the card supports High-speed */
1181 softc->card_f_max = softc->csd.tran_speed;
1183 if (host_caps & MMC_CAP_HSPEED) {
1184 /* Find out if the card supports High speed timing */
1185 if (mmcp->card_features & CARD_FEATURE_SD20) {
1186 /* Get and decode SCR */
1189 if (mmc_app_get_scr(periph, start_ccb, &rawscr)) {
1190 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Cannot get SCR\n"));
1191 goto finish_hs_tests;
1193 mmc_app_decode_scr(&rawscr, &softc->scr);
1195 if ((softc->scr.sda_vsn >= 1) && (softc->csd.ccc & (1<<10))) {
1196 mmc_sd_switch(periph, start_ccb, SD_SWITCH_MODE_CHECK,
1197 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, res);
1199 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS\n"));
1200 softc->card_f_max = SD_HS_MAX;
1203 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Not trying the switch\n"));
1204 goto finish_hs_tests;
1208 if (mmcp->card_features & CARD_FEATURE_MMC && softc->csd.spec_vers >= 4) {
1209 if (softc->raw_ext_csd[EXT_CSD_CARD_TYPE]
1210 & EXT_CSD_CARD_TYPE_HS_52)
1211 softc->card_f_max = MMC_TYPE_HS_52_MAX;
1212 else if (softc->raw_ext_csd[EXT_CSD_CARD_TYPE]
1213 & EXT_CSD_CARD_TYPE_HS_26)
1214 softc->card_f_max = MMC_TYPE_HS_26_MAX;
1219 f_max = min(host_f_max, softc->card_f_max);
1220 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Set SD freq to %d MHz (min out of host f=%d MHz and card f=%d MHz)\n", f_max / 1000000, host_f_max / 1000000, softc->card_f_max / 1000000));
1222 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1223 start_ccb->ccb_h.flags = CAM_DIR_NONE;
1224 start_ccb->ccb_h.retry_count = 0;
1225 start_ccb->ccb_h.timeout = 100;
1226 start_ccb->ccb_h.cbfcnp = NULL;
1227 cts->ios.clock = f_max;
1228 cts->ios_valid = MMC_CLK;
1229 xpt_action(start_ccb);
1232 enum mmc_bus_width desired_bus_width = bus_width_1;
1233 enum mmc_bus_width max_host_bus_width =
1234 (host_caps & MMC_CAP_8_BIT_DATA ? bus_width_8 :
1235 host_caps & MMC_CAP_4_BIT_DATA ? bus_width_4 : bus_width_1);
1236 enum mmc_bus_width max_card_bus_width = bus_width_1;
1237 if (mmcp->card_features & CARD_FEATURE_SD20 &&
1238 softc->scr.bus_widths & SD_SCR_BUS_WIDTH_4)
1239 max_card_bus_width = bus_width_4;
1241 * Unlike SD, MMC cards don't have any information about supported bus width...
1242 * So we need to perform read/write test to find out the width.
1244 /* TODO: figure out bus width for MMC; use 8-bit for now (to test on BBB) */
1245 if (mmcp->card_features & CARD_FEATURE_MMC)
1246 max_card_bus_width = bus_width_8;
1248 desired_bus_width = min(max_host_bus_width, max_card_bus_width);
1249 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1250 ("Set bus width to %s (min of host %s and card %s)\n",
1251 bus_width_str(desired_bus_width),
1252 bus_width_str(max_host_bus_width),
1253 bus_width_str(max_card_bus_width)));
1254 sdda_set_bus_width(periph, start_ccb, desired_bus_width);
1256 if (f_max > 25000000) {
1257 err = mmc_set_timing(periph, start_ccb, bus_timing_hs);
1258 if (err != MMC_ERR_NONE)
1259 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("Cannot switch card to high-speed mode"));
1261 softc->state = SDDA_STATE_NORMAL;
1262 sdda_hook_into_geom(periph);
1265 /* Called with periph lock held! */
1267 sddastart(struct cam_periph *periph, union ccb *start_ccb)
1269 struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
1270 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1272 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastart\n"));
1274 if (softc->state != SDDA_STATE_NORMAL) {
1275 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("device is not in SDDA_STATE_NORMAL yet"));
1276 xpt_release_ccb(start_ccb);
1281 /* Run regular command. */
1282 bp = bioq_first(&softc->bio_queue);
1284 xpt_release_ccb(start_ccb);
1287 bioq_remove(&softc->bio_queue, bp);
1289 switch (bp->bio_cmd) {
1291 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_WRITE\n"));
1292 softc->flags |= SDDA_FLAG_DIRTY;
1296 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_READ\n"));
1297 uint64_t blockno = bp->bio_pblkno;
1298 uint16_t count = bp->bio_bcount / 512;
1301 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("Block %"PRIu64" cnt %u\n", blockno, count));
1303 /* Construct new MMC command */
1304 if (bp->bio_cmd == BIO_READ) {
1306 opcode = MMC_READ_MULTIPLE_BLOCK;
1308 opcode = MMC_READ_SINGLE_BLOCK;
1311 opcode = MMC_WRITE_MULTIPLE_BLOCK;
1313 opcode = MMC_WRITE_BLOCK;
1316 start_ccb->ccb_h.func_code = XPT_MMC_IO;
1317 start_ccb->ccb_h.flags = (bp->bio_cmd == BIO_READ ? CAM_DIR_IN : CAM_DIR_OUT);
1318 start_ccb->ccb_h.retry_count = 0;
1319 start_ccb->ccb_h.timeout = 15 * 1000;
1320 start_ccb->ccb_h.cbfcnp = sddadone;
1321 struct ccb_mmcio *mmcio;
1323 mmcio = &start_ccb->mmcio;
1324 mmcio->cmd.opcode = opcode;
1325 mmcio->cmd.arg = blockno;
1326 if (!(mmcp->card_features & CARD_FEATURE_SDHC))
1327 mmcio->cmd.arg <<= 9;
1329 mmcio->cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1330 mmcio->cmd.data = softc->mmcdata;
1331 mmcio->cmd.data->data = bp->bio_data;
1332 mmcio->cmd.data->len = 512 * count;
1333 mmcio->cmd.data->flags = (bp->bio_cmd == BIO_READ ? MMC_DATA_READ : MMC_DATA_WRITE);
1334 /* Direct h/w to issue CMD12 upon completion */
1336 mmcio->stop.opcode = MMC_STOP_TRANSMISSION;
1337 mmcio->stop.flags = MMC_RSP_R1B | MMC_CMD_AC;
1338 mmcio->stop.arg = 0;
1344 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_FLUSH\n"));
1345 sddaschedule(periph);
1348 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_DELETE\n"));
1349 sddaschedule(periph);
1352 start_ccb->ccb_h.ccb_bp = bp;
1353 softc->outstanding_cmds++;
1355 cam_periph_unlock(periph);
1356 xpt_action(start_ccb);
1357 cam_periph_lock(periph);
1360 /* May have more work to do, so ensure we stay scheduled */
1361 sddaschedule(periph);
1365 sddadone(struct cam_periph *periph, union ccb *done_ccb)
1367 struct sdda_softc *softc;
1368 struct ccb_mmcio *mmcio;
1369 // struct ccb_getdev *cgd;
1370 struct cam_path *path;
1373 softc = (struct sdda_softc *)periph->softc;
1374 mmcio = &done_ccb->mmcio;
1375 path = done_ccb->ccb_h.path;
1377 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddadone\n"));
1382 // cam_periph_lock(periph);
1383 if ((done_ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
1384 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("Error!!!\n"));
1385 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0)
1386 cam_release_devq(path,
1390 /*getcount_only*/0);
1391 error = 5; /* EIO */
1393 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0)
1394 panic("REQ_CMP with QFRZN");
1399 bp = (struct bio *)done_ccb->ccb_h.ccb_bp;
1400 bp->bio_error = error;
1402 bp->bio_resid = bp->bio_bcount;
1403 bp->bio_flags |= BIO_ERROR;
1405 /* XXX: How many bytes remaining? */
1407 if (bp->bio_resid > 0)
1408 bp->bio_flags |= BIO_ERROR;
1411 uint32_t card_status = mmcio->cmd.resp[0];
1412 CAM_DEBUG(path, CAM_DEBUG_TRACE,
1413 ("Card status: %08x\n", R1_STATUS(card_status)));
1414 CAM_DEBUG(path, CAM_DEBUG_TRACE,
1415 ("Current state: %d\n", R1_CURRENT_STATE(card_status)));
1417 softc->outstanding_cmds--;
1418 xpt_release_ccb(done_ccb);
1423 sddaerror(union ccb *ccb, u_int32_t cam_flags, u_int32_t sense_flags)
1425 return(cam_periph_error(ccb, cam_flags, sense_flags));
1427 #endif /* _KERNEL */