2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2000 Matthew Jacob
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification, immediately at the beginning of the file.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
35 #include <sys/errno.h>
36 #include <sys/kernel.h>
37 #include <sys/malloc.h>
38 #include <sys/mutex.h>
39 #include <sys/queue.h>
41 #include <sys/systm.h>
42 #include <sys/sysctl.h>
43 #include <sys/types.h>
46 #include <cam/cam_ccb.h>
47 #include <cam/cam_periph.h>
49 #include <cam/scsi/scsi_enc.h>
50 #include <cam/scsi/scsi_enc_internal.h>
51 #include <cam/scsi/scsi_message.h>
54 * SAF-TE Type Device Emulation
57 static int safte_set_enc_status(enc_softc_t *enc, uint8_t encstat, int slpflag);
59 #define ALL_ENC_STAT (SES_ENCSTAT_CRITICAL | SES_ENCSTAT_UNRECOV | \
60 SES_ENCSTAT_NONCRITICAL | SES_ENCSTAT_INFO)
62 * SAF-TE specific defines- Mandatory ones only...
66 * READ BUFFER ('get' commands) IDs- placed in offset 2 of cdb
68 #define SAFTE_RD_RDCFG 0x00 /* read enclosure configuration */
69 #define SAFTE_RD_RDESTS 0x01 /* read enclosure status */
70 #define SAFTE_RD_RDDSTS 0x04 /* read drive slot status */
71 #define SAFTE_RD_RDGFLG 0x05 /* read global flags */
74 * WRITE BUFFER ('set' commands) IDs- placed in offset 0 of databuf
76 #define SAFTE_WT_DSTAT 0x10 /* write device slot status */
77 #define SAFTE_WT_SLTOP 0x12 /* perform slot operation */
78 #define SAFTE_WT_FANSPD 0x13 /* set fan speed */
79 #define SAFTE_WT_ACTPWS 0x14 /* turn on/off power supply */
80 #define SAFTE_WT_GLOBAL 0x15 /* send global command */
82 #define SAFT_SCRATCH 64
87 SAFTE_UPDATE_READCONFIG,
88 SAFTE_UPDATE_READGFLAGS,
89 SAFTE_UPDATE_READENCSTATUS,
90 SAFTE_UPDATE_READSLOTSTATUS,
91 SAFTE_PROCESS_CONTROL_REQS,
92 SAFTE_NUM_UPDATE_STATES
93 } safte_update_action;
95 static fsm_fill_handler_t safte_fill_read_buf_io;
96 static fsm_fill_handler_t safte_fill_control_request;
97 static fsm_done_handler_t safte_process_config;
98 static fsm_done_handler_t safte_process_gflags;
99 static fsm_done_handler_t safte_process_status;
100 static fsm_done_handler_t safte_process_slotstatus;
101 static fsm_done_handler_t safte_process_control_request;
103 static struct enc_fsm_state enc_fsm_states[SAFTE_NUM_UPDATE_STATES] =
105 { "SAFTE_UPDATE_NONE", 0, 0, 0, NULL, NULL, NULL },
107 "SAFTE_UPDATE_READCONFIG",
111 safte_fill_read_buf_io,
112 safte_process_config,
116 "SAFTE_UPDATE_READGFLAGS",
120 safte_fill_read_buf_io,
121 safte_process_gflags,
125 "SAFTE_UPDATE_READENCSTATUS",
129 safte_fill_read_buf_io,
130 safte_process_status,
134 "SAFTE_UPDATE_READSLOTSTATUS",
138 safte_fill_read_buf_io,
139 safte_process_slotstatus,
143 "SAFTE_PROCESS_CONTROL_REQS",
147 safte_fill_control_request,
148 safte_process_control_request,
153 typedef struct safte_control_request {
157 TAILQ_ENTRY(safte_control_request) links;
158 } safte_control_request_t;
159 TAILQ_HEAD(safte_control_reqlist, safte_control_request);
160 typedef struct safte_control_reqlist safte_control_reqlist_t;
162 SES_SETSTATUS_ENC_IDX = -1
166 safte_terminate_control_requests(safte_control_reqlist_t *reqlist, int result)
168 safte_control_request_t *req;
170 while ((req = TAILQ_FIRST(reqlist)) != NULL) {
171 TAILQ_REMOVE(reqlist, req, links);
172 req->result = result;
179 * Cached Configuration
181 uint8_t Nfans; /* Number of Fans */
182 uint8_t Npwr; /* Number of Power Supplies */
183 uint8_t Nslots; /* Number of Device Slots */
184 uint8_t DoorLock; /* Door Lock Installed */
185 uint8_t Ntherm; /* Number of Temperature Sensors */
186 uint8_t Nspkrs; /* Number of Speakers */
187 uint8_t Ntstats; /* Number of Thermostats */
189 * Cached Flag Bytes for Global Status
194 * What object index ID is where various slots start.
198 #define SAFT_ALARM_OFFSET(cc) (cc)->slotoff - 1
200 encioc_enc_status_t adm_status;
201 encioc_enc_status_t enc_status;
202 encioc_enc_status_t slot_status;
204 safte_control_reqlist_t requests;
205 safte_control_request_t *current_request;
206 int current_request_stage;
207 int current_request_stages;
210 #define SAFT_FLG1_ALARM 0x1
211 #define SAFT_FLG1_GLOBFAIL 0x2
212 #define SAFT_FLG1_GLOBWARN 0x4
213 #define SAFT_FLG1_ENCPWROFF 0x8
214 #define SAFT_FLG1_ENCFANFAIL 0x10
215 #define SAFT_FLG1_ENCPWRFAIL 0x20
216 #define SAFT_FLG1_ENCDRVFAIL 0x40
217 #define SAFT_FLG1_ENCDRVWARN 0x80
219 #define SAFT_FLG2_LOCKDOOR 0x4
220 #define SAFT_PRIVATE sizeof (struct scfg)
222 static char *safte_2little = "Too Little Data Returned (%d) at line %d\n";
223 #define SAFT_BAIL(r, x) \
225 ENC_VLOG(enc, safte_2little, x, __LINE__);\
229 int emulate_array_devices = 1;
230 SYSCTL_INT(_kern_cam_enc, OID_AUTO, emulate_array_devices, CTLFLAG_RWTUN,
231 &emulate_array_devices, 0, "Emulate Array Devices for SAF-TE");
234 safte_fill_read_buf_io(enc_softc_t *enc, struct enc_fsm_state *state,
235 union ccb *ccb, uint8_t *buf)
238 if (state->page_code != SAFTE_RD_RDCFG &&
239 enc->enc_cache.nelms == 0) {
240 enc_update_request(enc, SAFTE_UPDATE_READCONFIG);
244 if (enc->enc_type == ENC_SEMB_SAFT) {
245 semb_read_buffer(&ccb->ataio, /*retries*/5,
246 NULL, MSG_SIMPLE_Q_TAG,
247 state->page_code, buf, state->buf_size,
250 scsi_read_buffer(&ccb->csio, /*retries*/5,
251 NULL, MSG_SIMPLE_Q_TAG, 1,
252 state->page_code, 0, buf, state->buf_size,
253 SSD_FULL_SIZE, state->timeout);
259 safte_process_config(enc_softc_t *enc, struct enc_fsm_state *state,
260 union ccb *ccb, uint8_t **bufp, int error, int xfer_len)
263 uint8_t *buf = *bufp;
266 cfg = enc->enc_private;
272 ENC_VLOG(enc, "too little data (%d) for configuration\n",
278 cfg->Nslots = buf[2];
279 cfg->DoorLock = buf[3];
280 cfg->Ntherm = buf[4];
281 cfg->Nspkrs = buf[5];
283 cfg->Ntstats = buf[6] & 0x0f;
286 ENC_VLOG(enc, "Nfans %d Npwr %d Nslots %d Lck %d Ntherm %d Nspkrs %d "
288 cfg->Nfans, cfg->Npwr, cfg->Nslots, cfg->DoorLock, cfg->Ntherm,
289 cfg->Nspkrs, cfg->Ntstats);
291 enc->enc_cache.nelms = cfg->Nfans + cfg->Npwr + cfg->Nslots +
292 cfg->DoorLock + cfg->Ntherm + cfg->Nspkrs + cfg->Ntstats + 1;
293 ENC_FREE_AND_NULL(enc->enc_cache.elm_map);
294 enc->enc_cache.elm_map =
295 malloc(enc->enc_cache.nelms * sizeof(enc_element_t),
296 M_SCSIENC, M_WAITOK|M_ZERO);
300 * Note that this is all arranged for the convenience
301 * in later fetches of status.
303 for (i = 0; i < cfg->Nfans; i++)
304 enc->enc_cache.elm_map[r++].elm_type = ELMTYP_FAN;
305 cfg->pwroff = (uint8_t) r;
306 for (i = 0; i < cfg->Npwr; i++)
307 enc->enc_cache.elm_map[r++].elm_type = ELMTYP_POWER;
308 for (i = 0; i < cfg->DoorLock; i++)
309 enc->enc_cache.elm_map[r++].elm_type = ELMTYP_DOORLOCK;
311 enc->enc_cache.elm_map[r++].elm_type = ELMTYP_ALARM;
312 for (i = 0; i < cfg->Ntherm; i++)
313 enc->enc_cache.elm_map[r++].elm_type = ELMTYP_THERM;
314 for (i = 0; i <= cfg->Ntstats; i++)
315 enc->enc_cache.elm_map[r++].elm_type = ELMTYP_THERM;
316 cfg->slotoff = (uint8_t) r;
317 for (i = 0; i < cfg->Nslots; i++)
318 enc->enc_cache.elm_map[r++].elm_type =
319 emulate_array_devices ? ELMTYP_ARRAY_DEV :
322 enc_update_request(enc, SAFTE_UPDATE_READGFLAGS);
323 enc_update_request(enc, SAFTE_UPDATE_READENCSTATUS);
324 enc_update_request(enc, SAFTE_UPDATE_READSLOTSTATUS);
330 safte_process_gflags(enc_softc_t *enc, struct enc_fsm_state *state,
331 union ccb *ccb, uint8_t **bufp, int error, int xfer_len)
334 uint8_t *buf = *bufp;
336 cfg = enc->enc_private;
341 SAFT_BAIL(3, xfer_len);
346 if (cfg->flag1 & SAFT_FLG1_GLOBFAIL)
347 cfg->adm_status |= SES_ENCSTAT_CRITICAL;
348 else if (cfg->flag1 & SAFT_FLG1_GLOBWARN)
349 cfg->adm_status |= SES_ENCSTAT_NONCRITICAL;
355 safte_process_status(enc_softc_t *enc, struct enc_fsm_state *state,
356 union ccb *ccb, uint8_t **bufp, int error, int xfer_len)
359 uint8_t *buf = *bufp;
360 int oid, r, i, nitems;
362 enc_cache_t *cache = &enc->enc_cache;
364 cfg = enc->enc_private;
373 for (nitems = i = 0; i < cfg->Nfans; i++) {
374 SAFT_BAIL(r, xfer_len);
376 * 0 = Fan Operational
377 * 1 = Fan is malfunctioning
378 * 2 = Fan is not present
379 * 0x80 = Unknown or Not Reportable Status
381 cache->elm_map[oid].encstat[1] = 0; /* resvd */
382 cache->elm_map[oid].encstat[2] = 0; /* resvd */
383 if (cfg->flag1 & SAFT_FLG1_ENCFANFAIL)
384 cache->elm_map[oid].encstat[3] |= 0x40;
386 cache->elm_map[oid].encstat[3] &= ~0x40;
387 switch ((int)buf[r]) {
390 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
391 if ((cache->elm_map[oid].encstat[3] & 0x37) == 0)
392 cache->elm_map[oid].encstat[3] |= 0x27;
396 cache->elm_map[oid].encstat[0] =
399 * FAIL and FAN STOPPED synthesized
401 cache->elm_map[oid].encstat[3] |= 0x10;
402 cache->elm_map[oid].encstat[3] &= ~0x07;
404 * Enclosure marked with CRITICAL error
405 * if only one fan or no thermometers,
406 * else the NONCRITICAL error is set.
408 if (cfg->Nfans == 1 || (cfg->Ntherm + cfg->Ntstats) == 0)
409 cfg->enc_status |= SES_ENCSTAT_CRITICAL;
411 cfg->enc_status |= SES_ENCSTAT_NONCRITICAL;
414 cache->elm_map[oid].encstat[0] =
415 SES_OBJSTAT_NOTINSTALLED;
416 cache->elm_map[oid].encstat[3] |= 0x10;
417 cache->elm_map[oid].encstat[3] &= ~0x07;
419 * Enclosure marked with CRITICAL error
420 * if only one fan or no thermometers,
421 * else the NONCRITICAL error is set.
424 cfg->enc_status |= SES_ENCSTAT_CRITICAL;
426 cfg->enc_status |= SES_ENCSTAT_NONCRITICAL;
429 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_UNKNOWN;
430 cache->elm_map[oid].encstat[3] = 0;
431 cfg->enc_status |= SES_ENCSTAT_INFO;
434 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_UNSUPPORTED;
435 ENC_VLOG(enc, "Unknown fan%d status 0x%x\n", i,
439 cache->elm_map[oid++].svalid = 1;
444 * No matter how you cut it, no cooling elements when there
445 * should be some there is critical.
447 if (cfg->Nfans && nitems == 0)
448 cfg->enc_status |= SES_ENCSTAT_CRITICAL;
450 for (i = 0; i < cfg->Npwr; i++) {
451 SAFT_BAIL(r, xfer_len);
452 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_UNKNOWN;
453 cache->elm_map[oid].encstat[1] = 0; /* resvd */
454 cache->elm_map[oid].encstat[2] = 0; /* resvd */
455 cache->elm_map[oid].encstat[3] = 0x20; /* requested on */
457 case 0x00: /* pws operational and on */
458 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
460 case 0x01: /* pws operational and off */
461 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
462 cache->elm_map[oid].encstat[3] = 0x10;
463 cfg->enc_status |= SES_ENCSTAT_INFO;
465 case 0x10: /* pws is malfunctioning and commanded on */
466 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_CRIT;
467 cache->elm_map[oid].encstat[3] = 0x61;
468 cfg->enc_status |= SES_ENCSTAT_NONCRITICAL;
471 case 0x11: /* pws is malfunctioning and commanded off */
472 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_NONCRIT;
473 cache->elm_map[oid].encstat[3] = 0x51;
474 cfg->enc_status |= SES_ENCSTAT_NONCRITICAL;
476 case 0x20: /* pws is not present */
477 cache->elm_map[oid].encstat[0] =
478 SES_OBJSTAT_NOTINSTALLED;
479 cache->elm_map[oid].encstat[3] = 0;
480 cfg->enc_status |= SES_ENCSTAT_INFO;
482 case 0x21: /* pws is present */
484 * This is for enclosures that cannot tell whether the
485 * device is on or malfunctioning, but know that it is
486 * present. Just fall through.
489 case 0x80: /* Unknown or Not Reportable Status */
490 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_UNKNOWN;
491 cache->elm_map[oid].encstat[3] = 0;
492 cfg->enc_status |= SES_ENCSTAT_INFO;
495 ENC_VLOG(enc, "unknown power supply %d status (0x%x)\n",
499 enc->enc_cache.elm_map[oid++].svalid = 1;
506 for (i = 0; i < cfg->Nslots; i++) {
507 SAFT_BAIL(r, xfer_len);
508 if (cache->elm_map[cfg->slotoff + i].elm_type == ELMTYP_DEVICE)
509 cache->elm_map[cfg->slotoff + i].encstat[1] = buf[r];
514 * We always have doorlock status, no matter what,
515 * but we only save the status if we have one.
517 SAFT_BAIL(r, xfer_len);
521 * 1 = Door Unlocked, or no Lock Installed
522 * 0x80 = Unknown or Not Reportable Status
524 cache->elm_map[oid].encstat[1] = 0;
525 cache->elm_map[oid].encstat[2] = 0;
528 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
529 cache->elm_map[oid].encstat[3] = 0;
532 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
533 cache->elm_map[oid].encstat[3] = 1;
536 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_UNKNOWN;
537 cache->elm_map[oid].encstat[3] = 0;
538 cfg->enc_status |= SES_ENCSTAT_INFO;
541 cache->elm_map[oid].encstat[0] =
542 SES_OBJSTAT_UNSUPPORTED;
543 ENC_VLOG(enc, "unknown lock status 0x%x\n",
547 cache->elm_map[oid++].svalid = 1;
552 * We always have speaker status, no matter what,
553 * but we only save the status if we have one.
555 SAFT_BAIL(r, xfer_len);
557 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
558 cache->elm_map[oid].encstat[1] = 0;
559 cache->elm_map[oid].encstat[2] = 0;
561 cache->elm_map[oid].encstat[0] |= SESCTL_DISABLE;
562 cache->elm_map[oid].encstat[3] |= 0x40;
564 cache->elm_map[oid++].svalid = 1;
569 * Now, for "pseudo" thermometers, we have two bytes
570 * of information in enclosure status- 16 bits. Actually,
571 * the MSB is a single TEMP ALERT flag indicating whether
572 * any other bits are set, but, thanks to fuzzy thinking,
573 * in the SAF-TE spec, this can also be set even if no
574 * other bits are set, thus making this really another
575 * binary temperature sensor.
578 SAFT_BAIL(r + cfg->Ntherm, xfer_len);
579 tempflags = buf[r + cfg->Ntherm];
580 SAFT_BAIL(r + cfg->Ntherm + 1, xfer_len);
581 tempflags |= (tempflags << 8) | buf[r + cfg->Ntherm + 1];
583 for (i = 0; i < cfg->Ntherm; i++) {
584 SAFT_BAIL(r, xfer_len);
586 * Status is a range from -10 to 245 deg Celsius,
587 * which we need to normalize to -20 to -245 according
588 * to the latest SCSI spec, which makes little
589 * sense since this would overflow an 8bit value.
590 * Well, still, the base normalization is -20,
591 * not -10, so we have to adjust.
593 * So what's over and under temperature?
594 * Hmm- we'll state that 'normal' operating
595 * is 10 to 40 deg Celsius.
599 * Actually.... All of the units that people out in the world
600 * seem to have do not come even close to setting a value that
601 * complies with this spec.
603 * The closest explanation I could find was in an
604 * LSI-Logic manual, which seemed to indicate that
605 * this value would be set by whatever the I2C code
606 * would interpolate from the output of an LM75
607 * temperature sensor.
609 * This means that it is impossible to use the actual
610 * numeric value to predict anything. But we don't want
611 * to lose the value. So, we'll propagate the *uncorrected*
612 * value and set SES_OBJSTAT_NOTAVAIL. We'll depend on the
613 * temperature flags for warnings.
615 if (tempflags & (1 << i)) {
616 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_CRIT;
617 cfg->enc_status |= SES_ENCSTAT_CRITICAL;
619 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
620 cache->elm_map[oid].encstat[1] = 0;
621 cache->elm_map[oid].encstat[2] = buf[r];
622 cache->elm_map[oid].encstat[3] = 0;
623 cache->elm_map[oid++].svalid = 1;
627 for (i = 0; i <= cfg->Ntstats; i++) {
628 cache->elm_map[oid].encstat[1] = 0;
629 if (tempflags & (1 <<
630 ((i == cfg->Ntstats) ? 15 : (cfg->Ntherm + i)))) {
631 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_CRIT;
632 cache->elm_map[4].encstat[2] = 0xff;
634 * Set 'over temperature' failure.
636 cache->elm_map[oid].encstat[3] = 8;
637 cfg->enc_status |= SES_ENCSTAT_CRITICAL;
640 * We used to say 'not available' and synthesize a
641 * nominal 30 deg (C)- that was wrong. Actually,
642 * Just say 'OK', and use the reserved value of
645 if ((cfg->Ntherm + cfg->Ntstats) == 0)
646 cache->elm_map[oid].encstat[0] =
647 SES_OBJSTAT_NOTAVAIL;
649 cache->elm_map[oid].encstat[0] =
651 cache->elm_map[oid].encstat[2] = 0;
652 cache->elm_map[oid].encstat[3] = 0;
654 cache->elm_map[oid++].svalid = 1;
659 cfg->enc_status | cfg->slot_status | cfg->adm_status;
664 safte_process_slotstatus(enc_softc_t *enc, struct enc_fsm_state *state,
665 union ccb *ccb, uint8_t **bufp, int error, int xfer_len)
668 uint8_t *buf = *bufp;
669 enc_cache_t *cache = &enc->enc_cache;
672 cfg = enc->enc_private;
677 cfg->slot_status = 0;
679 for (r = i = 0; i < cfg->Nslots; i++, r += 4) {
680 SAFT_BAIL(r+3, xfer_len);
681 if (cache->elm_map[oid].elm_type == ELMTYP_ARRAY_DEV)
682 cache->elm_map[oid].encstat[1] = 0;
683 cache->elm_map[oid].encstat[2] &= SESCTL_RQSID;
684 cache->elm_map[oid].encstat[3] = 0;
685 if ((buf[r+3] & 0x01) == 0) { /* no device */
686 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_NOTINSTALLED;
687 } else if (buf[r+0] & 0x02) {
688 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_CRIT;
689 cfg->slot_status |= SES_ENCSTAT_CRITICAL;
690 } else if (buf[r+0] & 0x40) {
691 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_NONCRIT;
692 cfg->slot_status |= SES_ENCSTAT_NONCRITICAL;
694 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
696 if (buf[r+3] & 0x2) {
698 cache->elm_map[oid].encstat[2] |= SESCTL_RQSRMV;
700 cache->elm_map[oid].encstat[2] |= SESCTL_RQSINS;
702 if ((buf[r+3] & 0x04) == 0)
703 cache->elm_map[oid].encstat[3] |= SESCTL_DEVOFF;
705 cache->elm_map[oid].encstat[3] |= SESCTL_RQSFLT;
707 cache->elm_map[oid].encstat[0] |= SESCTL_PRDFAIL;
708 if (cache->elm_map[oid].elm_type == ELMTYP_ARRAY_DEV) {
710 cache->elm_map[oid].encstat[1] |= 0x80;
712 cache->elm_map[oid].encstat[1] |= 0x02;
714 cache->elm_map[oid].encstat[1] |= 0x04;
716 cache->elm_map[oid].encstat[1] |= 0x08;
718 cache->elm_map[oid].encstat[1] |= 0x10;
720 cache->elm_map[oid].encstat[1] |= 0x20;
722 cache->elm_map[oid].encstat[1] |= 0x01;
724 cache->elm_map[oid++].svalid = 1;
728 cfg->enc_status | cfg->slot_status | cfg->adm_status;
733 safte_fill_control_request(enc_softc_t *enc, struct enc_fsm_state *state,
734 union ccb *ccb, uint8_t *buf)
737 enc_element_t *ep, *ep1;
738 safte_control_request_t *req;
739 int i, idx, xfer_len;
741 cfg = enc->enc_private;
745 if (enc->enc_cache.nelms == 0) {
746 enc_update_request(enc, SAFTE_UPDATE_READCONFIG);
750 if (cfg->current_request == NULL) {
751 cfg->current_request = TAILQ_FIRST(&cfg->requests);
752 TAILQ_REMOVE(&cfg->requests, cfg->current_request, links);
753 cfg->current_request_stage = 0;
754 cfg->current_request_stages = 1;
756 req = cfg->current_request;
758 idx = (int)req->elm_idx;
759 if (req->elm_idx == SES_SETSTATUS_ENC_IDX) {
760 cfg->adm_status = req->elm_stat[0] & ALL_ENC_STAT;
761 cfg->flag1 &= ~(SAFT_FLG1_GLOBFAIL|SAFT_FLG1_GLOBWARN);
762 if (req->elm_stat[0] & (SES_ENCSTAT_CRITICAL|SES_ENCSTAT_UNRECOV))
763 cfg->flag1 |= SAFT_FLG1_GLOBFAIL;
764 else if (req->elm_stat[0] & SES_ENCSTAT_NONCRITICAL)
765 cfg->flag1 |= SAFT_FLG1_GLOBWARN;
766 buf[0] = SAFTE_WT_GLOBAL;
772 ep = &enc->enc_cache.elm_map[idx];
774 switch (ep->elm_type) {
776 case ELMTYP_ARRAY_DEV:
777 switch (cfg->current_request_stage) {
780 if (req->elm_stat[0] & SESCTL_PRDFAIL)
782 if (req->elm_stat[3] & SESCTL_RQSFLT)
784 if (ep->elm_type == ELMTYP_ARRAY_DEV) {
785 if (req->elm_stat[1] & 0x01)
787 if (req->elm_stat[1] & 0x02)
789 if (req->elm_stat[1] & 0x04)
791 if (req->elm_stat[1] & 0x08)
793 if (req->elm_stat[1] & 0x10)
795 if (req->elm_stat[1] & 0x20)
797 if (req->elm_stat[1] & 0x80)
801 ep->priv |= 0x01; /* no errors */
803 buf[0] = SAFTE_WT_DSTAT;
804 for (i = 0; i < cfg->Nslots; i++) {
805 ep1 = &enc->enc_cache.elm_map[cfg->slotoff + i];
806 buf[1 + (3 * i)] = ep1->priv;
807 buf[2 + (3 * i)] = ep1->priv >> 8;
809 xfer_len = cfg->Nslots * 3 + 1;
810 #define DEVON(x) (!(((x)[2] & SESCTL_RQSINS) | \
811 ((x)[2] & SESCTL_RQSRMV) | \
812 ((x)[3] & SESCTL_DEVOFF)))
813 if (DEVON(req->elm_stat) != DEVON(ep->encstat))
814 cfg->current_request_stages++;
815 #define IDON(x) (!!((x)[2] & SESCTL_RQSID))
816 if (IDON(req->elm_stat) != IDON(ep->encstat))
817 cfg->current_request_stages++;
821 buf[0] = SAFTE_WT_SLTOP;
822 buf[1] = idx - cfg->slotoff;
823 if (cfg->current_request_stage == 1 &&
824 DEVON(req->elm_stat) != DEVON(ep->encstat)) {
825 if (DEVON(req->elm_stat))
830 if (IDON(req->elm_stat))
834 ep->encstat[2] &= ~SESCTL_RQSID;
835 ep->encstat[2] |= req->elm_stat[2] &
845 cfg->current_request_stages = 2;
846 switch (cfg->current_request_stage) {
848 if (req->elm_stat[3] & SESCTL_RQSTFAIL) {
849 cfg->flag1 |= SAFT_FLG1_ENCPWRFAIL;
851 cfg->flag1 &= ~SAFT_FLG1_ENCPWRFAIL;
853 buf[0] = SAFTE_WT_GLOBAL;
860 buf[0] = SAFTE_WT_ACTPWS;
861 buf[1] = idx - cfg->pwroff;
862 if (req->elm_stat[3] & SESCTL_RQSTON)
873 if ((req->elm_stat[3] & 0x7) != 0)
874 cfg->current_request_stages = 2;
875 switch (cfg->current_request_stage) {
877 if (req->elm_stat[3] & SESCTL_RQSTFAIL)
878 cfg->flag1 |= SAFT_FLG1_ENCFANFAIL;
880 cfg->flag1 &= ~SAFT_FLG1_ENCFANFAIL;
881 buf[0] = SAFTE_WT_GLOBAL;
888 buf[0] = SAFTE_WT_FANSPD;
890 if (req->elm_stat[3] & SESCTL_RQSTON) {
891 if ((req->elm_stat[3] & 0x7) == 7)
893 else if ((req->elm_stat[3] & 0x7) >= 5)
895 else if ((req->elm_stat[3] & 0x7) >= 3)
903 ep->encstat[3] = req->elm_stat[3] & 0x67;
908 case ELMTYP_DOORLOCK:
909 if (req->elm_stat[3] & 0x1)
910 cfg->flag2 &= ~SAFT_FLG2_LOCKDOOR;
912 cfg->flag2 |= SAFT_FLG2_LOCKDOOR;
913 buf[0] = SAFTE_WT_GLOBAL;
920 if ((req->elm_stat[0] & SESCTL_DISABLE) ||
921 (req->elm_stat[3] & 0x40)) {
922 cfg->flag2 &= ~SAFT_FLG1_ALARM;
923 } else if ((req->elm_stat[3] & 0x0f) != 0) {
924 cfg->flag2 |= SAFT_FLG1_ALARM;
926 cfg->flag2 &= ~SAFT_FLG1_ALARM;
928 buf[0] = SAFTE_WT_GLOBAL;
933 ep->encstat[3] = req->elm_stat[3];
940 if (enc->enc_type == ENC_SEMB_SAFT) {
941 semb_write_buffer(&ccb->ataio, /*retries*/5,
942 NULL, MSG_SIMPLE_Q_TAG,
943 buf, xfer_len, state->timeout);
945 scsi_write_buffer(&ccb->csio, /*retries*/5,
946 NULL, MSG_SIMPLE_Q_TAG, 1,
948 SSD_FULL_SIZE, state->timeout);
954 safte_process_control_request(enc_softc_t *enc, struct enc_fsm_state *state,
955 union ccb *ccb, uint8_t **bufp, int error, int xfer_len)
958 safte_control_request_t *req;
961 cfg = enc->enc_private;
965 req = cfg->current_request;
966 if (req->result == 0)
968 if (++cfg->current_request_stage >= cfg->current_request_stages) {
970 if (idx == SES_SETSTATUS_ENC_IDX)
973 type = enc->enc_cache.elm_map[idx].elm_type;
974 if (type == ELMTYP_DEVICE || type == ELMTYP_ARRAY_DEV)
975 enc_update_request(enc, SAFTE_UPDATE_READSLOTSTATUS);
977 enc_update_request(enc, SAFTE_UPDATE_READENCSTATUS);
978 cfg->current_request = NULL;
981 enc_update_request(enc, SAFTE_PROCESS_CONTROL_REQS);
987 safte_softc_invalidate(enc_softc_t *enc)
991 cfg = enc->enc_private;
992 safte_terminate_control_requests(&cfg->requests, ENXIO);
996 safte_softc_cleanup(enc_softc_t *enc)
999 ENC_FREE_AND_NULL(enc->enc_cache.elm_map);
1000 ENC_FREE_AND_NULL(enc->enc_private);
1001 enc->enc_cache.nelms = 0;
1005 safte_init_enc(enc_softc_t *enc)
1009 static char cdb0[6] = { SEND_DIAGNOSTIC };
1011 cfg = enc->enc_private;
1015 err = enc_runcmd(enc, cdb0, 6, NULL, 0);
1022 err = safte_set_enc_status(enc, 0, 1);
1027 safte_get_enc_status(enc_softc_t *enc, int slpflg)
1034 safte_set_enc_status(enc_softc_t *enc, uint8_t encstat, int slpflag)
1037 safte_control_request_t req;
1039 cfg = enc->enc_private;
1043 req.elm_idx = SES_SETSTATUS_ENC_IDX;
1044 req.elm_stat[0] = encstat & 0xf;
1047 TAILQ_INSERT_TAIL(&cfg->requests, &req, links);
1048 enc_update_request(enc, SAFTE_PROCESS_CONTROL_REQS);
1049 cam_periph_sleep(enc->periph, &req, PUSER, "encstat", 0);
1051 return (req.result);
1055 safte_get_elm_status(enc_softc_t *enc, encioc_elm_status_t *elms, int slpflg)
1057 int i = (int)elms->elm_idx;
1059 elms->cstat[0] = enc->enc_cache.elm_map[i].encstat[0];
1060 elms->cstat[1] = enc->enc_cache.elm_map[i].encstat[1];
1061 elms->cstat[2] = enc->enc_cache.elm_map[i].encstat[2];
1062 elms->cstat[3] = enc->enc_cache.elm_map[i].encstat[3];
1067 safte_set_elm_status(enc_softc_t *enc, encioc_elm_status_t *elms, int slpflag)
1070 safte_control_request_t req;
1072 cfg = enc->enc_private;
1076 /* If this is clear, we don't do diddly. */
1077 if ((elms->cstat[0] & SESCTL_CSEL) == 0)
1080 req.elm_idx = elms->elm_idx;
1081 memcpy(&req.elm_stat, elms->cstat, sizeof(req.elm_stat));
1084 TAILQ_INSERT_TAIL(&cfg->requests, &req, links);
1085 enc_update_request(enc, SAFTE_PROCESS_CONTROL_REQS);
1086 cam_periph_sleep(enc->periph, &req, PUSER, "encstat", 0);
1088 return (req.result);
1092 safte_poll_status(enc_softc_t *enc)
1095 enc_update_request(enc, SAFTE_UPDATE_READENCSTATUS);
1096 enc_update_request(enc, SAFTE_UPDATE_READSLOTSTATUS);
1099 static struct enc_vec safte_enc_vec =
1101 .softc_invalidate = safte_softc_invalidate,
1102 .softc_cleanup = safte_softc_cleanup,
1103 .init_enc = safte_init_enc,
1104 .get_enc_status = safte_get_enc_status,
1105 .set_enc_status = safte_set_enc_status,
1106 .get_elm_status = safte_get_elm_status,
1107 .set_elm_status = safte_set_elm_status,
1108 .poll_status = safte_poll_status
1112 safte_softc_init(enc_softc_t *enc)
1116 enc->enc_vec = safte_enc_vec;
1117 enc->enc_fsm_states = enc_fsm_states;
1119 if (enc->enc_private == NULL) {
1120 enc->enc_private = ENC_MALLOCZ(SAFT_PRIVATE);
1121 if (enc->enc_private == NULL)
1124 cfg = enc->enc_private;
1126 enc->enc_cache.nelms = 0;
1127 enc->enc_cache.enc_status = 0;
1129 TAILQ_INIT(&cfg->requests);