2 * Copyright (c) 2000 Matthew Jacob
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions, and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. The name of the author may not be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
33 #include <sys/errno.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
36 #include <sys/mutex.h>
37 #include <sys/queue.h>
39 #include <sys/systm.h>
40 #include <sys/sysctl.h>
41 #include <sys/types.h>
44 #include <cam/cam_ccb.h>
45 #include <cam/cam_periph.h>
47 #include <cam/scsi/scsi_enc.h>
48 #include <cam/scsi/scsi_enc_internal.h>
49 #include <cam/scsi/scsi_message.h>
52 * SAF-TE Type Device Emulation
55 static int safte_set_enc_status(enc_softc_t *enc, uint8_t encstat, int slpflag);
57 #define ALL_ENC_STAT (SES_ENCSTAT_CRITICAL | SES_ENCSTAT_UNRECOV | \
58 SES_ENCSTAT_NONCRITICAL | SES_ENCSTAT_INFO)
60 * SAF-TE specific defines- Mandatory ones only...
64 * READ BUFFER ('get' commands) IDs- placed in offset 2 of cdb
66 #define SAFTE_RD_RDCFG 0x00 /* read enclosure configuration */
67 #define SAFTE_RD_RDESTS 0x01 /* read enclosure status */
68 #define SAFTE_RD_RDDSTS 0x04 /* read drive slot status */
69 #define SAFTE_RD_RDGFLG 0x05 /* read global flags */
72 * WRITE BUFFER ('set' commands) IDs- placed in offset 0 of databuf
74 #define SAFTE_WT_DSTAT 0x10 /* write device slot status */
75 #define SAFTE_WT_SLTOP 0x12 /* perform slot operation */
76 #define SAFTE_WT_FANSPD 0x13 /* set fan speed */
77 #define SAFTE_WT_ACTPWS 0x14 /* turn on/off power supply */
78 #define SAFTE_WT_GLOBAL 0x15 /* send global command */
80 #define SAFT_SCRATCH 64
85 SAFTE_UPDATE_READCONFIG,
86 SAFTE_UPDATE_READGFLAGS,
87 SAFTE_UPDATE_READENCSTATUS,
88 SAFTE_UPDATE_READSLOTSTATUS,
89 SAFTE_PROCESS_CONTROL_REQS,
90 SAFTE_NUM_UPDATE_STATES
91 } safte_update_action;
93 static fsm_fill_handler_t safte_fill_read_buf_io;
94 static fsm_fill_handler_t safte_fill_control_request;
95 static fsm_done_handler_t safte_process_config;
96 static fsm_done_handler_t safte_process_gflags;
97 static fsm_done_handler_t safte_process_status;
98 static fsm_done_handler_t safte_process_slotstatus;
99 static fsm_done_handler_t safte_process_control_request;
101 static struct enc_fsm_state enc_fsm_states[SAFTE_NUM_UPDATE_STATES] =
103 { "SAFTE_UPDATE_NONE", 0, 0, 0, NULL, NULL, NULL },
105 "SAFTE_UPDATE_READCONFIG",
109 safte_fill_read_buf_io,
110 safte_process_config,
114 "SAFTE_UPDATE_READGFLAGS",
118 safte_fill_read_buf_io,
119 safte_process_gflags,
123 "SAFTE_UPDATE_READENCSTATUS",
127 safte_fill_read_buf_io,
128 safte_process_status,
132 "SAFTE_UPDATE_READSLOTSTATUS",
136 safte_fill_read_buf_io,
137 safte_process_slotstatus,
141 "SAFTE_PROCESS_CONTROL_REQS",
145 safte_fill_control_request,
146 safte_process_control_request,
151 typedef struct safte_control_request {
155 TAILQ_ENTRY(safte_control_request) links;
156 } safte_control_request_t;
157 TAILQ_HEAD(safte_control_reqlist, safte_control_request);
158 typedef struct safte_control_reqlist safte_control_reqlist_t;
160 SES_SETSTATUS_ENC_IDX = -1
164 safte_terminate_control_requests(safte_control_reqlist_t *reqlist, int result)
166 safte_control_request_t *req;
168 while ((req = TAILQ_FIRST(reqlist)) != NULL) {
169 TAILQ_REMOVE(reqlist, req, links);
170 req->result = result;
177 * Cached Configuration
179 uint8_t Nfans; /* Number of Fans */
180 uint8_t Npwr; /* Number of Power Supplies */
181 uint8_t Nslots; /* Number of Device Slots */
182 uint8_t DoorLock; /* Door Lock Installed */
183 uint8_t Ntherm; /* Number of Temperature Sensors */
184 uint8_t Nspkrs; /* Number of Speakers */
185 uint8_t Ntstats; /* Number of Thermostats */
187 * Cached Flag Bytes for Global Status
192 * What object index ID is where various slots start.
196 #define SAFT_ALARM_OFFSET(cc) (cc)->slotoff - 1
198 encioc_enc_status_t adm_status;
199 encioc_enc_status_t enc_status;
200 encioc_enc_status_t slot_status;
202 safte_control_reqlist_t requests;
203 safte_control_request_t *current_request;
204 int current_request_stage;
205 int current_request_stages;
208 #define SAFT_FLG1_ALARM 0x1
209 #define SAFT_FLG1_GLOBFAIL 0x2
210 #define SAFT_FLG1_GLOBWARN 0x4
211 #define SAFT_FLG1_ENCPWROFF 0x8
212 #define SAFT_FLG1_ENCFANFAIL 0x10
213 #define SAFT_FLG1_ENCPWRFAIL 0x20
214 #define SAFT_FLG1_ENCDRVFAIL 0x40
215 #define SAFT_FLG1_ENCDRVWARN 0x80
217 #define SAFT_FLG2_LOCKDOOR 0x4
218 #define SAFT_PRIVATE sizeof (struct scfg)
220 static char *safte_2little = "Too Little Data Returned (%d) at line %d\n";
221 #define SAFT_BAIL(r, x) \
223 ENC_VLOG(enc, safte_2little, x, __LINE__);\
227 int emulate_array_devices = 1;
228 SYSCTL_DECL(_kern_cam_enc);
229 SYSCTL_INT(_kern_cam_enc, OID_AUTO, emulate_array_devices, CTLFLAG_RWTUN,
230 &emulate_array_devices, 0, "Emulate Array Devices for SAF-TE");
233 safte_fill_read_buf_io(enc_softc_t *enc, struct enc_fsm_state *state,
234 union ccb *ccb, uint8_t *buf)
237 if (state->page_code != SAFTE_RD_RDCFG &&
238 enc->enc_cache.nelms == 0) {
239 enc_update_request(enc, SAFTE_UPDATE_READCONFIG);
243 if (enc->enc_type == ENC_SEMB_SAFT) {
244 semb_read_buffer(&ccb->ataio, /*retries*/5,
245 NULL, MSG_SIMPLE_Q_TAG,
246 state->page_code, buf, state->buf_size,
249 scsi_read_buffer(&ccb->csio, /*retries*/5,
250 NULL, MSG_SIMPLE_Q_TAG, 1,
251 state->page_code, 0, buf, state->buf_size,
252 SSD_FULL_SIZE, state->timeout);
258 safte_process_config(enc_softc_t *enc, struct enc_fsm_state *state,
259 union ccb *ccb, uint8_t **bufp, int error, int xfer_len)
262 uint8_t *buf = *bufp;
265 cfg = enc->enc_private;
271 ENC_VLOG(enc, "too little data (%d) for configuration\n",
277 cfg->Nslots = buf[2];
278 cfg->DoorLock = buf[3];
279 cfg->Ntherm = buf[4];
280 cfg->Nspkrs = buf[5];
282 cfg->Ntstats = buf[6] & 0x0f;
285 ENC_VLOG(enc, "Nfans %d Npwr %d Nslots %d Lck %d Ntherm %d Nspkrs %d "
287 cfg->Nfans, cfg->Npwr, cfg->Nslots, cfg->DoorLock, cfg->Ntherm,
288 cfg->Nspkrs, cfg->Ntstats);
290 enc->enc_cache.nelms = cfg->Nfans + cfg->Npwr + cfg->Nslots +
291 cfg->DoorLock + cfg->Ntherm + cfg->Nspkrs + cfg->Ntstats + 1;
292 ENC_FREE_AND_NULL(enc->enc_cache.elm_map);
293 enc->enc_cache.elm_map =
294 malloc(enc->enc_cache.nelms * sizeof(enc_element_t),
295 M_SCSIENC, M_WAITOK|M_ZERO);
299 * Note that this is all arranged for the convenience
300 * in later fetches of status.
302 for (i = 0; i < cfg->Nfans; i++)
303 enc->enc_cache.elm_map[r++].enctype = ELMTYP_FAN;
304 cfg->pwroff = (uint8_t) r;
305 for (i = 0; i < cfg->Npwr; i++)
306 enc->enc_cache.elm_map[r++].enctype = ELMTYP_POWER;
307 for (i = 0; i < cfg->DoorLock; i++)
308 enc->enc_cache.elm_map[r++].enctype = ELMTYP_DOORLOCK;
310 enc->enc_cache.elm_map[r++].enctype = ELMTYP_ALARM;
311 for (i = 0; i < cfg->Ntherm; i++)
312 enc->enc_cache.elm_map[r++].enctype = ELMTYP_THERM;
313 for (i = 0; i <= cfg->Ntstats; i++)
314 enc->enc_cache.elm_map[r++].enctype = ELMTYP_THERM;
315 cfg->slotoff = (uint8_t) r;
316 for (i = 0; i < cfg->Nslots; i++)
317 enc->enc_cache.elm_map[r++].enctype =
318 emulate_array_devices ? ELMTYP_ARRAY_DEV :
321 enc_update_request(enc, SAFTE_UPDATE_READGFLAGS);
322 enc_update_request(enc, SAFTE_UPDATE_READENCSTATUS);
323 enc_update_request(enc, SAFTE_UPDATE_READSLOTSTATUS);
329 safte_process_gflags(enc_softc_t *enc, struct enc_fsm_state *state,
330 union ccb *ccb, uint8_t **bufp, int error, int xfer_len)
333 uint8_t *buf = *bufp;
335 cfg = enc->enc_private;
340 SAFT_BAIL(3, xfer_len);
345 if (cfg->flag1 & SAFT_FLG1_GLOBFAIL)
346 cfg->adm_status |= SES_ENCSTAT_CRITICAL;
347 else if (cfg->flag1 & SAFT_FLG1_GLOBWARN)
348 cfg->adm_status |= SES_ENCSTAT_NONCRITICAL;
354 safte_process_status(enc_softc_t *enc, struct enc_fsm_state *state,
355 union ccb *ccb, uint8_t **bufp, int error, int xfer_len)
358 uint8_t *buf = *bufp;
359 int oid, r, i, nitems;
361 enc_cache_t *cache = &enc->enc_cache;
363 cfg = enc->enc_private;
372 for (nitems = i = 0; i < cfg->Nfans; i++) {
373 SAFT_BAIL(r, xfer_len);
375 * 0 = Fan Operational
376 * 1 = Fan is malfunctioning
377 * 2 = Fan is not present
378 * 0x80 = Unknown or Not Reportable Status
380 cache->elm_map[oid].encstat[1] = 0; /* resvd */
381 cache->elm_map[oid].encstat[2] = 0; /* resvd */
382 if (cfg->flag1 & SAFT_FLG1_ENCFANFAIL)
383 cache->elm_map[oid].encstat[3] |= 0x40;
385 cache->elm_map[oid].encstat[3] &= ~0x40;
386 switch ((int)buf[r]) {
389 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
390 if ((cache->elm_map[oid].encstat[3] & 0x37) == 0)
391 cache->elm_map[oid].encstat[3] |= 0x27;
395 cache->elm_map[oid].encstat[0] =
398 * FAIL and FAN STOPPED synthesized
400 cache->elm_map[oid].encstat[3] |= 0x10;
401 cache->elm_map[oid].encstat[3] &= ~0x07;
403 * Enclosure marked with CRITICAL error
404 * if only one fan or no thermometers,
405 * else the NONCRITICAL error is set.
407 if (cfg->Nfans == 1 || (cfg->Ntherm + cfg->Ntstats) == 0)
408 cfg->enc_status |= SES_ENCSTAT_CRITICAL;
410 cfg->enc_status |= SES_ENCSTAT_NONCRITICAL;
413 cache->elm_map[oid].encstat[0] =
414 SES_OBJSTAT_NOTINSTALLED;
415 cache->elm_map[oid].encstat[3] |= 0x10;
416 cache->elm_map[oid].encstat[3] &= ~0x07;
418 * Enclosure marked with CRITICAL error
419 * if only one fan or no thermometers,
420 * else the NONCRITICAL error is set.
423 cfg->enc_status |= SES_ENCSTAT_CRITICAL;
425 cfg->enc_status |= SES_ENCSTAT_NONCRITICAL;
428 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_UNKNOWN;
429 cache->elm_map[oid].encstat[3] = 0;
430 cfg->enc_status |= SES_ENCSTAT_INFO;
433 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_UNSUPPORTED;
434 ENC_VLOG(enc, "Unknown fan%d status 0x%x\n", i,
438 cache->elm_map[oid++].svalid = 1;
443 * No matter how you cut it, no cooling elements when there
444 * should be some there is critical.
446 if (cfg->Nfans && nitems == 0)
447 cfg->enc_status |= SES_ENCSTAT_CRITICAL;
449 for (i = 0; i < cfg->Npwr; i++) {
450 SAFT_BAIL(r, xfer_len);
451 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_UNKNOWN;
452 cache->elm_map[oid].encstat[1] = 0; /* resvd */
453 cache->elm_map[oid].encstat[2] = 0; /* resvd */
454 cache->elm_map[oid].encstat[3] = 0x20; /* requested on */
456 case 0x00: /* pws operational and on */
457 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
459 case 0x01: /* pws operational and off */
460 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
461 cache->elm_map[oid].encstat[3] = 0x10;
462 cfg->enc_status |= SES_ENCSTAT_INFO;
464 case 0x10: /* pws is malfunctioning and commanded on */
465 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_CRIT;
466 cache->elm_map[oid].encstat[3] = 0x61;
467 cfg->enc_status |= SES_ENCSTAT_NONCRITICAL;
470 case 0x11: /* pws is malfunctioning and commanded off */
471 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_NONCRIT;
472 cache->elm_map[oid].encstat[3] = 0x51;
473 cfg->enc_status |= SES_ENCSTAT_NONCRITICAL;
475 case 0x20: /* pws is not present */
476 cache->elm_map[oid].encstat[0] =
477 SES_OBJSTAT_NOTINSTALLED;
478 cache->elm_map[oid].encstat[3] = 0;
479 cfg->enc_status |= SES_ENCSTAT_INFO;
481 case 0x21: /* pws is present */
483 * This is for enclosures that cannot tell whether the
484 * device is on or malfunctioning, but know that it is
485 * present. Just fall through.
488 case 0x80: /* Unknown or Not Reportable Status */
489 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_UNKNOWN;
490 cache->elm_map[oid].encstat[3] = 0;
491 cfg->enc_status |= SES_ENCSTAT_INFO;
494 ENC_VLOG(enc, "unknown power supply %d status (0x%x)\n",
498 enc->enc_cache.elm_map[oid++].svalid = 1;
505 for (i = 0; i < cfg->Nslots; i++) {
506 SAFT_BAIL(r, xfer_len);
507 if (cache->elm_map[cfg->slotoff + i].enctype == ELMTYP_DEVICE)
508 cache->elm_map[cfg->slotoff + i].encstat[1] = buf[r];
513 * We always have doorlock status, no matter what,
514 * but we only save the status if we have one.
516 SAFT_BAIL(r, xfer_len);
520 * 1 = Door Unlocked, or no Lock Installed
521 * 0x80 = Unknown or Not Reportable Status
523 cache->elm_map[oid].encstat[1] = 0;
524 cache->elm_map[oid].encstat[2] = 0;
527 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
528 cache->elm_map[oid].encstat[3] = 0;
531 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
532 cache->elm_map[oid].encstat[3] = 1;
535 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_UNKNOWN;
536 cache->elm_map[oid].encstat[3] = 0;
537 cfg->enc_status |= SES_ENCSTAT_INFO;
540 cache->elm_map[oid].encstat[0] =
541 SES_OBJSTAT_UNSUPPORTED;
542 ENC_VLOG(enc, "unknown lock status 0x%x\n",
546 cache->elm_map[oid++].svalid = 1;
551 * We always have speaker status, no matter what,
552 * but we only save the status if we have one.
554 SAFT_BAIL(r, xfer_len);
556 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
557 cache->elm_map[oid].encstat[1] = 0;
558 cache->elm_map[oid].encstat[2] = 0;
560 cache->elm_map[oid].encstat[0] |= SESCTL_DISABLE;
561 cache->elm_map[oid].encstat[3] |= 0x40;
563 cache->elm_map[oid++].svalid = 1;
568 * Now, for "pseudo" thermometers, we have two bytes
569 * of information in enclosure status- 16 bits. Actually,
570 * the MSB is a single TEMP ALERT flag indicating whether
571 * any other bits are set, but, thanks to fuzzy thinking,
572 * in the SAF-TE spec, this can also be set even if no
573 * other bits are set, thus making this really another
574 * binary temperature sensor.
577 SAFT_BAIL(r + cfg->Ntherm, xfer_len);
578 tempflags = buf[r + cfg->Ntherm];
579 SAFT_BAIL(r + cfg->Ntherm + 1, xfer_len);
580 tempflags |= (tempflags << 8) | buf[r + cfg->Ntherm + 1];
582 for (i = 0; i < cfg->Ntherm; i++) {
583 SAFT_BAIL(r, xfer_len);
585 * Status is a range from -10 to 245 deg Celsius,
586 * which we need to normalize to -20 to -245 according
587 * to the latest SCSI spec, which makes little
588 * sense since this would overflow an 8bit value.
589 * Well, still, the base normalization is -20,
590 * not -10, so we have to adjust.
592 * So what's over and under temperature?
593 * Hmm- we'll state that 'normal' operating
594 * is 10 to 40 deg Celsius.
598 * Actually.... All of the units that people out in the world
599 * seem to have do not come even close to setting a value that
600 * complies with this spec.
602 * The closest explanation I could find was in an
603 * LSI-Logic manual, which seemed to indicate that
604 * this value would be set by whatever the I2C code
605 * would interpolate from the output of an LM75
606 * temperature sensor.
608 * This means that it is impossible to use the actual
609 * numeric value to predict anything. But we don't want
610 * to lose the value. So, we'll propagate the *uncorrected*
611 * value and set SES_OBJSTAT_NOTAVAIL. We'll depend on the
612 * temperature flags for warnings.
614 if (tempflags & (1 << i)) {
615 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_CRIT;
616 cfg->enc_status |= SES_ENCSTAT_CRITICAL;
618 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
619 cache->elm_map[oid].encstat[1] = 0;
620 cache->elm_map[oid].encstat[2] = buf[r];
621 cache->elm_map[oid].encstat[3] = 0;
622 cache->elm_map[oid++].svalid = 1;
626 for (i = 0; i <= cfg->Ntstats; i++) {
627 cache->elm_map[oid].encstat[1] = 0;
628 if (tempflags & (1 <<
629 ((i == cfg->Ntstats) ? 15 : (cfg->Ntherm + i)))) {
630 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_CRIT;
631 cache->elm_map[4].encstat[2] = 0xff;
633 * Set 'over temperature' failure.
635 cache->elm_map[oid].encstat[3] = 8;
636 cfg->enc_status |= SES_ENCSTAT_CRITICAL;
639 * We used to say 'not available' and synthesize a
640 * nominal 30 deg (C)- that was wrong. Actually,
641 * Just say 'OK', and use the reserved value of
644 if ((cfg->Ntherm + cfg->Ntstats) == 0)
645 cache->elm_map[oid].encstat[0] =
646 SES_OBJSTAT_NOTAVAIL;
648 cache->elm_map[oid].encstat[0] =
650 cache->elm_map[oid].encstat[2] = 0;
651 cache->elm_map[oid].encstat[3] = 0;
653 cache->elm_map[oid++].svalid = 1;
658 cfg->enc_status | cfg->slot_status | cfg->adm_status;
663 safte_process_slotstatus(enc_softc_t *enc, struct enc_fsm_state *state,
664 union ccb *ccb, uint8_t **bufp, int error, int xfer_len)
667 uint8_t *buf = *bufp;
668 enc_cache_t *cache = &enc->enc_cache;
671 cfg = enc->enc_private;
676 cfg->slot_status = 0;
678 for (r = i = 0; i < cfg->Nslots; i++, r += 4) {
679 SAFT_BAIL(r+3, xfer_len);
680 if (cache->elm_map[oid].enctype == ELMTYP_ARRAY_DEV)
681 cache->elm_map[oid].encstat[1] = 0;
682 cache->elm_map[oid].encstat[2] &= SESCTL_RQSID;
683 cache->elm_map[oid].encstat[3] = 0;
684 if ((buf[r+3] & 0x01) == 0) { /* no device */
685 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_NOTINSTALLED;
686 } else if (buf[r+0] & 0x02) {
687 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_CRIT;
688 cfg->slot_status |= SES_ENCSTAT_CRITICAL;
689 } else if (buf[r+0] & 0x40) {
690 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_NONCRIT;
691 cfg->slot_status |= SES_ENCSTAT_NONCRITICAL;
693 cache->elm_map[oid].encstat[0] = SES_OBJSTAT_OK;
695 if (buf[r+3] & 0x2) {
697 cache->elm_map[oid].encstat[2] |= SESCTL_RQSRMV;
699 cache->elm_map[oid].encstat[2] |= SESCTL_RQSINS;
701 if ((buf[r+3] & 0x04) == 0)
702 cache->elm_map[oid].encstat[3] |= SESCTL_DEVOFF;
704 cache->elm_map[oid].encstat[3] |= SESCTL_RQSFLT;
706 cache->elm_map[oid].encstat[0] |= SESCTL_PRDFAIL;
707 if (cache->elm_map[oid].enctype == ELMTYP_ARRAY_DEV) {
709 cache->elm_map[oid].encstat[1] |= 0x80;
711 cache->elm_map[oid].encstat[1] |= 0x02;
713 cache->elm_map[oid].encstat[1] |= 0x04;
715 cache->elm_map[oid].encstat[1] |= 0x08;
717 cache->elm_map[oid].encstat[1] |= 0x10;
719 cache->elm_map[oid].encstat[1] |= 0x20;
721 cache->elm_map[oid].encstat[1] |= 0x01;
723 cache->elm_map[oid++].svalid = 1;
727 cfg->enc_status | cfg->slot_status | cfg->adm_status;
732 safte_fill_control_request(enc_softc_t *enc, struct enc_fsm_state *state,
733 union ccb *ccb, uint8_t *buf)
736 enc_element_t *ep, *ep1;
737 safte_control_request_t *req;
738 int i, idx, xfer_len;
740 cfg = enc->enc_private;
744 if (enc->enc_cache.nelms == 0) {
745 enc_update_request(enc, SAFTE_UPDATE_READCONFIG);
749 if (cfg->current_request == NULL) {
750 cfg->current_request = TAILQ_FIRST(&cfg->requests);
751 TAILQ_REMOVE(&cfg->requests, cfg->current_request, links);
752 cfg->current_request_stage = 0;
753 cfg->current_request_stages = 1;
755 req = cfg->current_request;
757 idx = (int)req->elm_idx;
758 if (req->elm_idx == SES_SETSTATUS_ENC_IDX) {
759 cfg->adm_status = req->elm_stat[0] & ALL_ENC_STAT;
760 cfg->flag1 &= ~(SAFT_FLG1_GLOBFAIL|SAFT_FLG1_GLOBWARN);
761 if (req->elm_stat[0] & (SES_ENCSTAT_CRITICAL|SES_ENCSTAT_UNRECOV))
762 cfg->flag1 |= SAFT_FLG1_GLOBFAIL;
763 else if (req->elm_stat[0] & SES_ENCSTAT_NONCRITICAL)
764 cfg->flag1 |= SAFT_FLG1_GLOBWARN;
765 buf[0] = SAFTE_WT_GLOBAL;
771 ep = &enc->enc_cache.elm_map[idx];
773 switch (ep->enctype) {
775 case ELMTYP_ARRAY_DEV:
776 switch (cfg->current_request_stage) {
779 if (req->elm_stat[0] & SESCTL_PRDFAIL)
781 if (req->elm_stat[3] & SESCTL_RQSFLT)
783 if (ep->enctype == ELMTYP_ARRAY_DEV) {
784 if (req->elm_stat[1] & 0x01)
786 if (req->elm_stat[1] & 0x02)
788 if (req->elm_stat[1] & 0x04)
790 if (req->elm_stat[1] & 0x08)
792 if (req->elm_stat[1] & 0x10)
794 if (req->elm_stat[1] & 0x20)
796 if (req->elm_stat[1] & 0x80)
800 ep->priv |= 0x01; /* no errors */
802 buf[0] = SAFTE_WT_DSTAT;
803 for (i = 0; i < cfg->Nslots; i++) {
804 ep1 = &enc->enc_cache.elm_map[cfg->slotoff + i];
805 buf[1 + (3 * i)] = ep1->priv;
806 buf[2 + (3 * i)] = ep1->priv >> 8;
808 xfer_len = cfg->Nslots * 3 + 1;
809 #define DEVON(x) (!(((x)[2] & SESCTL_RQSINS) | \
810 ((x)[2] & SESCTL_RQSRMV) | \
811 ((x)[3] & SESCTL_DEVOFF)))
812 if (DEVON(req->elm_stat) != DEVON(ep->encstat))
813 cfg->current_request_stages++;
814 #define IDON(x) (!!((x)[2] & SESCTL_RQSID))
815 if (IDON(req->elm_stat) != IDON(ep->encstat))
816 cfg->current_request_stages++;
820 buf[0] = SAFTE_WT_SLTOP;
821 buf[1] = idx - cfg->slotoff;
822 if (cfg->current_request_stage == 1 &&
823 DEVON(req->elm_stat) != DEVON(ep->encstat)) {
824 if (DEVON(req->elm_stat))
829 if (IDON(req->elm_stat))
833 ep->encstat[2] &= ~SESCTL_RQSID;
834 ep->encstat[2] |= req->elm_stat[2] &
844 cfg->current_request_stages = 2;
845 switch (cfg->current_request_stage) {
847 if (req->elm_stat[3] & SESCTL_RQSTFAIL) {
848 cfg->flag1 |= SAFT_FLG1_ENCPWRFAIL;
850 cfg->flag1 &= ~SAFT_FLG1_ENCPWRFAIL;
852 buf[0] = SAFTE_WT_GLOBAL;
859 buf[0] = SAFTE_WT_ACTPWS;
860 buf[1] = idx - cfg->pwroff;
861 if (req->elm_stat[3] & SESCTL_RQSTON)
872 if ((req->elm_stat[3] & 0x7) != 0)
873 cfg->current_request_stages = 2;
874 switch (cfg->current_request_stage) {
876 if (req->elm_stat[3] & SESCTL_RQSTFAIL)
877 cfg->flag1 |= SAFT_FLG1_ENCFANFAIL;
879 cfg->flag1 &= ~SAFT_FLG1_ENCFANFAIL;
880 buf[0] = SAFTE_WT_GLOBAL;
887 buf[0] = SAFTE_WT_FANSPD;
889 if (req->elm_stat[3] & SESCTL_RQSTON) {
890 if ((req->elm_stat[3] & 0x7) == 7)
892 else if ((req->elm_stat[3] & 0x7) >= 5)
894 else if ((req->elm_stat[3] & 0x7) >= 3)
902 ep->encstat[3] = req->elm_stat[3] & 0x67;
907 case ELMTYP_DOORLOCK:
908 if (req->elm_stat[3] & 0x1)
909 cfg->flag2 &= ~SAFT_FLG2_LOCKDOOR;
911 cfg->flag2 |= SAFT_FLG2_LOCKDOOR;
912 buf[0] = SAFTE_WT_GLOBAL;
919 if ((req->elm_stat[0] & SESCTL_DISABLE) ||
920 (req->elm_stat[3] & 0x40)) {
921 cfg->flag2 &= ~SAFT_FLG1_ALARM;
922 } else if ((req->elm_stat[3] & 0x0f) != 0) {
923 cfg->flag2 |= SAFT_FLG1_ALARM;
925 cfg->flag2 &= ~SAFT_FLG1_ALARM;
927 buf[0] = SAFTE_WT_GLOBAL;
932 ep->encstat[3] = req->elm_stat[3];
939 if (enc->enc_type == ENC_SEMB_SAFT) {
940 semb_write_buffer(&ccb->ataio, /*retries*/5,
941 NULL, MSG_SIMPLE_Q_TAG,
942 buf, xfer_len, state->timeout);
944 scsi_write_buffer(&ccb->csio, /*retries*/5,
945 NULL, MSG_SIMPLE_Q_TAG, 1,
947 SSD_FULL_SIZE, state->timeout);
953 safte_process_control_request(enc_softc_t *enc, struct enc_fsm_state *state,
954 union ccb *ccb, uint8_t **bufp, int error, int xfer_len)
957 safte_control_request_t *req;
960 cfg = enc->enc_private;
964 req = cfg->current_request;
965 if (req->result == 0)
967 if (++cfg->current_request_stage >= cfg->current_request_stages) {
969 if (idx == SES_SETSTATUS_ENC_IDX)
972 type = enc->enc_cache.elm_map[idx].enctype;
973 if (type == ELMTYP_DEVICE || type == ELMTYP_ARRAY_DEV)
974 enc_update_request(enc, SAFTE_UPDATE_READSLOTSTATUS);
976 enc_update_request(enc, SAFTE_UPDATE_READENCSTATUS);
977 cfg->current_request = NULL;
980 enc_update_request(enc, SAFTE_PROCESS_CONTROL_REQS);
986 safte_softc_invalidate(enc_softc_t *enc)
990 cfg = enc->enc_private;
991 safte_terminate_control_requests(&cfg->requests, ENXIO);
995 safte_softc_cleanup(enc_softc_t *enc)
998 ENC_FREE_AND_NULL(enc->enc_cache.elm_map);
999 ENC_FREE_AND_NULL(enc->enc_private);
1000 enc->enc_cache.nelms = 0;
1004 safte_init_enc(enc_softc_t *enc)
1008 static char cdb0[6] = { SEND_DIAGNOSTIC };
1010 cfg = enc->enc_private;
1014 err = enc_runcmd(enc, cdb0, 6, NULL, 0);
1021 err = safte_set_enc_status(enc, 0, 1);
1026 safte_get_enc_status(enc_softc_t *enc, int slpflg)
1033 safte_set_enc_status(enc_softc_t *enc, uint8_t encstat, int slpflag)
1036 safte_control_request_t req;
1038 cfg = enc->enc_private;
1042 req.elm_idx = SES_SETSTATUS_ENC_IDX;
1043 req.elm_stat[0] = encstat & 0xf;
1046 TAILQ_INSERT_TAIL(&cfg->requests, &req, links);
1047 enc_update_request(enc, SAFTE_PROCESS_CONTROL_REQS);
1048 cam_periph_sleep(enc->periph, &req, PUSER, "encstat", 0);
1050 return (req.result);
1054 safte_get_elm_status(enc_softc_t *enc, encioc_elm_status_t *elms, int slpflg)
1056 int i = (int)elms->elm_idx;
1058 elms->cstat[0] = enc->enc_cache.elm_map[i].encstat[0];
1059 elms->cstat[1] = enc->enc_cache.elm_map[i].encstat[1];
1060 elms->cstat[2] = enc->enc_cache.elm_map[i].encstat[2];
1061 elms->cstat[3] = enc->enc_cache.elm_map[i].encstat[3];
1066 safte_set_elm_status(enc_softc_t *enc, encioc_elm_status_t *elms, int slpflag)
1069 safte_control_request_t req;
1071 cfg = enc->enc_private;
1075 /* If this is clear, we don't do diddly. */
1076 if ((elms->cstat[0] & SESCTL_CSEL) == 0)
1079 req.elm_idx = elms->elm_idx;
1080 memcpy(&req.elm_stat, elms->cstat, sizeof(req.elm_stat));
1083 TAILQ_INSERT_TAIL(&cfg->requests, &req, links);
1084 enc_update_request(enc, SAFTE_PROCESS_CONTROL_REQS);
1085 cam_periph_sleep(enc->periph, &req, PUSER, "encstat", 0);
1087 return (req.result);
1091 safte_poll_status(enc_softc_t *enc)
1094 enc_update_request(enc, SAFTE_UPDATE_READENCSTATUS);
1095 enc_update_request(enc, SAFTE_UPDATE_READSLOTSTATUS);
1098 static struct enc_vec safte_enc_vec =
1100 .softc_invalidate = safte_softc_invalidate,
1101 .softc_cleanup = safte_softc_cleanup,
1102 .init_enc = safte_init_enc,
1103 .get_enc_status = safte_get_enc_status,
1104 .set_enc_status = safte_set_enc_status,
1105 .get_elm_status = safte_get_elm_status,
1106 .set_elm_status = safte_set_elm_status,
1107 .poll_status = safte_poll_status
1111 safte_softc_init(enc_softc_t *enc)
1115 enc->enc_vec = safte_enc_vec;
1116 enc->enc_fsm_states = enc_fsm_states;
1118 if (enc->enc_private == NULL) {
1119 enc->enc_private = ENC_MALLOCZ(SAFT_PRIVATE);
1120 if (enc->enc_private == NULL)
1123 cfg = enc->enc_private;
1125 enc->enc_cache.nelms = 0;
1126 enc->enc_cache.enc_status = 0;
1128 TAILQ_INIT(&cfg->requests);