2 * Copyright (c) 2016-2017 Mellanox Technologies, Ltd.
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6 * modification, are permitted provided that the following conditions
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9 * notice unmodified, this list of conditions, and the following
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28 #ifndef _ASM_ATOMIC64_H_
29 #define _ASM_ATOMIC64_H_
31 #include <linux/compiler.h>
32 #include <sys/types.h>
33 #include <machine/atomic.h>
36 volatile int64_t counter;
39 #define ATOMIC64_INIT(x) { .counter = (x) }
41 /*------------------------------------------------------------------------*
42 * 64-bit atomic operations
43 *------------------------------------------------------------------------*/
45 #define atomic64_add(i, v) atomic64_add_return((i), (v))
46 #define atomic64_sub(i, v) atomic64_sub_return((i), (v))
47 #define atomic64_inc_return(v) atomic64_add_return(1, (v))
48 #define atomic64_add_negative(i, v) (atomic64_add_return((i), (v)) < 0)
49 #define atomic64_add_and_test(i, v) (atomic64_add_return((i), (v)) == 0)
50 #define atomic64_sub_and_test(i, v) (atomic64_sub_return((i), (v)) == 0)
51 #define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0)
52 #define atomic64_inc_and_test(v) (atomic64_add_return(1, (v)) == 0)
53 #define atomic64_dec_return(v) atomic64_sub_return(1, (v))
54 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
57 atomic64_add_return(int64_t i, atomic64_t *v)
59 return i + atomic_fetchadd_64(&v->counter, i);
63 atomic64_sub_return(int64_t i, atomic64_t *v)
65 return atomic_fetchadd_64(&v->counter, -i) - i;
69 atomic64_set(atomic64_t *v, int64_t i)
71 atomic_store_rel_64(&v->counter, i);
75 atomic64_read(atomic64_t *v)
77 return READ_ONCE(v->counter);
81 atomic64_inc(atomic64_t *v)
83 return atomic_fetchadd_64(&v->counter, 1) + 1;
87 atomic64_dec(atomic64_t *v)
89 return atomic_fetchadd_64(&v->counter, -1) - 1;
93 atomic64_add_unless(atomic64_t *v, int64_t a, int64_t u)
101 if (likely(atomic_cmpset_64(&v->counter, c, c + a)))
107 static inline int64_t
108 atomic64_xchg(atomic64_t *v, int64_t i)
110 #if defined(__i386__) || defined(__amd64__) || \
111 defined(__arm__) || defined(__aarch64__) || \
112 defined(__powerpc64__)
113 return (atomic_swap_64(&v->counter, i));
117 ret = READ_ONCE(v->counter);
118 if (atomic_cmpset_64(&v->counter, ret, i))
125 static inline int64_t
126 atomic64_cmpxchg(atomic64_t *v, int64_t old, int64_t new)
131 if (atomic_cmpset_64(&v->counter, old, new))
133 ret = READ_ONCE(v->counter);
140 #endif /* _ASM_ATOMIC64_H_ */