2 * Copyright (c) 2010 Isilon Systems, Inc.
3 * Copyright (c) 2010 iX Systems, Inc.
4 * Copyright (c) 2010 Panasas, Inc.
5 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice unmodified, this list of conditions, and the following
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 #ifndef _LINUX_DMA_ATTR_H_
32 #define _LINUX_DMA_ATTR_H_
34 #define DMA_ATTR_WRITE_BARRIER (1 << 0)
35 #define DMA_ATTR_WEAK_ORDERING (1 << 1)
36 #define DMA_ATTR_WRITE_COMBINE (1 << 2)
37 #define DMA_ATTR_NON_CONSISTENT (1 << 3)
38 #define DMA_ATTR_NO_KERNEL_MAPPING (1 << 4)
39 #define DMA_ATTR_SKIP_CPU_SYNC (1 << 5)
40 #define DMA_ATTR_FORCE_CONTIGUOUS (1 << 6)
41 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1 << 7)
42 #define DMA_ATTR_NO_WARN (1 << 8)
43 #define DMA_ATTR_PRIVILEGED (1 << 9)
49 #define DEFINE_DMA_ATTRS(x) struct dma_attrs x = { }
52 init_dma_attrs(struct dma_attrs *attrs)
57 #endif /* _LINUX_DMA_ATTR_H_ */