2 *******************************************************************************
3 Copyright (C) 2015 Annapurna Labs Ltd.
5 This file may be licensed under the terms of the Annapurna Labs Commercial
8 Alternatively, this file can be distributed under the terms of the GNU General
9 Public License V2 as published by the Free Software Foundation and can be
10 found at http://www.gnu.org/licenses/gpl-2.0.html
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13 without modification, are permitted provided that the following conditions are
16 * Redistributions of source code must retain the above copyright notice,
17 this list of conditions and the following disclaimer.
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24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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35 *******************************************************************************/
38 * @defgroup group_udma_debug UDMA Debug
39 * @ingroup group_udma_api
42 * @file al_hal_udma_debug.h
44 * @brief C Header file for the Universal DMA HAL driver for debug APIs
48 #ifndef __AL_HAL_UDMA_DEBUG_H__
49 #define __AL_HAL_UDMA_DEBUG_H__
51 #include <al_hal_udma.h>
59 /* UDMA register print helper macros */
60 #define AL_UDMA_PRINT_REG(UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG) \
61 al_dbg(PREFIX #REG " = 0x%08x" POSTFIX, al_reg_read32( \
62 &(UDMA->udma_regs->TYPE.GROUP.REG)))
64 #define AL_UDMA_PRINT_REG_FIELD( \
65 UDMA, PREFIX, POSTFIX, FMT, TYPE, GROUP, REG, LBL, FIELD) \
66 al_dbg(PREFIX #LBL " = " FMT POSTFIX, al_reg_read32( \
67 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
68 & FIELD ## _MASK >> FIELD ## _SHIFT)
70 #define AL_UDMA_PRINT_REG_BIT( \
71 UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG, LBL, FIELD) \
72 al_dbg(PREFIX #LBL " = %d" POSTFIX, ((al_reg_read32( \
73 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
76 /* UDMA register print mask definitions */
77 #define AL_UDMA_DEBUG_QUEUE(n) AL_BIT(n)
78 #define AL_UDMA_DEBUG_AXI AL_BIT(DMA_MAX_Q)
79 #define AL_UDMA_DEBUG_GENERAL AL_BIT(DMA_MAX_Q + 1)
80 #define AL_UDMA_DEBUG_READ AL_BIT(DMA_MAX_Q + 2)
81 #define AL_UDMA_DEBUG_WRITE AL_BIT(DMA_MAX_Q + 3)
82 #define AL_UDMA_DEBUG_DWRR AL_BIT(DMA_MAX_Q + 4)
83 #define AL_UDMA_DEBUG_RATE_LIMITER AL_BIT(DMA_MAX_Q + 5)
84 #define AL_UDMA_DEBUG_STREAM_RATE_LIMITER AL_BIT(DMA_MAX_Q + 6)
85 #define AL_UDMA_DEBUG_COMP AL_BIT(DMA_MAX_Q + 7)
86 #define AL_UDMA_DEBUG_STAT AL_BIT(DMA_MAX_Q + 8)
87 #define AL_UDMA_DEBUG_FEATURE AL_BIT(DMA_MAX_Q + 9)
88 #define AL_UDMA_DEBUG_ALL 0xFFFFFFFF
93 * Print udma registers according to the provided mask
95 * @param udma udma data structure
96 * @param mask mask that specifies which registers groups to print
97 * e.g. AL_UDMA_DEBUG_AXI prints AXI registers, AL_UDMA_DEBUG_ALL prints all
100 void al_udma_regs_print(struct al_udma *udma, unsigned int mask);
103 * Print udma queue software structure
105 * @param udma udma data structure
106 * @param qid queue index
108 void al_udma_q_struct_print(struct al_udma *udma, uint32_t qid);
110 /** UDMA ring type */
111 enum al_udma_ring_type {
117 * Print the ring entries for the specified queue index and ring type
118 * (submission/completion)
120 * @param udma udma data structure
121 * @param qid queue index
122 * @param rtype udma ring type
124 void al_udma_ring_print(struct al_udma *udma, uint32_t qid,
125 enum al_udma_ring_type rtype);
133 #endif /* __AL_HAL_UDMA_DEBUG_H__ */
134 /** @} end of UDMA debug group */