2 * Copyright 2009, 2010 Samy Al Bahra.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #ifndef CK_PR_SPARCV9_H
28 #define CK_PR_SPARCV9_H
31 #error Do not include this file directly, use ck_pr.h
38 * The following represent supported atomic operations.
39 * These operations may be emulated.
44 * Minimum interface requirement met.
49 * Order loads at the least.
51 CK_CC_INLINE static void
55 __asm__ __volatile__("membar #LoadLoad" ::: "memory");
59 #define CK_PR_FENCE(T, I) \
60 CK_CC_INLINE static void \
61 ck_pr_fence_strict_##T(void) \
63 __asm__ __volatile__(I ::: "memory"); \
67 * Atomic operations are treated as both load and store
68 * operations on SPARCv9.
70 CK_PR_FENCE(atomic, "membar #StoreStore")
71 CK_PR_FENCE(atomic_store, "membar #StoreStore")
72 CK_PR_FENCE(atomic_load, "membar #StoreLoad")
73 CK_PR_FENCE(store_atomic, "membar #StoreStore")
74 CK_PR_FENCE(load_atomic, "membar #LoadStore")
75 CK_PR_FENCE(store, "membar #StoreStore")
76 CK_PR_FENCE(store_load, "membar #StoreLoad")
77 CK_PR_FENCE(load, "membar #LoadLoad")
78 CK_PR_FENCE(load_store, "membar #LoadStore")
79 CK_PR_FENCE(memory, "membar #MemIssue")
80 CK_PR_FENCE(acquire, "membar #LoadLoad | #LoadStore")
81 CK_PR_FENCE(release, "membar #LoadStore | #StoreStore")
82 CK_PR_FENCE(acqrel, "membar #LoadLoad | #LoadStore | #StoreStore")
83 CK_PR_FENCE(lock, "membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad")
84 CK_PR_FENCE(unlock, "membar #LoadStore | #StoreStore")
88 #define CK_PR_LOAD(S, M, T, C, I) \
89 CK_CC_INLINE static T \
90 ck_pr_md_load_##S(const M *target) \
93 __asm__ __volatile__(I " [%1], %0" \
100 CK_PR_LOAD(ptr, void, void *, uint64_t, "ldx")
102 #define CK_PR_LOAD_S(S, T, I) CK_PR_LOAD(S, T, T, T, I)
104 CK_PR_LOAD_S(64, uint64_t, "ldx")
105 CK_PR_LOAD_S(32, uint32_t, "lduw")
106 CK_PR_LOAD_S(uint, unsigned int, "lduw")
107 CK_PR_LOAD_S(double, double, "ldx")
108 CK_PR_LOAD_S(int, int, "ldsw")
113 #define CK_PR_STORE(S, M, T, C, I) \
114 CK_CC_INLINE static void \
115 ck_pr_md_store_##S(M *target, T v) \
117 __asm__ __volatile__(I " %0, [%1]" \
125 CK_PR_STORE(ptr, void, const void *, uint64_t, "stx")
127 #define CK_PR_STORE_S(S, T, I) CK_PR_STORE(S, T, T, T, I)
129 CK_PR_STORE_S(8, uint8_t, "stub")
130 CK_PR_STORE_S(64, uint64_t, "stx")
131 CK_PR_STORE_S(32, uint32_t, "stuw")
132 CK_PR_STORE_S(uint, unsigned int, "stuw")
133 CK_PR_STORE_S(double, double, "stx")
134 CK_PR_STORE_S(int, int, "stsw")
139 CK_CC_INLINE static bool
140 ck_pr_cas_64_value(uint64_t *target, uint64_t compare, uint64_t set, uint64_t *value)
143 __asm__ __volatile__("casx [%1], %2, %0"
150 return (compare == set);
153 CK_CC_INLINE static bool
154 ck_pr_cas_64(uint64_t *target, uint64_t compare, uint64_t set)
157 __asm__ __volatile__("casx [%1], %2, %0"
163 return (compare == set);
166 CK_CC_INLINE static bool
167 ck_pr_cas_ptr(void *target, void *compare, void *set)
170 return ck_pr_cas_64(target, (uint64_t)compare, (uint64_t)set);
173 CK_CC_INLINE static bool
174 ck_pr_cas_ptr_value(void *target, void *compare, void *set, void *previous)
177 return ck_pr_cas_64_value(target, (uint64_t)compare, (uint64_t)set, previous);
180 #define CK_PR_CAS(N, T) \
181 CK_CC_INLINE static bool \
182 ck_pr_cas_##N##_value(T *target, T compare, T set, T *value) \
184 __asm__ __volatile__("cas [%1], %2, %0" \
190 return (compare == set); \
192 CK_CC_INLINE static bool \
193 ck_pr_cas_##N(T *target, T compare, T set) \
195 __asm__ __volatile__("cas [%1], %2, %0" \
200 return (compare == set); \
203 CK_PR_CAS(32, uint32_t)
204 CK_PR_CAS(uint, unsigned int)
209 #define CK_PR_FAS(N, T) \
210 CK_CC_INLINE static T \
211 ck_pr_fas_##N(T *target, T update) \
214 __asm__ __volatile__("swap [%1], %0" \
222 CK_PR_FAS(uint, unsigned int)
223 CK_PR_FAS(32, uint32_t)
227 #endif /* CK_PR_SPARCV9_H */