1 /******************************************************************************
3 * Name: actbl1.h - ACPI 1.0 tables
6 *****************************************************************************/
8 /******************************************************************************
12 * Some or all of this work - Copyright (c) 1999 - 2005, Intel Corp.
13 * All rights reserved.
17 * 2.1. This is your license from Intel Corp. under its intellectual property
18 * rights. You may have additional license terms from the party that provided
19 * you this software, covering your right to use that party's intellectual
22 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
23 * copy of the source code appearing in this file ("Covered Code") an
24 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
25 * base code distributed originally by Intel ("Original Intel Code") to copy,
26 * make derivatives, distribute, use and display any portion of the Covered
27 * Code in any form, with the right to sublicense such rights; and
29 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
30 * license (with the right to sublicense), under only those claims of Intel
31 * patents that are infringed by the Original Intel Code, to make, use, sell,
32 * offer to sell, and import the Covered Code and derivative works thereof
33 * solely to the minimum extent necessary to exercise the above copyright
34 * license, and in no event shall the patent license extend to any additions
35 * to or modifications of the Original Intel Code. No other license or right
36 * is granted directly or by implication, estoppel or otherwise;
38 * The above copyright and patent license is granted only if the following
43 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
44 * Redistribution of source code of any substantial portion of the Covered
45 * Code or modification with rights to further distribute source must include
46 * the above Copyright Notice, the above License, this list of Conditions,
47 * and the following Disclaimer and Export Compliance provision. In addition,
48 * Licensee must cause all Covered Code to which Licensee contributes to
49 * contain a file documenting the changes Licensee made to create that Covered
50 * Code and the date of any change. Licensee must include in that file the
51 * documentation of any changes made by any predecessor Licensee. Licensee
52 * must include a prominent statement that the modification is derived,
53 * directly or indirectly, from Original Intel Code.
55 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
56 * Redistribution of source code of any substantial portion of the Covered
57 * Code or modification without rights to further distribute source must
58 * include the following Disclaimer and Export Compliance provision in the
59 * documentation and/or other materials provided with distribution. In
60 * addition, Licensee may not authorize further sublicense of source of any
61 * portion of the Covered Code, and must include terms to the effect that the
62 * license from Licensee to its licensee is limited to the intellectual
63 * property embodied in the software Licensee provides to its licensee, and
64 * not to intellectual property embodied in modifications its licensee may
67 * 3.3. Redistribution of Executable. Redistribution in executable form of any
68 * substantial portion of the Covered Code or modification must reproduce the
69 * above Copyright Notice, and the following Disclaimer and Export Compliance
70 * provision in the documentation and/or other materials provided with the
73 * 3.4. Intel retains all right, title, and interest in and to the Original
76 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
77 * Intel shall be used in advertising or otherwise to promote the sale, use or
78 * other dealings in products derived from or relating to the Covered Code
79 * without prior written authorization from Intel.
81 * 4. Disclaimer and Export Compliance
83 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
84 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
85 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
86 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
87 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
88 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
91 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
92 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
93 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
94 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
95 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
96 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
97 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
100 * 4.3. Licensee shall not export, either directly or indirectly, any of this
101 * software or system incorporating such software without first obtaining any
102 * required license or other approval from the U. S. Department of Commerce or
103 * any other agency or department of the United States Government. In the
104 * event Licensee exports any such software from the United States or
105 * re-exports any such software from a foreign destination, Licensee shall
106 * ensure that the distribution and export/re-export of the software is in
107 * compliance with all laws, regulations, orders, or other restrictions of the
108 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
109 * any of its subsidiaries will export/re-export any technical data, process,
110 * software, or service, directly or indirectly, to any country for which the
111 * United States government or any agency thereof requires an export license,
112 * other governmental approval, or letter of assurance, without first obtaining
113 * such license, approval or letter.
115 *****************************************************************************/
123 * ACPI 1.0 Root System Description Table (RSDT)
125 typedef struct rsdt_descriptor_rev1
127 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
128 UINT32 TableOffsetEntry[1]; /* Array of pointers to ACPI tables */
130 } RSDT_DESCRIPTOR_REV1;
134 * ACPI 1.0 Firmware ACPI Control Structure (FACS)
136 typedef struct facs_descriptor_rev1
138 char Signature[4]; /* ASCII table signature */
139 UINT32 Length; /* Length of structure in bytes */
140 UINT32 HardwareSignature; /* Hardware configuration signature */
141 UINT32 FirmwareWakingVector; /* ACPI OS waking vector */
142 UINT32 GlobalLock; /* Global Lock */
144 /* Flags (32 bits) */
146 UINT8_BIT S4Bios_f : 1; /* 00: S4BIOS support is present */
147 UINT8_BIT : 7; /* 01-07: Reserved, must be zero */
148 UINT8 Reserved1[3]; /* 08-31: Reserved, must be zero */
150 UINT8 Reserved2[40]; /* Reserved, must be zero */
152 } FACS_DESCRIPTOR_REV1;
156 * ACPI 1.0 Fixed ACPI Description Table (FADT)
158 typedef struct fadt_descriptor_rev1
160 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
161 UINT32 FirmwareCtrl; /* Physical address of FACS */
162 UINT32 Dsdt; /* Physical address of DSDT */
163 UINT8 Model; /* System Interrupt Model */
164 UINT8 Reserved1; /* Reserved, must be zero */
165 UINT16 SciInt; /* System vector of SCI interrupt */
166 UINT32 SmiCmd; /* Port address of SMI command port */
167 UINT8 AcpiEnable; /* Value to write to smi_cmd to enable ACPI */
168 UINT8 AcpiDisable; /* Value to write to smi_cmd to disable ACPI */
169 UINT8 S4BiosReq; /* Value to write to SMI CMD to enter S4BIOS state */
170 UINT8 Reserved2; /* Reserved, must be zero */
171 UINT32 Pm1aEvtBlk; /* Port address of Power Mgt 1a AcpiEvent Reg Blk */
172 UINT32 Pm1bEvtBlk; /* Port address of Power Mgt 1b AcpiEvent Reg Blk */
173 UINT32 Pm1aCntBlk; /* Port address of Power Mgt 1a Control Reg Blk */
174 UINT32 Pm1bCntBlk; /* Port address of Power Mgt 1b Control Reg Blk */
175 UINT32 Pm2CntBlk; /* Port address of Power Mgt 2 Control Reg Blk */
176 UINT32 PmTmrBlk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
177 UINT32 Gpe0Blk; /* Port addr of General Purpose AcpiEvent 0 Reg Blk */
178 UINT32 Gpe1Blk; /* Port addr of General Purpose AcpiEvent 1 Reg Blk */
179 UINT8 Pm1EvtLen; /* Byte Length of ports at pm1X_evt_blk */
180 UINT8 Pm1CntLen; /* Byte Length of ports at pm1X_cnt_blk */
181 UINT8 Pm2CntLen; /* Byte Length of ports at pm2_cnt_blk */
182 UINT8 PmTmLen; /* Byte Length of ports at pm_tm_blk */
183 UINT8 Gpe0BlkLen; /* Byte Length of ports at gpe0_blk */
184 UINT8 Gpe1BlkLen; /* Byte Length of ports at gpe1_blk */
185 UINT8 Gpe1Base; /* Offset in gpe model where gpe1 events start */
186 UINT8 Reserved3; /* Reserved, must be zero */
187 UINT16 Plvl2Lat; /* Worst case HW latency to enter/exit C2 state */
188 UINT16 Plvl3Lat; /* Worst case HW latency to enter/exit C3 state */
189 UINT16 FlushSize; /* Size of area read to flush caches */
190 UINT16 FlushStride; /* Stride used in flushing caches */
191 UINT8 DutyOffset; /* Bit location of duty cycle field in p_cnt reg */
192 UINT8 DutyWidth; /* Bit width of duty cycle field in p_cnt reg */
193 UINT8 DayAlrm; /* Index to day-of-month alarm in RTC CMOS RAM */
194 UINT8 MonAlrm; /* Index to month-of-year alarm in RTC CMOS RAM */
195 UINT8 Century; /* Index to century in RTC CMOS RAM */
196 UINT8 Reserved4[3]; /* Reserved, must be zero */
198 /* Flags (32 bits) */
200 UINT8_BIT WbInvd : 1; /* 00: The wbinvd instruction works properly */
201 UINT8_BIT WbInvdFlush : 1; /* 01: The wbinvd flushes but does not invalidate */
202 UINT8_BIT ProcC1 : 1; /* 02: All processors support C1 state */
203 UINT8_BIT Plvl2Up : 1; /* 03: C2 state works on MP system */
204 UINT8_BIT PwrButton : 1; /* 04: Power button is handled as a generic feature */
205 UINT8_BIT SleepButton : 1; /* 05: Sleep button is handled as a generic feature, or not present */
206 UINT8_BIT FixedRTC : 1; /* 06: RTC wakeup stat not in fixed register space */
207 UINT8_BIT Rtcs4 : 1; /* 07: RTC wakeup stat not possible from S4 */
208 UINT8_BIT TmrValExt : 1; /* 08: tmr_val width is 32 bits (0 = 24 bits) */
209 UINT8_BIT : 7; /* 09-15: Reserved, must be zero */
210 UINT8 Reserved5[2]; /* 16-31: Reserved, must be zero */
212 } FADT_DESCRIPTOR_REV1;
216 #endif /* __ACTBL1_H__ */