1 /******************************************************************************
3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
5 *****************************************************************************/
7 /******************************************************************************
11 * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
12 * All rights reserved.
16 * 2.1. This is your license from Intel Corp. under its intellectual property
17 * rights. You may have additional license terms from the party that provided
18 * you this software, covering your right to use that party's intellectual
21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
22 * copy of the source code appearing in this file ("Covered Code") an
23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
24 * base code distributed originally by Intel ("Original Intel Code") to copy,
25 * make derivatives, distribute, use and display any portion of the Covered
26 * Code in any form, with the right to sublicense such rights; and
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
29 * license (with the right to sublicense), under only those claims of Intel
30 * patents that are infringed by the Original Intel Code, to make, use, sell,
31 * offer to sell, and import the Covered Code and derivative works thereof
32 * solely to the minimum extent necessary to exercise the above copyright
33 * license, and in no event shall the patent license extend to any additions
34 * to or modifications of the Original Intel Code. No other license or right
35 * is granted directly or by implication, estoppel or otherwise;
37 * The above copyright and patent license is granted only if the following
42 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
43 * Redistribution of source code of any substantial portion of the Covered
44 * Code or modification with rights to further distribute source must include
45 * the above Copyright Notice, the above License, this list of Conditions,
46 * and the following Disclaimer and Export Compliance provision. In addition,
47 * Licensee must cause all Covered Code to which Licensee contributes to
48 * contain a file documenting the changes Licensee made to create that Covered
49 * Code and the date of any change. Licensee must include in that file the
50 * documentation of any changes made by any predecessor Licensee. Licensee
51 * must include a prominent statement that the modification is derived,
52 * directly or indirectly, from Original Intel Code.
54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
55 * Redistribution of source code of any substantial portion of the Covered
56 * Code or modification without rights to further distribute source must
57 * include the following Disclaimer and Export Compliance provision in the
58 * documentation and/or other materials provided with distribution. In
59 * addition, Licensee may not authorize further sublicense of source of any
60 * portion of the Covered Code, and must include terms to the effect that the
61 * license from Licensee to its licensee is limited to the intellectual
62 * property embodied in the software Licensee provides to its licensee, and
63 * not to intellectual property embodied in modifications its licensee may
66 * 3.3. Redistribution of Executable. Redistribution in executable form of any
67 * substantial portion of the Covered Code or modification must reproduce the
68 * above Copyright Notice, and the following Disclaimer and Export Compliance
69 * provision in the documentation and/or other materials provided with the
72 * 3.4. Intel retains all right, title, and interest in and to the Original
75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
76 * Intel shall be used in advertising or otherwise to promote the sale, use or
77 * other dealings in products derived from or relating to the Covered Code
78 * without prior written authorization from Intel.
80 * 4. Disclaimer and Export Compliance
82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
99 * 4.3. Licensee shall not export, either directly or indirectly, any of this
100 * software or system incorporating such software without first obtaining any
101 * required license or other approval from the U. S. Department of Commerce or
102 * any other agency or department of the United States Government. In the
103 * event Licensee exports any such software from the United States or
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
106 * compliance with all laws, regulations, orders, or other restrictions of the
107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
108 * any of its subsidiaries will export/re-export any technical data, process,
109 * software, or service, directly or indirectly, to any country for which the
110 * United States government or any agency thereof requires an export license,
111 * other governmental approval, or letter of assurance, without first obtaining
112 * such license, approval or letter.
114 *****************************************************************************
116 * Alternatively, you may choose to be licensed under the terms of the
119 * Redistribution and use in source and binary forms, with or without
120 * modification, are permitted provided that the following conditions
122 * 1. Redistributions of source code must retain the above copyright
123 * notice, this list of conditions, and the following disclaimer,
124 * without modification.
125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
126 * substantially similar to the "NO WARRANTY" disclaimer below
127 * ("Disclaimer") and any redistribution must be conditioned upon
128 * including a substantially similar Disclaimer requirement for further
129 * binary redistribution.
130 * 3. Neither the names of the above-listed copyright holders nor the names
131 * of any contributors may be used to endorse or promote products derived
132 * from this software without specific prior written permission.
134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
146 * Alternatively, you may choose to be licensed under the terms of the
147 * GNU General Public License ("GPL") version 2 as published by the Free
148 * Software Foundation.
150 *****************************************************************************/
156 /*******************************************************************************
158 * Additional ACPI Tables (2)
160 * These tables are not consumed directly by the ACPICA subsystem, but are
161 * included here to support device drivers and the AML disassembler.
163 ******************************************************************************/
167 * Values for description table header signatures for tables defined in this
168 * file. Useful because they make it more difficult to inadvertently type in
169 * the wrong signature.
171 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
172 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
173 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
174 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
175 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
176 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
177 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
178 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
179 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
180 #define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
181 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
182 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
183 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
184 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
185 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
186 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */
187 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
188 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
189 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
193 * All tables must be byte-packed to match the ACPI specification, since
194 * the tables are provided by the system BIOS.
199 * Note: C bitfields are not used for this reason:
201 * "Bitfields are great and easy to read, but unfortunately the C language
202 * does not specify the layout of bitfields in memory, which means they are
203 * essentially useless for dealing with packed data in on-disk formats or
204 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
205 * this decision was a design error in C. Ritchie could have picked an order
206 * and stuck with it." Norman Ramsey.
207 * See http://stackoverflow.com/a/1053662/41661
211 /*******************************************************************************
213 * IORT - IO Remapping Table
215 * Conforms to "IO Remapping Table System Software on ARM Platforms",
216 * Document number: ARM DEN 0049C, May 2017
218 ******************************************************************************/
220 typedef struct acpi_table_iort
222 ACPI_TABLE_HEADER Header;
233 typedef struct acpi_iort_node
240 UINT32 MappingOffset;
245 /* Values for subtable Type above */
247 enum AcpiIortNodeType
249 ACPI_IORT_NODE_ITS_GROUP = 0x00,
250 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
251 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
252 ACPI_IORT_NODE_SMMU = 0x03,
253 ACPI_IORT_NODE_SMMU_V3 = 0x04
257 typedef struct acpi_iort_id_mapping
259 UINT32 InputBase; /* Lowest value in input range */
260 UINT32 IdCount; /* Number of IDs */
261 UINT32 OutputBase; /* Lowest value in output range */
262 UINT32 OutputReference; /* A reference to the output node */
265 } ACPI_IORT_ID_MAPPING;
267 /* Masks for Flags field above for IORT subtable */
269 #define ACPI_IORT_ID_SINGLE_MAPPING (1)
272 typedef struct acpi_iort_memory_access
274 UINT32 CacheCoherency;
279 } ACPI_IORT_MEMORY_ACCESS;
281 /* Values for CacheCoherency field above */
283 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
284 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
286 /* Masks for Hints field above */
288 #define ACPI_IORT_HT_TRANSIENT (1)
289 #define ACPI_IORT_HT_WRITE (1<<1)
290 #define ACPI_IORT_HT_READ (1<<2)
291 #define ACPI_IORT_HT_OVERRIDE (1<<3)
293 /* Masks for MemoryFlags field above */
295 #define ACPI_IORT_MF_COHERENCY (1)
296 #define ACPI_IORT_MF_ATTRIBUTES (1<<1)
300 * IORT node specific subtables
302 typedef struct acpi_iort_its_group
305 UINT32 Identifiers[1]; /* GIC ITS identifier arrary */
307 } ACPI_IORT_ITS_GROUP;
310 typedef struct acpi_iort_named_component
313 UINT64 MemoryProperties; /* Memory access properties */
314 UINT8 MemoryAddressLimit; /* Memory address size limit */
315 char DeviceName[1]; /* Path of namespace object */
317 } ACPI_IORT_NAMED_COMPONENT;
320 typedef struct acpi_iort_root_complex
322 UINT64 MemoryProperties; /* Memory access properties */
324 UINT32 PciSegmentNumber;
326 } ACPI_IORT_ROOT_COMPLEX;
328 /* Values for AtsAttribute field above */
330 #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
331 #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
334 typedef struct acpi_iort_smmu
336 UINT64 BaseAddress; /* SMMU base address */
337 UINT64 Span; /* Length of memory range */
340 UINT32 GlobalInterruptOffset;
341 UINT32 ContextInterruptCount;
342 UINT32 ContextInterruptOffset;
343 UINT32 PmuInterruptCount;
344 UINT32 PmuInterruptOffset;
345 UINT64 Interrupts[1]; /* Interrupt array */
349 /* Values for Model field above */
351 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
352 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
353 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
354 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
355 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
356 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */
358 /* Masks for Flags field above */
360 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
361 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
363 /* Global interrupt format */
365 typedef struct acpi_iort_smmu_gsi
370 UINT32 NSgCfgIrptFlags;
372 } ACPI_IORT_SMMU_GSI;
375 typedef struct acpi_iort_smmu_v3
377 UINT64 BaseAddress; /* SMMUv3 base address */
389 UINT32 IdMappingIndex;
393 /* Values for Model field above */
395 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
396 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */
397 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
399 /* Masks for Flags field above */
401 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
402 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (1<<1)
403 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
406 /*******************************************************************************
408 * IVRS - I/O Virtualization Reporting Structure
411 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
412 * Revision 1.26, February 2009.
414 ******************************************************************************/
416 typedef struct acpi_table_ivrs
418 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
419 UINT32 Info; /* Common virtualization info */
424 /* Values for Info field above */
426 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
427 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
428 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
431 /* IVRS subtable header */
433 typedef struct acpi_ivrs_header
435 UINT8 Type; /* Subtable type */
437 UINT16 Length; /* Subtable length */
438 UINT16 DeviceId; /* ID of IOMMU */
442 /* Values for subtable Type above */
446 ACPI_IVRS_TYPE_HARDWARE = 0x10,
447 ACPI_IVRS_TYPE_HARDWARE_EXT1 = 0x11,
448 ACPI_IVRS_TYPE_HARDWARE_EXT2 = 0x40,
449 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
450 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
451 ACPI_IVRS_TYPE_MEMORY3 = 0x22
454 /* Masks for Flags field above for IVHD subtable */
456 #define ACPI_IVHD_TT_ENABLE (1)
457 #define ACPI_IVHD_PASS_PW (1<<1)
458 #define ACPI_IVHD_RES_PASS_PW (1<<2)
459 #define ACPI_IVHD_ISOC (1<<3)
460 #define ACPI_IVHD_IOTLB (1<<4)
462 /* Masks for Flags field above for IVMD subtable */
464 #define ACPI_IVMD_UNITY (1)
465 #define ACPI_IVMD_READ (1<<1)
466 #define ACPI_IVMD_WRITE (1<<2)
467 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
471 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER
474 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
476 typedef struct acpi_ivrs_hardware
478 ACPI_IVRS_HEADER Header;
479 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */
480 UINT64 BaseAddress; /* IOMMU control registers */
481 UINT16 PciSegmentGroup;
482 UINT16 Info; /* MSI number and unit ID */
485 } ACPI_IVRS_HARDWARE;
487 /* 0x11 and 0x40: I/O Virtualization Hardware Definition Block (IVHD) */
489 typedef struct acpi_ivrs_hardware_new
491 ACPI_IVRS_HEADER Header;
492 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */
493 UINT64 BaseAddress; /* IOMMU control registers */
494 UINT16 PciSegmentGroup;
495 UINT16 Info; /* MSI number and unit ID */
496 UINT32 Attr; /* IOMMU Feature */
497 UINT64 ExtFR; /* IOMMU Extended Feature */
498 UINT64 Reserved; /* v1 feature or v2 attribute */
500 } ACPI_IVRS_HARDWARE_NEW;
502 /* Masks for Info field above */
504 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
505 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */
509 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure.
510 * Upper two bits of the Type field are the (encoded) length of the structure.
511 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
512 * are reserved for future use but not defined.
514 typedef struct acpi_ivrs_de_header
520 } ACPI_IVRS_DE_HEADER;
522 /* Length of device entry is in the top two bits of Type field above */
524 #define ACPI_IVHD_ENTRY_LENGTH 0xC0
526 /* Values for device entry Type field above */
528 enum AcpiIvrsDeviceEntryType
530 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */
532 ACPI_IVRS_TYPE_PAD4 = 0,
533 ACPI_IVRS_TYPE_ALL = 1,
534 ACPI_IVRS_TYPE_SELECT = 2,
535 ACPI_IVRS_TYPE_START = 3,
536 ACPI_IVRS_TYPE_END = 4,
538 /* 8-byte device entries */
540 ACPI_IVRS_TYPE_PAD8 = 64,
541 ACPI_IVRS_TYPE_NOT_USED = 65,
542 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */
543 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */
544 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */
545 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */
546 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses ACPI_IVRS_DEVICE8C */
549 /* Values for Data field above */
551 #define ACPI_IVHD_INIT_PASS (1)
552 #define ACPI_IVHD_EINT_PASS (1<<1)
553 #define ACPI_IVHD_NMI_PASS (1<<2)
554 #define ACPI_IVHD_SYSTEM_MGMT (3<<4)
555 #define ACPI_IVHD_LINT0_PASS (1<<6)
556 #define ACPI_IVHD_LINT1_PASS (1<<7)
559 /* Types 0-4: 4-byte device entry */
561 typedef struct acpi_ivrs_device4
563 ACPI_IVRS_DE_HEADER Header;
567 /* Types 66-67: 8-byte device entry */
569 typedef struct acpi_ivrs_device8a
571 ACPI_IVRS_DE_HEADER Header;
576 } ACPI_IVRS_DEVICE8A;
578 /* Types 70-71: 8-byte device entry */
580 typedef struct acpi_ivrs_device8b
582 ACPI_IVRS_DE_HEADER Header;
585 } ACPI_IVRS_DEVICE8B;
587 /* Values for ExtendedData above */
589 #define ACPI_IVHD_ATS_DISABLED (1<<31)
591 /* Type 72: 8-byte device entry */
593 typedef struct acpi_ivrs_device8c
595 ACPI_IVRS_DE_HEADER Header;
600 } ACPI_IVRS_DEVICE8C;
602 /* Values for Variety field above */
604 #define ACPI_IVHD_IOAPIC 1
605 #define ACPI_IVHD_HPET 2
608 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
610 typedef struct acpi_ivrs_memory
612 ACPI_IVRS_HEADER Header;
621 /*******************************************************************************
623 * LPIT - Low Power Idle Table
625 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
627 ******************************************************************************/
629 typedef struct acpi_table_lpit
631 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
636 /* LPIT subtable header */
638 typedef struct acpi_lpit_header
640 UINT32 Type; /* Subtable type */
641 UINT32 Length; /* Subtable length */
648 /* Values for subtable Type above */
652 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
653 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
656 /* Masks for Flags field above */
658 #define ACPI_LPIT_STATE_DISABLED (1)
659 #define ACPI_LPIT_NO_COUNTER (1<<1)
662 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER
665 /* 0x00: Native C-state instruction based LPI structure */
667 typedef struct acpi_lpit_native
669 ACPI_LPIT_HEADER Header;
670 ACPI_GENERIC_ADDRESS EntryTrigger;
673 ACPI_GENERIC_ADDRESS ResidencyCounter;
674 UINT64 CounterFrequency;
679 /*******************************************************************************
681 * MADT - Multiple APIC Description Table
684 ******************************************************************************/
686 typedef struct acpi_table_madt
688 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
689 UINT32 Address; /* Physical address of local APIC */
694 /* Masks for Flags field above */
696 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
698 /* Values for PCATCompat flag */
700 #define ACPI_MADT_DUAL_PIC 1
701 #define ACPI_MADT_MULTIPLE_APIC 0
704 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */
708 ACPI_MADT_TYPE_LOCAL_APIC = 0,
709 ACPI_MADT_TYPE_IO_APIC = 1,
710 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
711 ACPI_MADT_TYPE_NMI_SOURCE = 3,
712 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
713 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
714 ACPI_MADT_TYPE_IO_SAPIC = 6,
715 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
716 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
717 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
718 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
719 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
720 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
721 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
722 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
723 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
724 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */
729 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER
732 /* 0: Processor Local APIC */
734 typedef struct acpi_madt_local_apic
736 ACPI_SUBTABLE_HEADER Header;
737 UINT8 ProcessorId; /* ACPI processor id */
738 UINT8 Id; /* Processor's local APIC id */
741 } ACPI_MADT_LOCAL_APIC;
746 typedef struct acpi_madt_io_apic
748 ACPI_SUBTABLE_HEADER Header;
749 UINT8 Id; /* I/O APIC ID */
750 UINT8 Reserved; /* Reserved - must be zero */
751 UINT32 Address; /* APIC physical address */
752 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */
757 /* 2: Interrupt Override */
759 typedef struct acpi_madt_interrupt_override
761 ACPI_SUBTABLE_HEADER Header;
762 UINT8 Bus; /* 0 - ISA */
763 UINT8 SourceIrq; /* Interrupt source (IRQ) */
764 UINT32 GlobalIrq; /* Global system interrupt */
767 } ACPI_MADT_INTERRUPT_OVERRIDE;
772 typedef struct acpi_madt_nmi_source
774 ACPI_SUBTABLE_HEADER Header;
776 UINT32 GlobalIrq; /* Global system interrupt */
778 } ACPI_MADT_NMI_SOURCE;
781 /* 4: Local APIC NMI */
783 typedef struct acpi_madt_local_apic_nmi
785 ACPI_SUBTABLE_HEADER Header;
786 UINT8 ProcessorId; /* ACPI processor id */
788 UINT8 Lint; /* LINTn to which NMI is connected */
790 } ACPI_MADT_LOCAL_APIC_NMI;
793 /* 5: Address Override */
795 typedef struct acpi_madt_local_apic_override
797 ACPI_SUBTABLE_HEADER Header;
798 UINT16 Reserved; /* Reserved, must be zero */
799 UINT64 Address; /* APIC physical address */
801 } ACPI_MADT_LOCAL_APIC_OVERRIDE;
806 typedef struct acpi_madt_io_sapic
808 ACPI_SUBTABLE_HEADER Header;
809 UINT8 Id; /* I/O SAPIC ID */
810 UINT8 Reserved; /* Reserved, must be zero */
811 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */
812 UINT64 Address; /* SAPIC physical address */
814 } ACPI_MADT_IO_SAPIC;
819 typedef struct acpi_madt_local_sapic
821 ACPI_SUBTABLE_HEADER Header;
822 UINT8 ProcessorId; /* ACPI processor id */
823 UINT8 Id; /* SAPIC ID */
824 UINT8 Eid; /* SAPIC EID */
825 UINT8 Reserved[3]; /* Reserved, must be zero */
827 UINT32 Uid; /* Numeric UID - ACPI 3.0 */
828 char UidString[1]; /* String UID - ACPI 3.0 */
830 } ACPI_MADT_LOCAL_SAPIC;
833 /* 8: Platform Interrupt Source */
835 typedef struct acpi_madt_interrupt_source
837 ACPI_SUBTABLE_HEADER Header;
839 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */
840 UINT8 Id; /* Processor ID */
841 UINT8 Eid; /* Processor EID */
842 UINT8 IoSapicVector; /* Vector value for PMI interrupts */
843 UINT32 GlobalIrq; /* Global system interrupt */
844 UINT32 Flags; /* Interrupt Source Flags */
846 } ACPI_MADT_INTERRUPT_SOURCE;
848 /* Masks for Flags field above */
850 #define ACPI_MADT_CPEI_OVERRIDE (1)
853 /* 9: Processor Local X2APIC (ACPI 4.0) */
855 typedef struct acpi_madt_local_x2apic
857 ACPI_SUBTABLE_HEADER Header;
858 UINT16 Reserved; /* Reserved - must be zero */
859 UINT32 LocalApicId; /* Processor x2APIC ID */
861 UINT32 Uid; /* ACPI processor UID */
863 } ACPI_MADT_LOCAL_X2APIC;
866 /* 10: Local X2APIC NMI (ACPI 4.0) */
868 typedef struct acpi_madt_local_x2apic_nmi
870 ACPI_SUBTABLE_HEADER Header;
872 UINT32 Uid; /* ACPI processor UID */
873 UINT8 Lint; /* LINTn to which NMI is connected */
874 UINT8 Reserved[3]; /* Reserved - must be zero */
876 } ACPI_MADT_LOCAL_X2APIC_NMI;
879 /* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */
881 typedef struct acpi_madt_generic_interrupt
883 ACPI_SUBTABLE_HEADER Header;
884 UINT16 Reserved; /* Reserved - must be zero */
885 UINT32 CpuInterfaceNumber;
888 UINT32 ParkingVersion;
889 UINT32 PerformanceInterrupt;
890 UINT64 ParkedAddress;
892 UINT64 GicvBaseAddress;
893 UINT64 GichBaseAddress;
894 UINT32 VgicInterrupt;
895 UINT64 GicrBaseAddress;
897 UINT8 EfficiencyClass;
900 } ACPI_MADT_GENERIC_INTERRUPT;
902 /* Masks for Flags field above */
904 /* ACPI_MADT_ENABLED (1) Processor is usable if set */
905 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
906 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
909 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
911 typedef struct acpi_madt_generic_distributor
913 ACPI_SUBTABLE_HEADER Header;
914 UINT16 Reserved; /* Reserved - must be zero */
917 UINT32 GlobalIrqBase;
919 UINT8 Reserved2[3]; /* Reserved - must be zero */
921 } ACPI_MADT_GENERIC_DISTRIBUTOR;
923 /* Values for Version field above */
925 enum AcpiMadtGicVersion
927 ACPI_MADT_GIC_VERSION_NONE = 0,
928 ACPI_MADT_GIC_VERSION_V1 = 1,
929 ACPI_MADT_GIC_VERSION_V2 = 2,
930 ACPI_MADT_GIC_VERSION_V3 = 3,
931 ACPI_MADT_GIC_VERSION_V4 = 4,
932 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
936 /* 13: Generic MSI Frame (ACPI 5.1) */
938 typedef struct acpi_madt_generic_msi_frame
940 ACPI_SUBTABLE_HEADER Header;
941 UINT16 Reserved; /* Reserved - must be zero */
948 } ACPI_MADT_GENERIC_MSI_FRAME;
950 /* Masks for Flags field above */
952 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
955 /* 14: Generic Redistributor (ACPI 5.1) */
957 typedef struct acpi_madt_generic_redistributor
959 ACPI_SUBTABLE_HEADER Header;
960 UINT16 Reserved; /* reserved - must be zero */
964 } ACPI_MADT_GENERIC_REDISTRIBUTOR;
967 /* 15: Generic Translator (ACPI 6.0) */
969 typedef struct acpi_madt_generic_translator
971 ACPI_SUBTABLE_HEADER Header;
972 UINT16 Reserved; /* reserved - must be zero */
973 UINT32 TranslationId;
977 } ACPI_MADT_GENERIC_TRANSLATOR;
981 * Common flags fields for MADT subtables
984 /* MADT Local APIC flags */
986 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
988 /* MADT MPS INTI flags (IntiFlags) */
990 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
991 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
993 /* Values for MPS INTI flags */
995 #define ACPI_MADT_POLARITY_CONFORMS 0
996 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
997 #define ACPI_MADT_POLARITY_RESERVED 2
998 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3
1000 #define ACPI_MADT_TRIGGER_CONFORMS (0)
1001 #define ACPI_MADT_TRIGGER_EDGE (1<<2)
1002 #define ACPI_MADT_TRIGGER_RESERVED (2<<2)
1003 #define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1006 /*******************************************************************************
1008 * MCFG - PCI Memory Mapped Configuration table and subtable
1011 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1013 ******************************************************************************/
1015 typedef struct acpi_table_mcfg
1017 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1025 typedef struct acpi_mcfg_allocation
1027 UINT64 Address; /* Base address, processor-relative */
1028 UINT16 PciSegment; /* PCI segment group number */
1029 UINT8 StartBusNumber; /* Starting PCI Bus number */
1030 UINT8 EndBusNumber; /* Final PCI Bus number */
1033 } ACPI_MCFG_ALLOCATION;
1036 /*******************************************************************************
1038 * MCHI - Management Controller Host Interface Table
1041 * Conforms to "Management Component Transport Protocol (MCTP) Host
1042 * Interface Specification", Revision 1.0.0a, October 13, 2009
1044 ******************************************************************************/
1046 typedef struct acpi_table_mchi
1048 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1049 UINT8 InterfaceType;
1051 UINT64 ProtocolData;
1052 UINT8 InterruptType;
1054 UINT8 PciDeviceFlag;
1055 UINT32 GlobalInterrupt;
1056 ACPI_GENERIC_ADDRESS ControlRegister;
1065 /*******************************************************************************
1067 * MPST - Memory Power State Table (ACPI 5.0)
1070 ******************************************************************************/
1072 #define ACPI_MPST_CHANNEL_INFO \
1074 UINT8 Reserved1[3]; \
1075 UINT16 PowerNodeCount; \
1080 typedef struct acpi_table_mpst
1082 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1083 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1088 /* Memory Platform Communication Channel Info */
1090 typedef struct acpi_mpst_channel
1092 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1094 } ACPI_MPST_CHANNEL;
1097 /* Memory Power Node Structure */
1099 typedef struct acpi_mpst_power_node
1105 UINT64 RangeAddress;
1107 UINT32 NumPowerStates;
1108 UINT32 NumPhysicalComponents;
1110 } ACPI_MPST_POWER_NODE;
1112 /* Values for Flags field above */
1114 #define ACPI_MPST_ENABLED 1
1115 #define ACPI_MPST_POWER_MANAGED 2
1116 #define ACPI_MPST_HOT_PLUG_CAPABLE 4
1119 /* Memory Power State Structure (follows POWER_NODE above) */
1121 typedef struct acpi_mpst_power_state
1126 } ACPI_MPST_POWER_STATE;
1129 /* Physical Component ID Structure (follows POWER_STATE above) */
1131 typedef struct acpi_mpst_component
1135 } ACPI_MPST_COMPONENT;
1138 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1140 typedef struct acpi_mpst_data_hdr
1142 UINT16 CharacteristicsCount;
1145 } ACPI_MPST_DATA_HDR;
1147 typedef struct acpi_mpst_power_data
1152 UINT32 AveragePower;
1157 } ACPI_MPST_POWER_DATA;
1159 /* Values for Flags field above */
1161 #define ACPI_MPST_PRESERVE 1
1162 #define ACPI_MPST_AUTOENTRY 2
1163 #define ACPI_MPST_AUTOEXIT 4
1166 /* Shared Memory Region (not part of an ACPI table) */
1168 typedef struct acpi_mpst_shared
1173 UINT32 CommandRegister;
1174 UINT32 StatusRegister;
1175 UINT32 PowerStateId;
1177 UINT64 EnergyConsumed;
1178 UINT64 AveragePower;
1183 /*******************************************************************************
1185 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1188 ******************************************************************************/
1190 typedef struct acpi_table_msct
1192 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1193 UINT32 ProximityOffset; /* Location of proximity info struct(s) */
1194 UINT32 MaxProximityDomains;/* Max number of proximity domains */
1195 UINT32 MaxClockDomains; /* Max number of clock domains */
1196 UINT64 MaxAddress; /* Max physical address in system */
1201 /* Subtable - Maximum Proximity Domain Information. Version 1 */
1203 typedef struct acpi_msct_proximity
1207 UINT32 RangeStart; /* Start of domain range */
1208 UINT32 RangeEnd; /* End of domain range */
1209 UINT32 ProcessorCapacity;
1210 UINT64 MemoryCapacity; /* In bytes */
1212 } ACPI_MSCT_PROXIMITY;
1215 /*******************************************************************************
1217 * MSDM - Microsoft Data Management table
1219 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1220 * November 29, 2011. Copyright 2011 Microsoft
1222 ******************************************************************************/
1224 /* Basic MSDM table is only the common ACPI header */
1226 typedef struct acpi_table_msdm
1228 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1233 /*******************************************************************************
1235 * MTMR - MID Timer Table
1238 * Conforms to "Simple Firmware Interface Specification",
1239 * Draft 0.8.2, Oct 19, 2010
1240 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
1242 ******************************************************************************/
1244 typedef struct acpi_table_mtmr
1246 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1252 typedef struct acpi_mtmr_entry
1254 ACPI_GENERIC_ADDRESS PhysicalAddress;
1261 /*******************************************************************************
1263 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1266 ******************************************************************************/
1268 typedef struct acpi_table_nfit
1270 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1271 UINT32 Reserved; /* Reserved, must be zero */
1275 /* Subtable header for NFIT */
1277 typedef struct acpi_nfit_header
1285 /* Values for subtable type in ACPI_NFIT_HEADER */
1289 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1290 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1291 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1292 ACPI_NFIT_TYPE_SMBIOS = 3,
1293 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1294 ACPI_NFIT_TYPE_DATA_REGION = 5,
1295 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1296 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1297 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1304 /* 0: System Physical Address Range Structure */
1306 typedef struct acpi_nfit_system_address
1308 ACPI_NFIT_HEADER Header;
1311 UINT32 Reserved; /* Reserved, must be zero */
1312 UINT32 ProximityDomain;
1313 UINT8 RangeGuid[16];
1316 UINT64 MemoryMapping;
1318 } ACPI_NFIT_SYSTEM_ADDRESS;
1322 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1323 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1325 /* Range Type GUIDs appear in the include/acuuid.h file */
1328 /* 1: Memory Device to System Address Range Map Structure */
1330 typedef struct acpi_nfit_memory_map
1332 ACPI_NFIT_HEADER Header;
1333 UINT32 DeviceHandle;
1339 UINT64 RegionOffset;
1341 UINT16 InterleaveIndex;
1342 UINT16 InterleaveWays;
1344 UINT16 Reserved; /* Reserved, must be zero */
1346 } ACPI_NFIT_MEMORY_MAP;
1350 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1351 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1352 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1353 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1354 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1355 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1356 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1359 /* 2: Interleave Structure */
1361 typedef struct acpi_nfit_interleave
1363 ACPI_NFIT_HEADER Header;
1364 UINT16 InterleaveIndex;
1365 UINT16 Reserved; /* Reserved, must be zero */
1368 UINT32 LineOffset[1]; /* Variable length */
1370 } ACPI_NFIT_INTERLEAVE;
1373 /* 3: SMBIOS Management Information Structure */
1375 typedef struct acpi_nfit_smbios
1377 ACPI_NFIT_HEADER Header;
1378 UINT32 Reserved; /* Reserved, must be zero */
1379 UINT8 Data[1]; /* Variable length */
1384 /* 4: NVDIMM Control Region Structure */
1386 typedef struct acpi_nfit_control_region
1388 ACPI_NFIT_HEADER Header;
1393 UINT16 SubsystemVendorId;
1394 UINT16 SubsystemDeviceId;
1395 UINT16 SubsystemRevisionId;
1397 UINT8 ManufacturingLocation;
1398 UINT16 ManufacturingDate;
1399 UINT8 Reserved[2]; /* Reserved, must be zero */
1400 UINT32 SerialNumber;
1404 UINT64 CommandOffset;
1406 UINT64 StatusOffset;
1409 UINT8 Reserved1[6]; /* Reserved, must be zero */
1411 } ACPI_NFIT_CONTROL_REGION;
1415 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1417 /* ValidFields bits */
1419 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1422 /* 5: NVDIMM Block Data Window Region Structure */
1424 typedef struct acpi_nfit_data_region
1426 ACPI_NFIT_HEADER Header;
1432 UINT64 StartAddress;
1434 } ACPI_NFIT_DATA_REGION;
1437 /* 6: Flush Hint Address Structure */
1439 typedef struct acpi_nfit_flush_address
1441 ACPI_NFIT_HEADER Header;
1442 UINT32 DeviceHandle;
1444 UINT8 Reserved[6]; /* Reserved, must be zero */
1445 UINT64 HintAddress[1]; /* Variable length */
1447 } ACPI_NFIT_FLUSH_ADDRESS;
1450 /* 7: Platform Capabilities Structure */
1452 typedef struct acpi_nfit_capabilities
1454 ACPI_NFIT_HEADER Header;
1455 UINT8 HighestCapability;
1456 UINT8 Reserved[3]; /* Reserved, must be zero */
1457 UINT32 Capabilities;
1460 } ACPI_NFIT_CAPABILITIES;
1462 /* Capabilities Flags */
1464 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1465 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1466 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1470 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1472 typedef struct nfit_device_handle
1476 } NFIT_DEVICE_HANDLE;
1478 /* Device handle construction and extraction macros */
1480 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1481 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1482 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1483 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1484 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1486 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1487 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1488 #define ACPI_NFIT_MEMORY_ID_OFFSET 8
1489 #define ACPI_NFIT_SOCKET_ID_OFFSET 12
1490 #define ACPI_NFIT_NODE_ID_OFFSET 16
1492 /* Macro to construct a NFIT/NVDIMM device handle */
1494 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1496 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1497 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1498 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1499 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1501 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1503 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1504 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1506 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1507 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1509 #define ACPI_NFIT_GET_MEMORY_ID(handle) \
1510 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1512 #define ACPI_NFIT_GET_SOCKET_ID(handle) \
1513 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1515 #define ACPI_NFIT_GET_NODE_ID(handle) \
1516 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1519 /*******************************************************************************
1521 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1522 * Version 2 (ACPI 6.2)
1524 ******************************************************************************/
1526 typedef struct acpi_table_pcct
1528 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1534 /* Values for Flags field above */
1536 #define ACPI_PCCT_DOORBELL 1
1538 /* Values for subtable type in ACPI_SUBTABLE_HEADER */
1542 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1543 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1544 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1545 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1546 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1547 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */
1551 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER
1554 /* 0: Generic Communications Subspace */
1556 typedef struct acpi_pcct_subspace
1558 ACPI_SUBTABLE_HEADER Header;
1562 ACPI_GENERIC_ADDRESS DoorbellRegister;
1563 UINT64 PreserveMask;
1566 UINT32 MaxAccessRate;
1567 UINT16 MinTurnaroundTime;
1569 } ACPI_PCCT_SUBSPACE;
1572 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1574 typedef struct acpi_pcct_hw_reduced
1576 ACPI_SUBTABLE_HEADER Header;
1577 UINT32 PlatformInterrupt;
1582 ACPI_GENERIC_ADDRESS DoorbellRegister;
1583 UINT64 PreserveMask;
1586 UINT32 MaxAccessRate;
1587 UINT16 MinTurnaroundTime;
1589 } ACPI_PCCT_HW_REDUCED;
1592 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1594 typedef struct acpi_pcct_hw_reduced_type2
1596 ACPI_SUBTABLE_HEADER Header;
1597 UINT32 PlatformInterrupt;
1602 ACPI_GENERIC_ADDRESS DoorbellRegister;
1603 UINT64 PreserveMask;
1606 UINT32 MaxAccessRate;
1607 UINT16 MinTurnaroundTime;
1608 ACPI_GENERIC_ADDRESS PlatformAckRegister;
1609 UINT64 AckPreserveMask;
1610 UINT64 AckWriteMask;
1612 } ACPI_PCCT_HW_REDUCED_TYPE2;
1615 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1617 typedef struct acpi_pcct_ext_pcc_master
1619 ACPI_SUBTABLE_HEADER Header;
1620 UINT32 PlatformInterrupt;
1625 ACPI_GENERIC_ADDRESS DoorbellRegister;
1626 UINT64 PreserveMask;
1629 UINT32 MaxAccessRate;
1630 UINT32 MinTurnaroundTime;
1631 ACPI_GENERIC_ADDRESS PlatformAckRegister;
1632 UINT64 AckPreserveMask;
1635 ACPI_GENERIC_ADDRESS CmdCompleteRegister;
1636 UINT64 CmdCompleteMask;
1637 ACPI_GENERIC_ADDRESS CmdUpdateRegister;
1638 UINT64 CmdUpdatePreserveMask;
1639 UINT64 CmdUpdateSetMask;
1640 ACPI_GENERIC_ADDRESS ErrorStatusRegister;
1641 UINT64 ErrorStatusMask;
1643 } ACPI_PCCT_EXT_PCC_MASTER;
1646 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1648 typedef struct acpi_pcct_ext_pcc_slave
1650 ACPI_SUBTABLE_HEADER Header;
1651 UINT32 PlatformInterrupt;
1656 ACPI_GENERIC_ADDRESS DoorbellRegister;
1657 UINT64 PreserveMask;
1660 UINT32 MaxAccessRate;
1661 UINT32 MinTurnaroundTime;
1662 ACPI_GENERIC_ADDRESS PlatformAckRegister;
1663 UINT64 AckPreserveMask;
1666 ACPI_GENERIC_ADDRESS CmdCompleteRegister;
1667 UINT64 CmdCompleteMask;
1668 ACPI_GENERIC_ADDRESS CmdUpdateRegister;
1669 UINT64 CmdUpdatePreserveMask;
1670 UINT64 CmdUpdateSetMask;
1671 ACPI_GENERIC_ADDRESS ErrorStatusRegister;
1672 UINT64 ErrorStatusMask;
1674 } ACPI_PCCT_EXT_PCC_SLAVE;
1677 /* Values for doorbell flags above */
1679 #define ACPI_PCCT_INTERRUPT_POLARITY (1)
1680 #define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1684 * PCC memory structures (not part of the ACPI table)
1687 /* Shared Memory Region */
1689 typedef struct acpi_pcct_shared_memory
1695 } ACPI_PCCT_SHARED_MEMORY;
1698 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1700 typedef struct acpi_pcct_ext_pcc_shared_memory
1707 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY;
1710 /*******************************************************************************
1712 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1715 ******************************************************************************/
1717 typedef struct acpi_table_pdtt
1719 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1728 * PDTT Communication Channel Identifier Structure.
1729 * The number of these structures is defined by TriggerCount above,
1730 * starting at ArrayOffset.
1732 typedef struct acpi_pdtt_channel
1737 } ACPI_PDTT_CHANNEL;
1739 /* Flags for above */
1741 #define ACPI_PDTT_RUNTIME_TRIGGER (1)
1742 #define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1745 /*******************************************************************************
1747 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1750 ******************************************************************************/
1752 typedef struct acpi_table_pmtt
1754 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1760 /* Common header for PMTT subtables that follow main table */
1762 typedef struct acpi_pmtt_header
1772 /* Values for Type field above */
1774 #define ACPI_PMTT_TYPE_SOCKET 0
1775 #define ACPI_PMTT_TYPE_CONTROLLER 1
1776 #define ACPI_PMTT_TYPE_DIMM 2
1777 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
1779 /* Values for Flags field above */
1781 #define ACPI_PMTT_TOP_LEVEL 0x0001
1782 #define ACPI_PMTT_PHYSICAL 0x0002
1783 #define ACPI_PMTT_MEMORY_TYPE 0x000C
1787 * PMTT subtables, correspond to Type in acpi_pmtt_header
1791 /* 0: Socket Structure */
1793 typedef struct acpi_pmtt_socket
1795 ACPI_PMTT_HEADER Header;
1802 /* 1: Memory Controller subtable */
1804 typedef struct acpi_pmtt_controller
1806 ACPI_PMTT_HEADER Header;
1808 UINT32 WriteLatency;
1809 UINT32 ReadBandwidth;
1810 UINT32 WriteBandwidth;
1816 } ACPI_PMTT_CONTROLLER;
1818 /* 1a: Proximity Domain substructure */
1820 typedef struct acpi_pmtt_domain
1822 UINT32 ProximityDomain;
1827 /* 2: Physical Component Identifier (DIMM) */
1829 typedef struct acpi_pmtt_physical_component
1831 ACPI_PMTT_HEADER Header;
1837 } ACPI_PMTT_PHYSICAL_COMPONENT;
1840 /*******************************************************************************
1842 * PPTT - Processor Properties Topology Table (ACPI 6.2)
1845 ******************************************************************************/
1847 typedef struct acpi_table_pptt
1849 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1853 /* Values for Type field above */
1857 ACPI_PPTT_TYPE_PROCESSOR = 0,
1858 ACPI_PPTT_TYPE_CACHE = 1,
1859 ACPI_PPTT_TYPE_ID = 2,
1860 ACPI_PPTT_TYPE_RESERVED = 3
1864 /* 0: Processor Hierarchy Node Structure */
1866 typedef struct acpi_pptt_processor
1868 ACPI_SUBTABLE_HEADER Header;
1872 UINT32 AcpiProcessorId;
1873 UINT32 NumberOfPrivResources;
1875 } ACPI_PPTT_PROCESSOR;
1879 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */
1880 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */
1883 /* 1: Cache Type Structure */
1885 typedef struct acpi_pptt_cache
1887 ACPI_SUBTABLE_HEADER Header;
1890 UINT32 NextLevelOfCache;
1892 UINT32 NumberOfSets;
1893 UINT8 Associativity;
1901 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1902 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1903 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1904 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1905 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1906 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1907 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
1909 /* Masks for Attributes */
1911 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1912 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1913 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
1915 /* Attributes describing cache */
1916 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1917 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1918 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1919 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
1921 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1922 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1923 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1924 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1926 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1927 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1929 /* 2: ID Structure */
1931 typedef struct acpi_pptt_id
1933 ACPI_SUBTABLE_HEADER Header;
1945 /*******************************************************************************
1947 * RASF - RAS Feature Table (ACPI 5.0)
1950 ******************************************************************************/
1952 typedef struct acpi_table_rasf
1954 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1955 UINT8 ChannelId[12];
1959 /* RASF Platform Communication Channel Shared Memory Region */
1961 typedef struct acpi_rasf_shared_memory
1967 UINT8 Capabilities[16];
1968 UINT8 SetCapabilities[16];
1969 UINT16 NumParameterBlocks;
1970 UINT32 SetCapabilitiesStatus;
1972 } ACPI_RASF_SHARED_MEMORY;
1974 /* RASF Parameter Block Structure Header */
1976 typedef struct acpi_rasf_parameter_block
1982 } ACPI_RASF_PARAMETER_BLOCK;
1984 /* RASF Parameter Block Structure for PATROL_SCRUB */
1986 typedef struct acpi_rasf_patrol_scrub_parameter
1988 ACPI_RASF_PARAMETER_BLOCK Header;
1989 UINT16 PatrolScrubCommand;
1990 UINT64 RequestedAddressRange[2];
1991 UINT64 ActualAddressRange[2];
1993 UINT8 RequestedSpeed;
1995 } ACPI_RASF_PATROL_SCRUB_PARAMETER;
1997 /* Masks for Flags and Speed fields above */
1999 #define ACPI_RASF_SCRUBBER_RUNNING 1
2000 #define ACPI_RASF_SPEED (7<<1)
2001 #define ACPI_RASF_SPEED_SLOW (0<<1)
2002 #define ACPI_RASF_SPEED_MEDIUM (4<<1)
2003 #define ACPI_RASF_SPEED_FAST (7<<1)
2005 /* Channel Commands */
2007 enum AcpiRasfCommands
2009 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
2012 /* Platform RAS Capabilities */
2014 enum AcpiRasfCapabiliities
2016 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
2017 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
2020 /* Patrol Scrub Commands */
2022 enum AcpiRasfPatrolScrubCommands
2024 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
2025 ACPI_RASF_START_PATROL_SCRUBBER = 2,
2026 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
2029 /* Channel Command flags */
2031 #define ACPI_RASF_GENERATE_SCI (1<<15)
2037 ACPI_RASF_SUCCESS = 0,
2038 ACPI_RASF_NOT_VALID = 1,
2039 ACPI_RASF_NOT_SUPPORTED = 2,
2041 ACPI_RASF_FAILED = 4,
2042 ACPI_RASF_ABORTED = 5,
2043 ACPI_RASF_INVALID_DATA = 6
2048 #define ACPI_RASF_COMMAND_COMPLETE (1)
2049 #define ACPI_RASF_SCI_DOORBELL (1<<1)
2050 #define ACPI_RASF_ERROR (1<<2)
2051 #define ACPI_RASF_STATUS (0x1F<<3)
2054 /*******************************************************************************
2056 * SBST - Smart Battery Specification Table
2059 ******************************************************************************/
2061 typedef struct acpi_table_sbst
2063 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2064 UINT32 WarningLevel;
2066 UINT32 CriticalLevel;
2071 /*******************************************************************************
2073 * SDEI - Software Delegated Exception Interface Descriptor Table
2075 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
2076 * May 8th, 2017. Copyright 2017 ARM Ltd.
2078 ******************************************************************************/
2080 typedef struct acpi_table_sdei
2082 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2087 /*******************************************************************************
2089 * SDEV - Secure Devices Table (ACPI 6.2)
2092 ******************************************************************************/
2094 typedef struct acpi_table_sdev
2096 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2101 typedef struct acpi_sdev_header
2110 /* Values for subtable type above */
2114 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
2115 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
2116 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2119 /* Values for flags above */
2121 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
2127 /* 0: Namespace Device Based Secure Device Structure */
2129 typedef struct acpi_sdev_namespace
2131 ACPI_SDEV_HEADER Header;
2132 UINT16 DeviceIdOffset;
2133 UINT16 DeviceIdLength;
2134 UINT16 VendorDataOffset;
2135 UINT16 VendorDataLength;
2137 } ACPI_SDEV_NAMESPACE;
2139 /* 1: PCIe Endpoint Device Based Device Structure */
2141 typedef struct acpi_sdev_pcie
2143 ACPI_SDEV_HEADER Header;
2148 UINT16 VendorDataOffset;
2149 UINT16 VendorDataLength;
2153 /* 1a: PCIe Endpoint path entry */
2155 typedef struct acpi_sdev_pcie_path
2160 } ACPI_SDEV_PCIE_PATH;
2163 /* Reset to default packing */
2167 #endif /* __ACTBL2_H__ */