4 * Copyright (c) 2015-2019 Amazon.com, Inc. or its affiliates.
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 #define ENA_MAX_NUM_IO_QUEUES 128U
40 /* We need to queues for each IO (on for Tx and one for Rx) */
41 #define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))
43 #define ENA_MAX_HANDLERS 256
45 #define ENA_MAX_PHYS_ADDR_SIZE_BITS 48
48 #define ENA_REG_READ_TIMEOUT 200000
50 #define ADMIN_SQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aq_entry))
51 #define ADMIN_CQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_acq_entry))
52 #define ADMIN_AENQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aenq_entry))
54 /*****************************************************************************/
55 /*****************************************************************************/
56 /* ENA adaptive interrupt moderation settings */
58 #define ENA_INTR_LOWEST_USECS (0)
59 #define ENA_INTR_LOWEST_PKTS (3)
60 #define ENA_INTR_LOWEST_BYTES (2 * 1524)
62 #define ENA_INTR_LOW_USECS (32)
63 #define ENA_INTR_LOW_PKTS (12)
64 #define ENA_INTR_LOW_BYTES (16 * 1024)
66 #define ENA_INTR_MID_USECS (80)
67 #define ENA_INTR_MID_PKTS (48)
68 #define ENA_INTR_MID_BYTES (64 * 1024)
70 #define ENA_INTR_HIGH_USECS (128)
71 #define ENA_INTR_HIGH_PKTS (96)
72 #define ENA_INTR_HIGH_BYTES (128 * 1024)
74 #define ENA_INTR_HIGHEST_USECS (192)
75 #define ENA_INTR_HIGHEST_PKTS (128)
76 #define ENA_INTR_HIGHEST_BYTES (192 * 1024)
78 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS 196
79 #define ENA_INTR_INITIAL_RX_INTERVAL_USECS 4
80 #define ENA_INTR_DELAY_OLD_VALUE_WEIGHT 6
81 #define ENA_INTR_DELAY_NEW_VALUE_WEIGHT 4
82 #define ENA_INTR_MODER_LEVEL_STRIDE 1
83 #define ENA_INTR_BYTE_COUNT_NOT_SUPPORTED 0xFFFFFF
85 #define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
87 #define ENA_FEATURE_MAX_QUEUE_EXT_VER 1
89 enum ena_intr_moder_level {
90 ENA_INTR_MODER_LOWEST = 0,
94 ENA_INTR_MODER_HIGHEST,
95 ENA_INTR_MAX_NUM_OF_LEVELS,
98 struct ena_llq_configurations {
99 enum ena_admin_llq_header_location llq_header_location;
100 enum ena_admin_llq_ring_entry_size llq_ring_entry_size;
101 enum ena_admin_llq_stride_ctrl llq_stride_ctrl;
102 enum ena_admin_llq_num_descs_before_header llq_num_decs_before_header;
103 u16 llq_ring_entry_size_value;
106 struct ena_intr_moder_entry {
107 unsigned int intr_moder_interval;
108 unsigned int pkts_per_interval;
109 unsigned int bytes_per_interval;
112 enum queue_direction {
113 ENA_COM_IO_QUEUE_DIRECTION_TX,
114 ENA_COM_IO_QUEUE_DIRECTION_RX
118 dma_addr_t paddr; /**< Buffer physical address */
119 u16 len; /**< Buffer length in bytes */
122 struct ena_com_rx_buf_info {
127 struct ena_com_io_desc_addr {
128 u8 __iomem *pbuf_dev_addr; /* LLQ address */
130 dma_addr_t phys_addr;
131 ena_mem_handle_t mem_handle;
134 struct ena_com_tx_meta {
138 u16 l4_hdr_len; /* In words */
141 struct ena_com_llq_info {
142 u16 header_location_ctrl;
143 u16 desc_stride_ctrl;
144 u16 desc_list_entry_size_ctrl;
145 u16 desc_list_entry_size;
146 u16 descs_num_before_header;
148 u16 max_entries_in_tx_burst;
151 struct ena_com_io_cq {
152 struct ena_com_io_desc_addr cdesc_addr;
155 /* Interrupt unmask register */
156 u32 __iomem *unmask_reg;
158 /* The completion queue head doorbell register */
159 u32 __iomem *cq_head_db_reg;
161 /* numa configuration register (for TPH) */
162 u32 __iomem *numa_node_cfg_reg;
164 /* The value to write to the above register to unmask
165 * the interrupt of this queue
169 enum queue_direction direction;
171 /* holds the number of cdesc of the current packet */
172 u16 cur_rx_pkt_cdesc_count;
173 /* save the firt cdesc idx of the current packet */
174 u16 cur_rx_pkt_cdesc_start_idx;
180 /* Device queue index */
183 u16 last_head_update;
185 u8 cdesc_entry_size_in_bytes;
187 } ____cacheline_aligned;
189 struct ena_com_io_bounce_buffer_control {
193 u16 buffers_num; /* Must be a power of 2 */
196 /* This struct is to keep tracking the current location of the next llq entry */
197 struct ena_com_llq_pkt_ctrl {
200 u16 descs_left_in_line;
203 struct ena_com_io_sq {
204 struct ena_com_io_desc_addr desc_addr;
207 u32 __iomem *db_addr;
208 u8 __iomem *header_addr;
210 enum queue_direction direction;
211 enum ena_admin_placement_policy_type mem_queue_type;
214 struct ena_com_tx_meta cached_tx_meta;
215 struct ena_com_llq_info llq_info;
216 struct ena_com_llq_pkt_ctrl llq_buf_ctrl;
217 struct ena_com_io_bounce_buffer_control bounce_buf_ctrl;
225 u16 llq_last_copy_tail;
226 u32 tx_max_header_size;
230 u16 entries_in_tx_burst_left;
231 } ____cacheline_aligned;
233 struct ena_com_admin_cq {
234 struct ena_admin_acq_entry *entries;
235 ena_mem_handle_t mem_handle;
242 struct ena_com_admin_sq {
243 struct ena_admin_aq_entry *entries;
244 ena_mem_handle_t mem_handle;
247 u32 __iomem *db_addr;
255 struct ena_com_stats_admin {
263 struct ena_com_admin_queue {
266 ena_spinlock_t q_lock; /* spinlock for the admin queue */
268 struct ena_comp_ctx *comp_ctx;
269 u32 completion_timeout;
271 struct ena_com_admin_cq cq;
272 struct ena_com_admin_sq sq;
274 /* Indicate if the admin queue should poll for completion */
279 /* Indicate that the ena was initialized and can
280 * process new admin commands
284 /* Count the number of outstanding admin commands */
285 ena_atomic32_t outstanding_cmds;
287 struct ena_com_stats_admin stats;
290 struct ena_aenq_handlers;
292 struct ena_com_aenq {
295 struct ena_admin_aenq_entry *entries;
297 ena_mem_handle_t mem_handle;
299 struct ena_aenq_handlers *aenq_handlers;
302 struct ena_com_mmio_read {
303 struct ena_admin_ena_mmio_req_read_less_resp *read_resp;
304 dma_addr_t read_resp_dma_addr;
305 ena_mem_handle_t read_resp_mem_handle;
306 u32 reg_read_to; /* in us */
308 bool readless_supported;
309 /* spin lock to ensure a single outstanding read */
315 u16 *host_rss_ind_tbl;
316 struct ena_admin_rss_ind_table_entry *rss_ind_tbl;
317 dma_addr_t rss_ind_tbl_dma_addr;
318 ena_mem_handle_t rss_ind_tbl_mem_handle;
322 enum ena_admin_hash_functions hash_func;
323 struct ena_admin_feature_rss_flow_hash_control *hash_key;
324 dma_addr_t hash_key_dma_addr;
325 ena_mem_handle_t hash_key_mem_handle;
329 struct ena_admin_feature_rss_hash_control *hash_ctrl;
330 dma_addr_t hash_ctrl_dma_addr;
331 ena_mem_handle_t hash_ctrl_mem_handle;
335 struct ena_host_attribute {
337 u8 *debug_area_virt_addr;
338 dma_addr_t debug_area_dma_addr;
339 ena_mem_handle_t debug_area_dma_handle;
342 /* Host information */
343 struct ena_admin_host_info *host_info;
344 dma_addr_t host_info_dma_addr;
345 ena_mem_handle_t host_info_dma_handle;
348 struct ena_extra_properties_strings {
351 ena_mem_handle_t dma_handle;
355 /* Each ena_dev is a PCI function. */
357 struct ena_com_admin_queue admin_queue;
358 struct ena_com_aenq aenq;
359 struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];
360 struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];
362 void __iomem *mem_bar;
366 enum ena_admin_placement_policy_type tx_mem_queue_type;
367 u32 tx_max_header_size;
368 u16 stats_func; /* Selected function for extended statistic dump */
369 u16 stats_queue; /* Selected queue for extended statistic dump */
371 struct ena_com_mmio_read mmio_read;
374 u32 supported_features;
377 struct ena_host_attribute host_attr;
378 bool adaptive_coalescing;
379 u16 intr_delay_resolution;
380 u32 intr_moder_tx_interval;
381 struct ena_intr_moder_entry *intr_moder_tbl;
383 struct ena_com_llq_info llq_info;
384 struct ena_extra_properties_strings extra_properties_strings;
387 struct ena_com_dev_get_features_ctx {
388 struct ena_admin_queue_feature_desc max_queues;
389 struct ena_admin_queue_ext_feature_desc max_queue_ext;
390 struct ena_admin_device_attr_feature_desc dev_attr;
391 struct ena_admin_feature_aenq_desc aenq;
392 struct ena_admin_feature_offload_desc offload;
393 struct ena_admin_ena_hw_hints hw_hints;
394 struct ena_admin_feature_llq_desc llq;
395 struct ena_admin_feature_rss_ind_table ind_table;
398 struct ena_com_create_io_ctx {
399 enum ena_admin_placement_policy_type mem_queue_type;
400 enum queue_direction direction;
407 typedef void (*ena_aenq_handler)(void *data,
408 struct ena_admin_aenq_entry *aenq_e);
410 /* Holds aenq handlers. Indexed by AENQ event group */
411 struct ena_aenq_handlers {
412 ena_aenq_handler handlers[ENA_MAX_HANDLERS];
413 ena_aenq_handler unimplemented_handler;
416 /*****************************************************************************/
417 /*****************************************************************************/
418 #if defined(__cplusplus)
422 /* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism
423 * @ena_dev: ENA communication layer struct
425 * Initialize the register read mechanism.
427 * @note: This method must be the first stage in the initialization sequence.
429 * @return - 0 on success, negative value on failure.
431 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);
433 /* ena_com_set_mmio_read_mode - Enable/disable the mmio reg read mechanism
434 * @ena_dev: ENA communication layer struct
435 * @readless_supported: readless mode (enable/disable)
437 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,
438 bool readless_supported);
440 /* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return
441 * value physical address.
442 * @ena_dev: ENA communication layer struct
444 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);
446 /* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism
447 * @ena_dev: ENA communication layer struct
449 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);
451 /* ena_com_admin_init - Init the admin and the async queues
452 * @ena_dev: ENA communication layer struct
453 * @aenq_handlers: Those handlers to be called upon event.
455 * Initialize the admin submission and completion queues.
456 * Initialize the asynchronous events notification queues.
458 * @return - 0 on success, negative value on failure.
460 int ena_com_admin_init(struct ena_com_dev *ena_dev,
461 struct ena_aenq_handlers *aenq_handlers);
463 /* ena_com_admin_destroy - Destroy the admin and the async events queues.
464 * @ena_dev: ENA communication layer struct
466 * @note: Before calling this method, the caller must validate that the device
467 * won't send any additional admin completions/aenq.
468 * To achieve that, a FLR is recommended.
470 void ena_com_admin_destroy(struct ena_com_dev *ena_dev);
472 /* ena_com_dev_reset - Perform device FLR to the device.
473 * @ena_dev: ENA communication layer struct
474 * @reset_reason: Specify what is the trigger for the reset in case of an error.
476 * @return - 0 on success, negative value on failure.
478 int ena_com_dev_reset(struct ena_com_dev *ena_dev,
479 enum ena_regs_reset_reason_types reset_reason);
481 /* ena_com_create_io_queue - Create io queue.
482 * @ena_dev: ENA communication layer struct
483 * @ctx - create context structure
485 * Create the submission and the completion queues.
487 * @return - 0 on success, negative value on failure.
489 int ena_com_create_io_queue(struct ena_com_dev *ena_dev,
490 struct ena_com_create_io_ctx *ctx);
492 /* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.
493 * @ena_dev: ENA communication layer struct
494 * @qid - the caller virtual queue id.
496 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);
498 /* ena_com_get_io_handlers - Return the io queue handlers
499 * @ena_dev: ENA communication layer struct
500 * @qid - the caller virtual queue id.
501 * @io_sq - IO submission queue handler
502 * @io_cq - IO completion queue handler.
504 * @return - 0 on success, negative value on failure.
506 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,
507 struct ena_com_io_sq **io_sq,
508 struct ena_com_io_cq **io_cq);
510 /* ena_com_admin_aenq_enable - ENAble asynchronous event notifications
511 * @ena_dev: ENA communication layer struct
513 * After this method, aenq event can be received via AENQ.
515 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);
517 /* ena_com_set_admin_running_state - Set the state of the admin queue
518 * @ena_dev: ENA communication layer struct
520 * Change the state of the admin queue (enable/disable)
522 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);
524 /* ena_com_get_admin_running_state - Get the admin queue state
525 * @ena_dev: ENA communication layer struct
527 * Retrieve the state of the admin queue (enable/disable)
529 * @return - current polling mode (enable/disable)
531 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);
533 /* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode
534 * @ena_dev: ENA communication layer struct
535 * @polling: ENAble/Disable polling mode
537 * Set the admin completion mode.
539 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);
541 /* ena_com_set_admin_polling_mode - Get the admin completion queue polling mode
542 * @ena_dev: ENA communication layer struct
544 * Get the admin completion mode.
545 * If polling mode is on, ena_com_execute_admin_command will perform a
546 * polling on the admin completion queue for the commands completion,
547 * otherwise it will wait on wait event.
551 bool ena_com_get_ena_admin_polling_mode(struct ena_com_dev *ena_dev);
553 /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler
554 * @ena_dev: ENA communication layer struct
556 * This method go over the admin completion queue and wake up all the pending
557 * threads that wait on the commands wait event.
559 * @note: Should be called after MSI-X interrupt.
561 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);
563 /* ena_com_aenq_intr_handler - AENQ interrupt handler
564 * @ena_dev: ENA communication layer struct
566 * This method go over the async event notification queue and call the proper
569 void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data);
571 /* ena_com_abort_admin_commands - Abort all the outstanding admin commands.
572 * @ena_dev: ENA communication layer struct
574 * This method aborts all the outstanding admin commands.
575 * The caller should then call ena_com_wait_for_abort_completion to make sure
576 * all the commands were completed.
578 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);
580 /* ena_com_wait_for_abort_completion - Wait for admin commands abort.
581 * @ena_dev: ENA communication layer struct
583 * This method wait until all the outstanding admin commands will be completed.
585 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);
587 /* ena_com_validate_version - Validate the device parameters
588 * @ena_dev: ENA communication layer struct
590 * This method validate the device parameters are the same as the saved
591 * parameters in ena_dev.
592 * This method is useful after device reset, to validate the device mac address
593 * and the device offloads are the same as before the reset.
595 * @return - 0 on success negative value otherwise.
597 int ena_com_validate_version(struct ena_com_dev *ena_dev);
599 /* ena_com_get_link_params - Retrieve physical link parameters.
600 * @ena_dev: ENA communication layer struct
601 * @resp: Link parameters
603 * Retrieve the physical link parameters,
604 * like speed, auto-negotiation and full duplex support.
606 * @return - 0 on Success negative value otherwise.
608 int ena_com_get_link_params(struct ena_com_dev *ena_dev,
609 struct ena_admin_get_feat_resp *resp);
611 /* ena_com_extra_properties_strings_init - Initialize the extra properties strings buffer.
612 * @ena_dev: ENA communication layer struct
614 * Initialize the extra properties strings buffer.
616 int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev);
618 /* ena_com_delete_extra_properties_strings - Free the extra properties strings buffer.
619 * @ena_dev: ENA communication layer struct
621 * Free the allocated extra properties strings buffer.
623 void ena_com_delete_extra_properties_strings(struct ena_com_dev *ena_dev);
625 /* ena_com_get_extra_properties_flags - Retrieve extra properties flags.
626 * @ena_dev: ENA communication layer struct
627 * @resp: Extra properties flags.
629 * Retrieve the extra properties flags.
631 * @return - 0 on Success negative value otherwise.
633 int ena_com_get_extra_properties_flags(struct ena_com_dev *ena_dev,
634 struct ena_admin_get_feat_resp *resp);
636 /* ena_com_get_dma_width - Retrieve physical dma address width the device
638 * @ena_dev: ENA communication layer struct
640 * Retrieve the maximum physical address bits the device can handle.
642 * @return: > 0 on Success and negative value otherwise.
644 int ena_com_get_dma_width(struct ena_com_dev *ena_dev);
646 /* ena_com_set_aenq_config - Set aenq groups configurations
647 * @ena_dev: ENA communication layer struct
648 * @groups flag: bit fields flags of enum ena_admin_aenq_group.
650 * Configure which aenq event group the driver would like to receive.
652 * @return: 0 on Success and negative value otherwise.
654 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);
656 /* ena_com_get_dev_attr_feat - Get device features
657 * @ena_dev: ENA communication layer struct
658 * @get_feat_ctx: returned context that contain the get features.
660 * @return: 0 on Success and negative value otherwise.
662 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
663 struct ena_com_dev_get_features_ctx *get_feat_ctx);
665 /* ena_com_get_dev_basic_stats - Get device basic statistics
666 * @ena_dev: ENA communication layer struct
667 * @stats: stats return value
669 * @return: 0 on Success and negative value otherwise.
671 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
672 struct ena_admin_basic_stats *stats);
674 /* ena_com_set_dev_mtu - Configure the device mtu.
675 * @ena_dev: ENA communication layer struct
678 * @return: 0 on Success and negative value otherwise.
680 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu);
682 /* ena_com_get_offload_settings - Retrieve the device offloads capabilities
683 * @ena_dev: ENA communication layer struct
684 * @offlad: offload return value
686 * @return: 0 on Success and negative value otherwise.
688 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
689 struct ena_admin_feature_offload_desc *offload);
691 /* ena_com_rss_init - Init RSS
692 * @ena_dev: ENA communication layer struct
693 * @log_size: indirection log size
695 * Allocate RSS/RFS resources.
696 * The caller then can configure rss using ena_com_set_hash_function,
697 * ena_com_set_hash_ctrl and ena_com_indirect_table_set.
699 * @return: 0 on Success and negative value otherwise.
701 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);
703 /* ena_com_rss_destroy - Destroy rss
704 * @ena_dev: ENA communication layer struct
706 * Free all the RSS/RFS resources.
708 void ena_com_rss_destroy(struct ena_com_dev *ena_dev);
710 /* ena_com_fill_hash_function - Fill RSS hash function
711 * @ena_dev: ENA communication layer struct
712 * @func: The hash function (Toeplitz or crc)
713 * @key: Hash key (for toeplitz hash)
714 * @key_len: key length (max length 10 DW)
715 * @init_val: initial value for the hash function
717 * Fill the ena_dev resources with the desire hash function, hash key, key_len
718 * and key initial value (if needed by the hash function).
719 * To flush the key into the device the caller should call
720 * ena_com_set_hash_function.
722 * @return: 0 on Success and negative value otherwise.
724 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
725 enum ena_admin_hash_functions func,
726 const u8 *key, u16 key_len, u32 init_val);
728 /* ena_com_set_hash_function - Flush the hash function and it dependencies to
730 * @ena_dev: ENA communication layer struct
732 * Flush the hash function and it dependencies (key, key length and
733 * initial value) if needed.
735 * @note: Prior to this method the caller should call ena_com_fill_hash_function
737 * @return: 0 on Success and negative value otherwise.
739 int ena_com_set_hash_function(struct ena_com_dev *ena_dev);
741 /* ena_com_get_hash_function - Retrieve the hash function and the hash key
743 * @ena_dev: ENA communication layer struct
744 * @func: hash function
747 * Retrieve the hash function and the hash key from the device.
749 * @note: If the caller called ena_com_fill_hash_function but didn't flash
750 * it to the device, the new configuration will be lost.
752 * @return: 0 on Success and negative value otherwise.
754 int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
755 enum ena_admin_hash_functions *func,
758 /* ena_com_fill_hash_ctrl - Fill RSS hash control
759 * @ena_dev: ENA communication layer struct.
760 * @proto: The protocol to configure.
761 * @hash_fields: bit mask of ena_admin_flow_hash_fields
763 * Fill the ena_dev resources with the desire hash control (the ethernet
764 * fields that take part of the hash) for a specific protocol.
765 * To flush the hash control to the device, the caller should call
766 * ena_com_set_hash_ctrl.
768 * @return: 0 on Success and negative value otherwise.
770 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,
771 enum ena_admin_flow_hash_proto proto,
774 /* ena_com_set_hash_ctrl - Flush the hash control resources to the device.
775 * @ena_dev: ENA communication layer struct
777 * Flush the hash control (the ethernet fields that take part of the hash)
779 * @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.
781 * @return: 0 on Success and negative value otherwise.
783 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);
785 /* ena_com_get_hash_ctrl - Retrieve the hash control from the device.
786 * @ena_dev: ENA communication layer struct
787 * @proto: The protocol to retrieve.
788 * @fields: bit mask of ena_admin_flow_hash_fields.
790 * Retrieve the hash control from the device.
792 * @note, If the caller called ena_com_fill_hash_ctrl but didn't flash
793 * it to the device, the new configuration will be lost.
795 * @return: 0 on Success and negative value otherwise.
797 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
798 enum ena_admin_flow_hash_proto proto,
801 /* ena_com_set_default_hash_ctrl - Set the hash control to a default
803 * @ena_dev: ENA communication layer struct
805 * Fill the ena_dev resources with the default hash control configuration.
806 * To flush the hash control to the device, the caller should call
807 * ena_com_set_hash_ctrl.
809 * @return: 0 on Success and negative value otherwise.
811 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);
813 /* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS
815 * @ena_dev: ENA communication layer struct.
816 * @entry_idx - indirection table entry.
817 * @entry_value - redirection value
819 * Fill a single entry of the RSS indirection table in the ena_dev resources.
820 * To flush the indirection table to the device, the called should call
821 * ena_com_indirect_table_set.
823 * @return: 0 on Success and negative value otherwise.
825 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,
826 u16 entry_idx, u16 entry_value);
828 /* ena_com_indirect_table_set - Flush the indirection table to the device.
829 * @ena_dev: ENA communication layer struct
831 * Flush the indirection hash control to the device.
832 * Prior to this method the caller should call ena_com_indirect_table_fill_entry
834 * @return: 0 on Success and negative value otherwise.
836 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);
838 /* ena_com_indirect_table_get - Retrieve the indirection table from the device.
839 * @ena_dev: ENA communication layer struct
840 * @ind_tbl: indirection table
842 * Retrieve the RSS indirection table from the device.
844 * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flash
845 * it to the device, the new configuration will be lost.
847 * @return: 0 on Success and negative value otherwise.
849 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);
851 /* ena_com_allocate_host_info - Allocate host info resources.
852 * @ena_dev: ENA communication layer struct
854 * @return: 0 on Success and negative value otherwise.
856 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);
858 /* ena_com_allocate_debug_area - Allocate debug area.
859 * @ena_dev: ENA communication layer struct
860 * @debug_area_size - debug area size.
862 * @return: 0 on Success and negative value otherwise.
864 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,
865 u32 debug_area_size);
867 /* ena_com_delete_debug_area - Free the debug area resources.
868 * @ena_dev: ENA communication layer struct
870 * Free the allocate debug area.
872 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);
874 /* ena_com_delete_host_info - Free the host info resources.
875 * @ena_dev: ENA communication layer struct
877 * Free the allocate host info.
879 void ena_com_delete_host_info(struct ena_com_dev *ena_dev);
881 /* ena_com_set_host_attributes - Update the device with the host
882 * attributes (debug area and host info) base address.
883 * @ena_dev: ENA communication layer struct
885 * @return: 0 on Success and negative value otherwise.
887 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);
889 /* ena_com_create_io_cq - Create io completion queue.
890 * @ena_dev: ENA communication layer struct
891 * @io_cq - io completion queue handler
893 * Create IO completion queue.
895 * @return - 0 on success, negative value on failure.
897 int ena_com_create_io_cq(struct ena_com_dev *ena_dev,
898 struct ena_com_io_cq *io_cq);
900 /* ena_com_destroy_io_cq - Destroy io completion queue.
901 * @ena_dev: ENA communication layer struct
902 * @io_cq - io completion queue handler
904 * Destroy IO completion queue.
906 * @return - 0 on success, negative value on failure.
908 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,
909 struct ena_com_io_cq *io_cq);
911 /* ena_com_execute_admin_command - Execute admin command
912 * @admin_queue: admin queue.
913 * @cmd: the admin command to execute.
914 * @cmd_size: the command size.
915 * @cmd_completion: command completion return value.
916 * @cmd_comp_size: command completion size.
918 * Submit an admin command and then wait until the device will return a
920 * The completion will be copyed into cmd_comp.
922 * @return - 0 on success, negative value on failure.
924 int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
925 struct ena_admin_aq_entry *cmd,
927 struct ena_admin_acq_entry *cmd_comp,
928 size_t cmd_comp_size);
930 /* ena_com_init_interrupt_moderation - Init interrupt moderation
931 * @ena_dev: ENA communication layer struct
933 * @return - 0 on success, negative value on failure.
935 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);
937 /* ena_com_destroy_interrupt_moderation - Destroy interrupt moderation resources
938 * @ena_dev: ENA communication layer struct
940 void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev);
942 /* ena_com_interrupt_moderation_supported - Return if interrupt moderation
943 * capability is supported by the device.
945 * @return - supported or not.
947 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);
949 /* ena_com_config_default_interrupt_moderation_table - Restore the interrupt
950 * moderation table back to the default parameters.
951 * @ena_dev: ENA communication layer struct
953 void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev);
955 /* ena_com_update_nonadaptive_moderation_interval_tx - Update the
956 * non-adaptive interval in Tx direction.
957 * @ena_dev: ENA communication layer struct
958 * @tx_coalesce_usecs: Interval in usec.
960 * @return - 0 on success, negative value on failure.
962 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
963 u32 tx_coalesce_usecs);
965 /* ena_com_update_nonadaptive_moderation_interval_rx - Update the
966 * non-adaptive interval in Rx direction.
967 * @ena_dev: ENA communication layer struct
968 * @rx_coalesce_usecs: Interval in usec.
970 * @return - 0 on success, negative value on failure.
972 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
973 u32 rx_coalesce_usecs);
975 /* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the
976 * non-adaptive interval in Tx direction.
977 * @ena_dev: ENA communication layer struct
979 * @return - interval in usec
981 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);
983 /* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the
984 * non-adaptive interval in Rx direction.
985 * @ena_dev: ENA communication layer struct
987 * @return - interval in usec
989 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);
991 /* ena_com_init_intr_moderation_entry - Update a single entry in the interrupt
993 * @ena_dev: ENA communication layer struct
994 * @level: Interrupt moderation table level
995 * @entry: Entry value
997 * Update a single entry in the interrupt moderation table.
999 void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev,
1000 enum ena_intr_moder_level level,
1001 struct ena_intr_moder_entry *entry);
1003 /* ena_com_get_intr_moderation_entry - Init ena_intr_moder_entry.
1004 * @ena_dev: ENA communication layer struct
1005 * @level: Interrupt moderation table level
1006 * @entry: Entry to fill.
1008 * Initialize the entry according to the adaptive interrupt moderation table.
1010 void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev,
1011 enum ena_intr_moder_level level,
1012 struct ena_intr_moder_entry *entry);
1014 /* ena_com_config_dev_mode - Configure the placement policy of the device.
1015 * @ena_dev: ENA communication layer struct
1016 * @llq_features: LLQ feature descriptor, retrieve via
1017 * ena_com_get_dev_attr_feat.
1018 * @ena_llq_config: The default driver LLQ parameters configurations
1020 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,
1021 struct ena_admin_feature_llq_desc *llq_features,
1022 struct ena_llq_configurations *llq_default_config);
1024 static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)
1026 return ena_dev->adaptive_coalescing;
1029 static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)
1031 ena_dev->adaptive_coalescing = true;
1034 static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)
1036 ena_dev->adaptive_coalescing = false;
1039 /* ena_com_calculate_interrupt_delay - Calculate new interrupt delay
1040 * @ena_dev: ENA communication layer struct
1041 * @pkts: Number of packets since the last update
1042 * @bytes: Number of bytes received since the last update.
1043 * @smoothed_interval: Returned interval
1044 * @moder_tbl_idx: Current table level as input update new level as return
1047 static inline void ena_com_calculate_interrupt_delay(struct ena_com_dev *ena_dev,
1050 unsigned int *smoothed_interval,
1051 unsigned int *moder_tbl_idx)
1053 enum ena_intr_moder_level curr_moder_idx, new_moder_idx;
1054 struct ena_intr_moder_entry *curr_moder_entry;
1055 struct ena_intr_moder_entry *pred_moder_entry;
1056 struct ena_intr_moder_entry *new_moder_entry;
1057 struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
1058 unsigned int interval;
1060 /* We apply adaptive moderation on Rx path only.
1061 * Tx uses static interrupt moderation.
1063 if (!pkts || !bytes)
1064 /* Tx interrupt, or spurious interrupt,
1065 * in both cases we just use same delay values
1069 curr_moder_idx = (enum ena_intr_moder_level)(*moder_tbl_idx);
1070 if (unlikely(curr_moder_idx >= ENA_INTR_MAX_NUM_OF_LEVELS)) {
1071 ena_trc_err("Wrong moderation index %u\n", curr_moder_idx);
1075 curr_moder_entry = &intr_moder_tbl[curr_moder_idx];
1076 new_moder_idx = curr_moder_idx;
1078 if (curr_moder_idx == ENA_INTR_MODER_LOWEST) {
1079 if ((pkts > curr_moder_entry->pkts_per_interval) ||
1080 (bytes > curr_moder_entry->bytes_per_interval))
1082 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1084 pred_moder_entry = &intr_moder_tbl[curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE];
1086 if ((pkts <= pred_moder_entry->pkts_per_interval) ||
1087 (bytes <= pred_moder_entry->bytes_per_interval))
1089 (enum ena_intr_moder_level)(curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE);
1090 else if ((pkts > curr_moder_entry->pkts_per_interval) ||
1091 (bytes > curr_moder_entry->bytes_per_interval)) {
1092 if (curr_moder_idx != ENA_INTR_MODER_HIGHEST)
1094 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1097 new_moder_entry = &intr_moder_tbl[new_moder_idx];
1099 interval = new_moder_entry->intr_moder_interval;
1100 *smoothed_interval = (
1101 (interval * ENA_INTR_DELAY_NEW_VALUE_WEIGHT +
1102 ENA_INTR_DELAY_OLD_VALUE_WEIGHT * (*smoothed_interval)) + 5) /
1105 *moder_tbl_idx = new_moder_idx;
1108 /* ena_com_update_intr_reg - Prepare interrupt register
1109 * @intr_reg: interrupt register to update.
1110 * @rx_delay_interval: Rx interval in usecs
1111 * @tx_delay_interval: Tx interval in usecs
1112 * @unmask: unask enable/disable
1114 * Prepare interrupt update register with the supplied parameters.
1116 static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
1117 u32 rx_delay_interval,
1118 u32 tx_delay_interval,
1121 intr_reg->intr_control = 0;
1122 intr_reg->intr_control |= rx_delay_interval &
1123 ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
1125 intr_reg->intr_control |=
1126 (tx_delay_interval << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)
1127 & ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;
1130 intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
1133 static inline u8 *ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control *bounce_buf_ctrl)
1135 u16 size, buffers_num;
1138 size = bounce_buf_ctrl->buffer_size;
1139 buffers_num = bounce_buf_ctrl->buffers_num;
1141 buf = bounce_buf_ctrl->base_buffer +
1142 (bounce_buf_ctrl->next_to_use++ & (buffers_num - 1)) * size;
1144 prefetchw(bounce_buf_ctrl->base_buffer +
1145 (bounce_buf_ctrl->next_to_use & (buffers_num - 1)) * size);
1150 #ifdef ENA_EXTENDED_STATS
1151 int ena_com_get_dev_extended_stats(struct ena_com_dev *ena_dev, char *buff,
1154 int ena_com_extended_stats_set_func_queue(struct ena_com_dev *ena_dev,
1157 #if defined(__cplusplus)
1159 #endif /* __cplusplus */
1160 #endif /* !(ENA_COM) */