4 * Copyright (c) 2015-2017 Amazon.com, Inc. or its affiliates.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 #include <sys/cdefs.h>
38 __FBSDID("$FreeBSD$");
40 #include <sys/param.h>
41 #include <sys/systm.h>
44 #include <sys/condvar.h>
45 #include <sys/endian.h>
46 #include <sys/kernel.h>
47 #include <sys/kthread.h>
48 #include <sys/malloc.h>
50 #include <sys/module.h>
54 #include <sys/socket.h>
55 #include <sys/sockio.h>
56 #include <sys/sysctl.h>
57 #include <sys/taskqueue.h>
58 #include <sys/eventhandler.h>
59 #include <sys/types.h>
60 #include <sys/timetc.h>
61 #include <sys/cdefs.h>
63 #include <machine/atomic.h>
64 #include <machine/bus.h>
65 #include <machine/in_cksum.h>
66 #include <machine/pcpu.h>
67 #include <machine/resource.h>
70 #include <net/ethernet.h>
72 #include <net/if_var.h>
73 #include <net/if_arp.h>
74 #include <net/if_dl.h>
75 #include <net/if_media.h>
77 #include <net/if_types.h>
78 #include <net/if_vlan_var.h>
80 #include <netinet/in_systm.h>
81 #include <netinet/in.h>
82 #include <netinet/if_ether.h>
83 #include <netinet/ip.h>
84 #include <netinet/ip6.h>
85 #include <netinet/tcp.h>
86 #include <netinet/tcp_lro.h>
87 #include <netinet/udp.h>
89 #include <dev/led/led.h>
90 #include <dev/pci/pcivar.h>
91 #include <dev/pci/pcireg.h>
93 extern struct ena_bus_space ebs;
96 #define ENA_ALERT (1 << 0) /* Alerts are providing more error info. */
97 #define ENA_WARNING (1 << 1) /* Driver output is more error sensitive. */
98 #define ENA_INFO (1 << 2) /* Provides additional driver info. */
99 #define ENA_DBG (1 << 3) /* Driver output for debugging. */
100 /* Detailed info that will be printed with ENA_INFO or ENA_DEBUG flag. */
101 #define ENA_TXPTH (1 << 4) /* Allows TX path tracing. */
102 #define ENA_RXPTH (1 << 5) /* Allows RX path tracing. */
103 #define ENA_RSC (1 << 6) /* Goes with TXPTH or RXPTH, free/alloc res. */
104 #define ENA_IOQ (1 << 7) /* Detailed info about IO queues. */
105 #define ENA_ADMQ (1 << 8) /* Detailed info about admin queue. */
107 #ifndef ENA_DEBUG_LEVEL
108 #define ENA_DEBUG_LEVEL (ENA_ALERT | ENA_WARNING)
112 #define ena_trace_raw(level, fmt, args...) \
114 if (((level) & ENA_DEBUG_LEVEL) != (level)) \
116 printf(fmt, ##args); \
119 #define ena_trace(level, fmt, args...) \
120 ena_trace_raw(level, "%s() [TID:%d]: " \
121 fmt " \n", __func__, curthread->td_tid, ##args)
123 #else /* ENA_TRACE */
124 #define ena_trace_raw(...)
125 #define ena_trace(...)
126 #endif /* ENA_TRACE */
128 #define ena_trc_dbg(format, arg...) ena_trace(ENA_DBG, format, ##arg)
129 #define ena_trc_info(format, arg...) ena_trace(ENA_INFO, format, ##arg)
130 #define ena_trc_warn(format, arg...) ena_trace(ENA_WARNING, format, ##arg)
131 #define ena_trc_err(format, arg...) ena_trace(ENA_ALERT, format, ##arg)
133 #define unlikely(x) __predict_false(x)
134 #define likely(x) __predict_true(x)
137 #define ____cacheline_aligned __aligned(CACHE_LINE_SIZE)
139 #define MAX_ERRNO 4095
140 #define IS_ERR_VALUE(x) unlikely((x) <= (unsigned long)MAX_ERRNO)
142 #define ENA_ASSERT(cond, format, arg...) \
144 if (unlikely(!(cond))) { \
146 "Assert failed on %s:%s:%d:" format, \
147 __FILE__, __func__, __LINE__, ##arg); \
151 #define ENA_WARN(cond, format, arg...) \
153 if (unlikely((cond))) { \
154 ena_trc_warn(format, ##arg); \
158 static inline long IS_ERR(const void *ptr)
160 return IS_ERR_VALUE((unsigned long)ptr);
163 static inline void *ERR_PTR(long error)
165 return (void *)error;
168 static inline long PTR_ERR(const void *ptr)
173 #define GENMASK(h, l) (((1U << ((h) - (l) + 1)) - 1) << (l))
174 #define GENMASK_ULL(h, l) (((~0ULL) << (l)) & (~0ULL >> (64 - 1 - (h))))
175 #define BIT(x) (1 << (x))
177 #define ENA_ABORT() BUG()
178 #define BUG() panic("ENA BUG")
184 #define ENA_COM_FAULT EFAULT
185 #define ENA_COM_INVAL EINVAL
186 #define ENA_COM_NO_MEM ENOMEM
187 #define ENA_COM_NO_SPACE ENOSPC
188 #define ENA_COM_TRY_AGAIN -1
189 #define ENA_COM_NO_DEVICE ENODEV
190 #define ENA_COM_PERMISSION EPERM
191 #define ENA_COM_TIMER_EXPIRED ETIMEDOUT
193 #define ENA_MSLEEP(x) pause_sbt("ena", SBT_1MS * (x), SBT_1MS, 0)
194 #define ENA_UDELAY(x) DELAY(x)
195 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us) \
196 ((long)cputick2usec(cpu_ticks()) + (timeout_us))
197 #define ENA_TIME_EXPIRE(timeout) ((timeout) < (long)cputick2usec(cpu_ticks()))
198 #define ENA_MIGHT_SLEEP()
200 #define min_t(type, _x, _y) ((type)(_x) < (type)(_y) ? (type)(_x) : (type)(_y))
201 #define max_t(type, _x, _y) ((type)(_x) > (type)(_y) ? (type)(_x) : (type)(_y))
203 #define ENA_MIN32(x,y) MIN(x, y)
204 #define ENA_MIN16(x,y) MIN(x, y)
205 #define ENA_MIN8(x,y) MIN(x, y)
207 #define ENA_MAX32(x,y) MAX(x, y)
208 #define ENA_MAX16(x,y) MAX(x, y)
209 #define ENA_MAX8(x,y) MAX(x, y)
211 /* Spinlock related methods */
212 #define ena_spinlock_t struct mtx
213 #define ENA_SPINLOCK_INIT(spinlock) \
214 mtx_init(&(spinlock), "ena_spin", NULL, MTX_SPIN)
215 #define ENA_SPINLOCK_DESTROY(spinlock) \
217 if (mtx_initialized(&(spinlock))) \
218 mtx_destroy(&(spinlock)); \
220 #define ENA_SPINLOCK_LOCK(spinlock, flags) \
223 mtx_lock_spin(&(spinlock)); \
225 #define ENA_SPINLOCK_UNLOCK(spinlock, flags) \
228 mtx_unlock_spin(&(spinlock)); \
232 /* Wait queue related methods */
233 #define ena_wait_event_t struct { struct cv wq; struct mtx mtx; }
234 #define ENA_WAIT_EVENT_INIT(waitqueue) \
236 cv_init(&((waitqueue).wq), "cv"); \
237 mtx_init(&((waitqueue).mtx), "wq", NULL, MTX_DEF); \
239 #define ENA_WAIT_EVENT_DESTROY(waitqueue) \
241 cv_destroy(&((waitqueue).wq)); \
242 mtx_destroy(&((waitqueue).mtx)); \
244 #define ENA_WAIT_EVENT_CLEAR(waitqueue) \
245 cv_init(&((waitqueue).wq), (waitqueue).wq.cv_description)
246 #define ENA_WAIT_EVENT_WAIT(waitqueue, timeout_us) \
248 mtx_lock(&((waitqueue).mtx)); \
249 cv_timedwait(&((waitqueue).wq), &((waitqueue).mtx), \
250 timeout_us * hz / 1000 / 1000 ); \
251 mtx_unlock(&((waitqueue).mtx)); \
253 #define ENA_WAIT_EVENT_SIGNAL(waitqueue) cv_broadcast(&((waitqueue).wq))
255 #define dma_addr_t bus_addr_t
266 bus_dma_segment_t seg;
271 bus_space_handle_t reg_bar_h;
272 bus_space_tag_t reg_bar_t;
273 bus_space_handle_t mem_bar_h;
274 bus_space_tag_t mem_bar_t;
277 typedef uint32_t ena_atomic32_t;
279 void ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg,
281 int ena_dma_alloc(device_t dmadev, bus_size_t size, ena_mem_handle_t *dma,
284 #define ENA_MEM_ALLOC(dmadev, size) malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO)
285 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) (virt = NULL)
286 #define ENA_MEM_FREE(dmadev, ptr) free(ptr, M_DEVBUF)
287 #define ENA_MEM_ALLOC_COHERENT_NODE(dmadev, size, virt, phys, handle, node, \
294 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, dma) \
296 ena_dma_alloc((dmadev), (size), &(dma), 0); \
297 (virt) = (void *)(dma).vaddr; \
298 (phys) = (dma).paddr; \
301 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, dma) \
304 bus_dmamap_unload((dma).tag, (dma).map); \
305 bus_dmamem_free((dma).tag, (virt), (dma).map); \
306 bus_dma_tag_destroy((dma).tag); \
311 /* Register R/W methods */
312 #define ENA_REG_WRITE32(bus, value, offset) \
314 ((struct ena_bus*)bus)->reg_bar_t, \
315 ((struct ena_bus*)bus)->reg_bar_h, \
316 (bus_size_t)(offset), (value))
318 #define ENA_REG_READ32(bus, offset) \
320 ((struct ena_bus*)bus)->reg_bar_t, \
321 ((struct ena_bus*)bus)->reg_bar_h, \
322 (bus_size_t)(offset))
324 #define time_after(a,b) ((long)((unsigned long)(b) - (unsigned long)(a)) < 0)
326 #define VLAN_HLEN sizeof(struct ether_vlan_header)
327 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP)
329 #if defined(__i386__) || defined(__amd64__)
331 void prefetch(void *x)
333 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
339 /* DMA buffers access */
340 #define dma_unmap_addr(p, name) ((p)->dma->name)
341 #define dma_unmap_addr_set(p, name, v) (((p)->dma->name) = (v))
342 #define dma_unmap_len(p, name) ((p)->name)
343 #define dma_unmap_len_set(p, name, v) (((p)->name) = (v))
345 #define memcpy_toio memcpy
347 #define ATOMIC32_INC(I32_PTR) atomic_add_int(I32_PTR, 1)
348 #define ATOMIC32_DEC(I32_PTR) atomic_add_int(I32_PTR, -1)
349 #define ATOMIC32_READ(I32_PTR) atomic_load_acq_int(I32_PTR)
350 #define ATOMIC32_SET(I32_PTR, VAL) atomic_store_rel_int(I32_PTR, VAL)
352 #define barrier() __asm__ __volatile__("": : :"memory")
353 #define ACCESS_ONCE(x) (*(volatile __typeof(x) *)&(x))
354 #define READ_ONCE(x) ({ \
357 __var = ACCESS_ONCE(x); \
362 #include "ena_common_defs.h"
363 #include "ena_admin_defs.h"
364 #include "ena_eth_io_defs.h"
365 #include "ena_regs_defs.h"
367 #endif /* ENA_PLAT_H_ */