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34 /******************************************************************************
37 @Description FM dtsec MII register access MAC ...
38 *//***************************************************************************/
40 #include "error_ext.h"
44 #include "fsl_fman_dtsec_mii_acc.h"
47 /*****************************************************************************/
48 t_Error DTSEC_MII_WritePhyReg(t_Handle h_Dtsec,
53 t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
54 struct dtsec_mii_reg *miiregs;
58 SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
59 SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MiiMemMap, E_INVALID_HANDLE);
61 dtsec_freq = (uint16_t)(p_Dtsec->fmMacControllerDriver.clkFreq >> 1);
62 miiregs = p_Dtsec->p_MiiMemMap;
64 err = (t_Error)fman_dtsec_mii_write_reg(miiregs, phyAddr, reg, data, dtsec_freq);
69 /*****************************************************************************/
70 t_Error DTSEC_MII_ReadPhyReg(t_Handle h_Dtsec,
75 t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
76 struct dtsec_mii_reg *miiregs;
80 SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
81 SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MiiMemMap, E_INVALID_HANDLE);
83 dtsec_freq = (uint16_t)(p_Dtsec->fmMacControllerDriver.clkFreq >> 1);
84 miiregs = p_Dtsec->p_MiiMemMap;
86 err = fman_dtsec_mii_read_reg(miiregs, phyAddr, reg, p_Data, dtsec_freq);
88 if (*p_Data == 0xffff)
89 RETURN_ERROR(MINOR, E_NO_DEVICE,
90 ("Read wrong data (0xffff): phyAddr 0x%x, reg 0x%x",
93 RETURN_ERROR(MINOR, (t_Error)err, NO_MSG);