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49 * Functions for SRIO initialization, configuration,
52 * <hr>$Revision: 41586 $<hr>
54 #ifdef CVMX_BUILD_FOR_LINUX_KERNEL
55 #include <asm/octeon/cvmx.h>
56 #include <asm/octeon/cvmx-config.h>
57 #include <asm/octeon/cvmx-clock.h>
58 #include <asm/octeon/cvmx-helper.h>
59 #include <asm/octeon/cvmx-qlm.h>
60 #include <asm/octeon/cvmx-srio.h>
61 #include <asm/octeon/cvmx-pip-defs.h>
62 #include <asm/octeon/cvmx-sriox-defs.h>
63 #include <asm/octeon/cvmx-sriomaintx-defs.h>
64 #include <asm/octeon/cvmx-dpi-defs.h>
66 #if !defined(__FreeBSD__) || !defined(_KERNEL)
67 #include "executive-config.h"
68 #include "cvmx-config.h"
69 #ifdef CVMX_ENABLE_PKO_FUNCTIONS
72 #include "cvmx-helper.h"
73 #include "cvmx-srio.h"
78 #include "cvmx-helper.h"
80 #include "cvmx-srio.h"
84 #ifdef CVMX_ENABLE_PKO_FUNCTIONS
88 * Probe a SRIO interface and determine the number of ports
89 * connected to it. The SRIO interface should still be down
92 * @param interface Interface to probe
94 * @return Number of ports on the interface. Zero to disable.
96 int __cvmx_helper_srio_probe(int interface)
98 cvmx_sriox_status_reg_t srio0_status_reg;
99 cvmx_sriox_status_reg_t srio1_status_reg;
101 if (!octeon_has_feature(OCTEON_FEATURE_SRIO))
104 /* Read MIO_QLMX_CFG CSRs to find SRIO status. */
105 if (OCTEON_IS_MODEL(OCTEON_CN66XX))
107 int status = cvmx_qlm_get_status(0);
108 int srio_port = interface - 4;
111 case 0: /* 1x4 lane */
115 case 2: /* 2x2 lane */
119 case 1: /* 4x1 long/short */
120 case 3: /* 4x1 long/short */
128 srio0_status_reg.u64 = cvmx_read_csr(CVMX_SRIOX_STATUS_REG(0));
129 srio1_status_reg.u64 = cvmx_read_csr(CVMX_SRIOX_STATUS_REG(1));
130 if (srio0_status_reg.s.srio || srio1_status_reg.s.srio)
139 * Bringup and enable SRIO interface. After this call packet
140 * I/O should be fully functional. This is called with IPD
141 * enabled but PKO disabled.
143 * @param interface Interface to bring up
145 * @return Zero on success, negative on failure
147 int __cvmx_helper_srio_enable(int interface)
149 int num_ports = cvmx_helper_ports_on_interface(interface);
151 cvmx_sriomaintx_core_enables_t sriomaintx_core_enables;
152 cvmx_sriox_imsg_ctrl_t sriox_imsg_ctrl;
153 cvmx_sriox_status_reg_t srio_status_reg;
154 cvmx_dpi_ctl_t dpi_ctl;
155 int srio_port = interface - 4;
157 /* All SRIO ports have a cvmx_srio_rx_message_header_t header
158 on them that must be skipped by IPD */
159 for (index=0; index<num_ports; index++)
161 cvmx_pip_prt_cfgx_t port_config;
162 cvmx_sriox_omsg_portx_t sriox_omsg_portx;
163 cvmx_sriox_omsg_sp_mrx_t sriox_omsg_sp_mrx;
164 cvmx_sriox_omsg_fmp_mrx_t sriox_omsg_fmp_mrx;
165 cvmx_sriox_omsg_nmp_mrx_t sriox_omsg_nmp_mrx;
166 int ipd_port = cvmx_helper_get_ipd_port(interface, index);
167 port_config.u64 = cvmx_read_csr(CVMX_PIP_PRT_CFGX(ipd_port));
168 /* Only change the skip if the user hasn't already set it */
169 if (!port_config.s.skip)
171 port_config.s.skip = sizeof(cvmx_srio_rx_message_header_t);
172 cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), port_config.u64);
175 /* Enable TX with PKO */
176 sriox_omsg_portx.u64 = cvmx_read_csr(CVMX_SRIOX_OMSG_PORTX(index, srio_port));
177 sriox_omsg_portx.s.port = (srio_port) * 2 + index;
178 sriox_omsg_portx.s.enable = 1;
179 cvmx_write_csr(CVMX_SRIOX_OMSG_PORTX(index, srio_port), sriox_omsg_portx.u64);
181 /* Allow OMSG controller to send regardless of the state of any other
182 controller. Allow messages to different IDs and MBOXes to go in
184 sriox_omsg_sp_mrx.u64 = 0;
185 sriox_omsg_sp_mrx.s.xmbox_sp = 1;
186 sriox_omsg_sp_mrx.s.ctlr_sp = 1;
187 sriox_omsg_sp_mrx.s.ctlr_fmp = 1;
188 sriox_omsg_sp_mrx.s.ctlr_nmp = 1;
189 sriox_omsg_sp_mrx.s.id_sp = 1;
190 sriox_omsg_sp_mrx.s.id_fmp = 1;
191 sriox_omsg_sp_mrx.s.id_nmp = 1;
192 sriox_omsg_sp_mrx.s.mbox_sp = 1;
193 sriox_omsg_sp_mrx.s.mbox_fmp = 1;
194 sriox_omsg_sp_mrx.s.mbox_nmp = 1;
195 sriox_omsg_sp_mrx.s.all_psd = 1;
196 cvmx_write_csr(CVMX_SRIOX_OMSG_SP_MRX(index, srio_port), sriox_omsg_sp_mrx.u64);
198 /* Allow OMSG controller to send regardless of the state of any other
199 controller. Allow messages to different IDs and MBOXes to go in
201 sriox_omsg_fmp_mrx.u64 = 0;
202 sriox_omsg_fmp_mrx.s.ctlr_sp = 1;
203 sriox_omsg_fmp_mrx.s.ctlr_fmp = 1;
204 sriox_omsg_fmp_mrx.s.ctlr_nmp = 1;
205 sriox_omsg_fmp_mrx.s.id_sp = 1;
206 sriox_omsg_fmp_mrx.s.id_fmp = 1;
207 sriox_omsg_fmp_mrx.s.id_nmp = 1;
208 sriox_omsg_fmp_mrx.s.mbox_sp = 1;
209 sriox_omsg_fmp_mrx.s.mbox_fmp = 1;
210 sriox_omsg_fmp_mrx.s.mbox_nmp = 1;
211 sriox_omsg_fmp_mrx.s.all_psd = 1;
212 cvmx_write_csr(CVMX_SRIOX_OMSG_FMP_MRX(index, srio_port), sriox_omsg_fmp_mrx.u64);
214 /* Once the first part of a message is accepted, always acept the rest
216 sriox_omsg_nmp_mrx.u64 = 0;
217 sriox_omsg_nmp_mrx.s.all_sp = 1;
218 sriox_omsg_nmp_mrx.s.all_fmp = 1;
219 sriox_omsg_nmp_mrx.s.all_nmp = 1;
220 cvmx_write_csr(CVMX_SRIOX_OMSG_NMP_MRX(index, srio_port), sriox_omsg_nmp_mrx.u64);
224 /* Choose the receive controller based on the mailbox */
225 sriox_imsg_ctrl.u64 = cvmx_read_csr(CVMX_SRIOX_IMSG_CTRL(srio_port));
226 sriox_imsg_ctrl.s.prt_sel = 0;
227 sriox_imsg_ctrl.s.mbox = 0xa;
228 cvmx_write_csr(CVMX_SRIOX_IMSG_CTRL(srio_port), sriox_imsg_ctrl.u64);
230 /* DPI must be enabled for us to RX messages */
231 dpi_ctl.u64 = cvmx_read_csr(CVMX_DPI_CTL);
234 cvmx_write_csr(CVMX_DPI_CTL, dpi_ctl.u64);
236 /* Make sure register access is allowed */
237 srio_status_reg.u64 = cvmx_read_csr(CVMX_SRIOX_STATUS_REG(srio_port));
238 if (!srio_status_reg.s.access)
242 if (!cvmx_srio_config_read32(srio_port, 0, -1, 0, 0,
243 CVMX_SRIOMAINTX_CORE_ENABLES(srio_port), &sriomaintx_core_enables.u32))
245 sriomaintx_core_enables.s.imsg0 = 1;
246 sriomaintx_core_enables.s.imsg1 = 1;
247 cvmx_srio_config_write32(srio_port, 0, -1, 0, 0,
248 CVMX_SRIOMAINTX_CORE_ENABLES(srio_port), sriomaintx_core_enables.u32);
256 * Return the link state of an IPD/PKO port as returned by SRIO link status.
258 * @param ipd_port IPD/PKO port to query
262 cvmx_helper_link_info_t __cvmx_helper_srio_link_get(int ipd_port)
264 int interface = cvmx_helper_get_interface_num(ipd_port);
265 int srio_port = interface - 4;
266 cvmx_helper_link_info_t result;
267 cvmx_sriox_status_reg_t srio_status_reg;
268 cvmx_sriomaintx_port_0_err_stat_t sriomaintx_port_0_err_stat;
269 cvmx_sriomaintx_port_0_ctl_t sriomaintx_port_0_ctl;
270 cvmx_sriomaintx_port_0_ctl2_t sriomaintx_port_0_ctl2;
274 /* Make sure register access is allowed */
275 srio_status_reg.u64 = cvmx_read_csr(CVMX_SRIOX_STATUS_REG(srio_port));
276 if (!srio_status_reg.s.access)
279 /* Read the port link status */
280 if (cvmx_srio_config_read32(srio_port, 0, -1, 0, 0,
281 CVMX_SRIOMAINTX_PORT_0_ERR_STAT(srio_port),
282 &sriomaintx_port_0_err_stat.u32))
285 /* Return if link is down */
286 if (!sriomaintx_port_0_err_stat.s.pt_ok)
289 /* Read the port link width and speed */
290 if (cvmx_srio_config_read32(srio_port, 0, -1, 0, 0,
291 CVMX_SRIOMAINTX_PORT_0_CTL(srio_port),
292 &sriomaintx_port_0_ctl.u32))
294 if (cvmx_srio_config_read32(srio_port, 0, -1, 0, 0,
295 CVMX_SRIOMAINTX_PORT_0_CTL2(srio_port),
296 &sriomaintx_port_0_ctl2.u32))
300 result.s.full_duplex = 1;
301 result.s.link_up = 1;
302 switch (sriomaintx_port_0_ctl2.s.sel_baud)
305 result.s.speed = 1250;
308 result.s.speed = 2500;
311 result.s.speed = 3125;
314 result.s.speed = 5000;
317 result.s.speed = 6250;
323 switch (sriomaintx_port_0_ctl.s.it_width)
325 case 2: /* Four lanes */
326 result.s.speed += 40000;
328 case 3: /* Two lanes */
329 result.s.speed += 20000;
331 default: /* One lane */
332 result.s.speed += 10000;
340 * Configure an IPD/PKO port for the specified link state. This
341 * function does not influence auto negotiation at the PHY level.
342 * The passed link state must always match the link state returned
343 * by cvmx_helper_link_get(). It is normally best to use
344 * cvmx_helper_link_autoconf() instead.
346 * @param ipd_port IPD/PKO port to configure
347 * @param link_info The new link state
349 * @return Zero on success, negative on failure
351 int __cvmx_helper_srio_link_set(int ipd_port, cvmx_helper_link_info_t link_info)
356 #endif /* CVMX_ENABLE_PKO_FUNCTIONS */