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43 * Interface to power-throttle control, measurement, and debugging
46 * <hr>$Revision: 70030 $<hr>
52 #include "cvmx-coremask.h"
53 #include "cvmx-power-throttle.h"
56 #define CVMX_PTH_GET_MASK(len, pos) \
57 ((((uint64_t)1 << (len)) - 1) << (pos))
59 #define CVMX_PTH_AVAILABLE \
60 (cvmx_power_throttle_get_register(0) != (uint64_t)-1)
63 * a field of the POWTHROTTLE register
65 static struct cvmx_power_throttle_rfield_t {
66 char name[16]; /* the field's name */
67 int32_t pos; /* position of the field's LSb */
68 int32_t len; /* the field's length */
69 int present; /* 1 for present */
70 } cvmx_power_throttle_rfield[] = {
74 {"Reserved", 28, 12, 0},
80 {"HRMPOWADJ",32, 8, 0},
84 static uint64_t cvmx_power_throttle_csr_addr(int ppid);
86 static int cvmx_power_throttle_initialized;
90 * Initialize cvmx_power_throttle_rfield[] based on model.
92 static void cvmx_power_throttle_init(void)
95 * Turn on the fields for a model
97 if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
100 struct cvmx_power_throttle_rfield_t *p;
102 for (i = 0; i < CVMX_PTH_INDEX_MAX; i++)
103 cvmx_power_throttle_rfield[i].present = 1;
105 if (OCTEON_IS_MODEL(OCTEON_CN63XX))
108 * These fields do not come with o63
110 p = &cvmx_power_throttle_rfield[CVMX_PTH_INDEX_HRMPOWADJ];
112 p = &cvmx_power_throttle_rfield[CVMX_PTH_INDEX_OVRRD];
118 * The reserved field shrinks in models newer than o63
120 p = &cvmx_power_throttle_rfield[CVMX_PTH_INDEX_RESERVED];
127 uint64_t cvmx_power_throttle_get_field(uint64_t r,
128 cvmx_power_throttle_field_index_t i)
131 struct cvmx_power_throttle_rfield_t *p;
133 assert(i < CVMX_PTH_INDEX_MAX);
134 p = &cvmx_power_throttle_rfield[i];
136 return (uint64_t) -1;
137 m = CVMX_PTH_GET_MASK(p->len, p->pos);
139 return((r & m) >> p->pos);
144 * Set the i'th field of power-throttle register r to v.
146 static int cvmx_power_throttle_set_field(int i, uint64_t r, uint64_t v)
148 if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
151 struct cvmx_power_throttle_rfield_t *p;
153 assert(i < CVMX_PTH_INDEX_MAX);
155 p = &cvmx_power_throttle_rfield[i];
156 m = CVMX_PTH_GET_MASK(p->len, p->pos);
158 return((~m & r) | ((v << p->pos) & m));
165 * Set the POWLIM field as percentage% of the MAXPOW field in r.
167 static uint64_t cvmx_power_throttle_set_powlim(int ppid,
170 if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
172 uint64_t t, csr_addr, r;
174 assert(percentage < 101);
175 csr_addr = cvmx_power_throttle_csr_addr(ppid);
176 r = cvmx_read_csr(csr_addr);
178 t = cvmx_power_throttle_get_field(r, CVMX_PTH_INDEX_MAXPOW);
179 if (!OCTEON_IS_MODEL(OCTEON_CN63XX))
183 s = cvmx_power_throttle_get_field(r, CVMX_PTH_INDEX_HRMPOWADJ);
188 t = percentage * t / 100;
189 r = cvmx_power_throttle_set_field(CVMX_PTH_INDEX_POWLIM, r, t);
191 cvmx_write_csr(csr_addr, r);
199 * Given ppid, calculate its PowThrottle register's L2C_COP0_MAP CSR
200 * address. (ppid == PTH_PPID_BCAST is for broadcasting)
202 static uint64_t cvmx_power_throttle_csr_addr(int ppid)
204 if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
206 uint64_t csr_addr, reg_num, reg_reg, reg_sel;
208 assert(ppid < CVMX_MAX_CORES);
211 * register 11 selection 6
215 reg_num = (ppid << 8) + (reg_reg << 3) + reg_sel;
216 csr_addr = CVMX_L2C_COP0_MAPX(0) + ((reg_num) << 3);
223 int cvmx_power_throttle_self(uint8_t percentage)
225 if (!CVMX_PTH_AVAILABLE)
228 if (cvmx_power_throttle_set_powlim(cvmx_get_core_num(),
235 int cvmx_power_throttle(uint8_t percentage, uint64_t coremask)
240 if (!CVMX_PTH_AVAILABLE)
244 for (ppid = 0; ppid < CVMX_MAX_CORES; ppid++)
246 if ((((uint64_t) 1) << ppid) & coremask)
248 if (cvmx_power_throttle_set_powlim(ppid, percentage) == 0)
256 int cvmx_power_throttle_bmp(uint8_t percentage, struct cvmx_coremask *pcm)
261 if (!CVMX_PTH_AVAILABLE)
265 CVMX_COREMASK_FOR_EACH_CORE_BEGIN(pcm, ppid)
267 if (cvmx_power_throttle_set_powlim(ppid, percentage) == 0)
269 } CVMX_COREMASK_FOR_EACH_CORE_END;
274 uint64_t cvmx_power_throttle_get_register(int ppid)
278 if (!cvmx_power_throttle_initialized)
280 cvmx_power_throttle_init();
281 cvmx_power_throttle_initialized = 1;
284 csr_addr = cvmx_power_throttle_csr_addr(ppid);
289 return cvmx_read_csr(csr_addr);