2 * Copyright (c) 2005-2008 Pawel Jakub Dawidek <pjd@FreeBSD.org>
3 * Copyright (c) 2010 Konstantin Belousov <kib@FreeBSD.org>
4 * Copyright (c) 2014 The FreeBSD Foundation
5 * Copyright (c) 2017 Conrad Meyer <cem@FreeBSD.org>
8 * Portions of this software were developed by John-Mark Gurney
9 * under sponsorship of the FreeBSD Foundation and
10 * Rubicon Communications, LLC (Netgate).
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
39 #include <sys/kernel.h>
41 #include <sys/libkern.h>
43 #include <sys/malloc.h>
45 #include <sys/module.h>
46 #include <sys/mutex.h>
48 #include <sys/systm.h>
51 #include <crypto/aesni/aesni.h>
52 #include <crypto/aesni/sha_sse.h>
53 #include <crypto/sha1.h>
54 #include <crypto/sha2/sha224.h>
55 #include <crypto/sha2/sha256.h>
57 #include <opencrypto/cryptodev.h>
58 #include <opencrypto/gmac.h>
59 #include <cryptodev_if.h>
61 #include <machine/md_var.h>
62 #include <machine/specialreg.h>
64 #include <machine/npx.h>
65 #elif defined(__amd64__)
66 #include <machine/fpu.h>
69 static struct mtx_padalign *ctx_mtx;
70 static struct fpu_kern_ctx **ctx_fpu;
78 #define ACQUIRE_CTX(i, ctx) \
80 (i) = PCPU_GET(cpuid); \
81 mtx_lock(&ctx_mtx[(i)]); \
82 (ctx) = ctx_fpu[(i)]; \
84 #define RELEASE_CTX(i, ctx) \
86 mtx_unlock(&ctx_mtx[(i)]); \
91 static int aesni_cipher_setup(struct aesni_session *ses,
92 const struct crypto_session_params *csp);
93 static int aesni_cipher_process(struct aesni_session *ses, struct cryptop *crp);
94 static int aesni_cipher_crypt(struct aesni_session *ses, struct cryptop *crp,
95 const struct crypto_session_params *csp);
96 static int aesni_cipher_mac(struct aesni_session *ses, struct cryptop *crp,
97 const struct crypto_session_params *csp);
99 MALLOC_DEFINE(M_AESNI, "aesni_data", "AESNI Data");
102 aesni_identify(driver_t *drv, device_t parent)
105 /* NB: order 10 is so we get attached after h/w devices */
106 if (device_find_child(parent, "aesni", -1) == NULL &&
107 BUS_ADD_CHILD(parent, 10, "aesni", -1) == 0)
108 panic("aesni: could not attach");
112 detect_cpu_features(bool *has_aes, bool *has_sha)
115 *has_aes = ((cpu_feature2 & CPUID2_AESNI) != 0 &&
116 (cpu_feature2 & CPUID2_SSE41) != 0);
117 *has_sha = ((cpu_stdext_feature & CPUID_STDEXT_SHA) != 0 &&
118 (cpu_feature2 & CPUID2_SSSE3) != 0);
122 aesni_probe(device_t dev)
124 bool has_aes, has_sha;
126 detect_cpu_features(&has_aes, &has_sha);
127 if (!has_aes && !has_sha) {
128 device_printf(dev, "No AES or SHA support.\n");
130 } else if (has_aes && has_sha)
132 "AES-CBC,AES-CCM,AES-GCM,AES-ICM,AES-XTS,SHA1,SHA256");
135 "AES-CBC,AES-CCM,AES-GCM,AES-ICM,AES-XTS");
137 device_set_desc(dev, "SHA1,SHA256");
147 /* XXX - no way to return driverid */
149 if (ctx_fpu[i] != NULL) {
150 mtx_destroy(&ctx_mtx[i]);
151 fpu_kern_free_ctx(ctx_fpu[i]);
155 free(ctx_mtx, M_AESNI);
157 free(ctx_fpu, M_AESNI);
162 aesni_attach(device_t dev)
164 struct aesni_softc *sc;
167 sc = device_get_softc(dev);
169 sc->cid = crypto_get_driverid(dev, sizeof(struct aesni_session),
170 CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_SYNC);
172 device_printf(dev, "Could not get crypto driver id.\n");
176 ctx_mtx = malloc(sizeof *ctx_mtx * (mp_maxid + 1), M_AESNI,
178 ctx_fpu = malloc(sizeof *ctx_fpu * (mp_maxid + 1), M_AESNI,
182 ctx_fpu[i] = fpu_kern_alloc_ctx(0);
183 mtx_init(&ctx_mtx[i], "anifpumtx", NULL, MTX_DEF|MTX_NEW);
186 detect_cpu_features(&sc->has_aes, &sc->has_sha);
191 aesni_detach(device_t dev)
193 struct aesni_softc *sc;
195 sc = device_get_softc(dev);
197 crypto_unregister_all(sc->cid);
205 aesni_auth_supported(struct aesni_softc *sc,
206 const struct crypto_session_params *csp)
212 switch (csp->csp_auth_alg) {
214 case CRYPTO_SHA2_224:
215 case CRYPTO_SHA2_256:
216 case CRYPTO_SHA1_HMAC:
217 case CRYPTO_SHA2_224_HMAC:
218 case CRYPTO_SHA2_256_HMAC:
228 aesni_cipher_supported(struct aesni_softc *sc,
229 const struct crypto_session_params *csp)
235 switch (csp->csp_cipher_alg) {
238 if (csp->csp_ivlen != AES_BLOCK_LEN)
240 return (sc->has_aes);
242 if (csp->csp_ivlen != AES_XTS_IV_LEN)
244 return (sc->has_aes);
251 aesni_probesession(device_t dev, const struct crypto_session_params *csp)
253 struct aesni_softc *sc;
255 sc = device_get_softc(dev);
256 if (csp->csp_flags != 0)
258 switch (csp->csp_mode) {
259 case CSP_MODE_DIGEST:
260 if (!aesni_auth_supported(sc, csp))
263 case CSP_MODE_CIPHER:
264 if (!aesni_cipher_supported(sc, csp))
268 switch (csp->csp_cipher_alg) {
269 case CRYPTO_AES_NIST_GCM_16:
270 if (csp->csp_auth_mlen != 0 &&
271 csp->csp_auth_mlen != GMAC_DIGEST_LEN)
273 if (csp->csp_ivlen != AES_GCM_IV_LEN ||
277 case CRYPTO_AES_CCM_16:
278 if (csp->csp_auth_mlen != 0 &&
279 csp->csp_auth_mlen != AES_CBC_MAC_HASH_LEN)
281 if (csp->csp_ivlen != AES_CCM_IV_LEN ||
290 if (!aesni_auth_supported(sc, csp) ||
291 !aesni_cipher_supported(sc, csp))
298 return (CRYPTODEV_PROBE_ACCEL_SOFTWARE);
302 aesni_newsession(device_t dev, crypto_session_t cses,
303 const struct crypto_session_params *csp)
305 struct aesni_softc *sc;
306 struct aesni_session *ses;
309 sc = device_get_softc(dev);
311 ses = crypto_get_driver_session(cses);
313 switch (csp->csp_mode) {
314 case CSP_MODE_DIGEST:
315 case CSP_MODE_CIPHER:
322 error = aesni_cipher_setup(ses, csp);
324 CRYPTDEB("setup failed");
332 aesni_process(device_t dev, struct cryptop *crp, int hint __unused)
334 struct aesni_session *ses;
337 ses = crypto_get_driver_session(crp->crp_session);
339 error = aesni_cipher_process(ses, crp);
341 crp->crp_etype = error;
347 aesni_cipher_alloc(struct cryptop *crp, int start, int length, bool *allocated)
351 addr = crypto_contiguous_subsegment(crp, start, length);
356 addr = malloc(length, M_AESNI, M_NOWAIT);
359 crypto_copydata(crp, start, length, addr);
365 static device_method_t aesni_methods[] = {
366 DEVMETHOD(device_identify, aesni_identify),
367 DEVMETHOD(device_probe, aesni_probe),
368 DEVMETHOD(device_attach, aesni_attach),
369 DEVMETHOD(device_detach, aesni_detach),
371 DEVMETHOD(cryptodev_probesession, aesni_probesession),
372 DEVMETHOD(cryptodev_newsession, aesni_newsession),
373 DEVMETHOD(cryptodev_process, aesni_process),
378 static driver_t aesni_driver = {
381 sizeof(struct aesni_softc),
383 static devclass_t aesni_devclass;
385 DRIVER_MODULE(aesni, nexus, aesni_driver, aesni_devclass, 0, 0);
386 MODULE_VERSION(aesni, 1);
387 MODULE_DEPEND(aesni, crypto, 1, 1, 1);
390 intel_sha1_update(void *vctx, const void *vdata, u_int datalen)
392 struct sha1_ctxt *ctx = vctx;
393 const char *data = vdata;
401 /* Do any aligned blocks without redundant copying. */
402 if (datalen >= 64 && ctx->count % 64 == 0) {
403 blocks = datalen / 64;
404 ctx->c.b64[0] += blocks * 64 * 8;
405 intel_sha1_step(ctx->h.b32, data + off, blocks);
409 while (off < datalen) {
410 gapstart = ctx->count % 64;
411 gaplen = 64 - gapstart;
413 copysiz = (gaplen < datalen - off) ? gaplen : datalen - off;
414 bcopy(&data[off], &ctx->m.b8[gapstart], copysiz);
415 ctx->count += copysiz;
417 ctx->c.b64[0] += copysiz * 8;
418 if (ctx->count % 64 == 0)
419 intel_sha1_step(ctx->h.b32, (void *)ctx->m.b8, 1);
425 SHA1_Init_fn(void *ctx)
431 SHA1_Finalize_fn(void *digest, void *ctx)
433 sha1_result(ctx, digest);
437 intel_sha256_update(void *vctx, const void *vdata, u_int len)
439 SHA256_CTX *ctx = vctx;
443 const unsigned char *src = vdata;
445 /* Number of bytes left in the buffer from previous updates */
446 r = (ctx->count >> 3) & 0x3f;
448 /* Convert the length into a number of bits */
451 /* Update number of bits */
452 ctx->count += bitlen;
454 /* Handle the case where we don't need to perform any transforms */
456 memcpy(&ctx->buf[r], src, len);
460 /* Finish the current block */
461 memcpy(&ctx->buf[r], src, 64 - r);
462 intel_sha256_step(ctx->state, ctx->buf, 1);
466 /* Perform complete blocks */
469 intel_sha256_step(ctx->state, src, blocks);
474 /* Copy left over data into buffer */
475 memcpy(ctx->buf, src, len);
479 SHA224_Init_fn(void *ctx)
485 SHA224_Finalize_fn(void *digest, void *ctx)
487 SHA224_Final(digest, ctx);
491 SHA256_Init_fn(void *ctx)
497 SHA256_Finalize_fn(void *digest, void *ctx)
499 SHA256_Final(digest, ctx);
503 aesni_authprepare(struct aesni_session *ses, int klen)
506 if (klen > SHA1_BLOCK_LEN)
508 if ((ses->hmac && klen == 0) || (!ses->hmac && klen != 0))
514 aesni_cipherprepare(const struct crypto_session_params *csp)
517 switch (csp->csp_cipher_alg) {
519 case CRYPTO_AES_NIST_GCM_16:
520 case CRYPTO_AES_CCM_16:
522 switch (csp->csp_cipher_klen * 8) {
528 CRYPTDEB("invalid CBC/ICM/GCM key length");
533 switch (csp->csp_cipher_klen * 8) {
538 CRYPTDEB("invalid XTS key length");
549 aesni_cipher_setup(struct aesni_session *ses,
550 const struct crypto_session_params *csp)
552 struct fpu_kern_ctx *ctx;
553 int kt, ctxidx, error;
555 switch (csp->csp_auth_alg) {
556 case CRYPTO_SHA1_HMAC:
560 ses->hash_len = SHA1_HASH_LEN;
561 ses->hash_init = SHA1_Init_fn;
562 ses->hash_update = intel_sha1_update;
563 ses->hash_finalize = SHA1_Finalize_fn;
565 case CRYPTO_SHA2_224_HMAC:
568 case CRYPTO_SHA2_224:
569 ses->hash_len = SHA2_224_HASH_LEN;
570 ses->hash_init = SHA224_Init_fn;
571 ses->hash_update = intel_sha256_update;
572 ses->hash_finalize = SHA224_Finalize_fn;
574 case CRYPTO_SHA2_256_HMAC:
577 case CRYPTO_SHA2_256:
578 ses->hash_len = SHA2_256_HASH_LEN;
579 ses->hash_init = SHA256_Init_fn;
580 ses->hash_update = intel_sha256_update;
581 ses->hash_finalize = SHA256_Finalize_fn;
585 if (ses->hash_len != 0) {
586 if (csp->csp_auth_mlen == 0)
587 ses->mlen = ses->hash_len;
589 ses->mlen = csp->csp_auth_mlen;
591 error = aesni_authprepare(ses, csp->csp_auth_klen);
596 error = aesni_cipherprepare(csp);
600 kt = is_fpu_kern_thread(0) || (csp->csp_cipher_alg == 0);
602 ACQUIRE_CTX(ctxidx, ctx);
603 fpu_kern_enter(curthread, ctx,
604 FPU_KERN_NORMAL | FPU_KERN_KTHR);
608 if (csp->csp_cipher_key != NULL)
609 aesni_cipher_setup_common(ses, csp, csp->csp_cipher_key,
610 csp->csp_cipher_klen);
613 fpu_kern_leave(curthread, ctx);
614 RELEASE_CTX(ctxidx, ctx);
620 aesni_cipher_process(struct aesni_session *ses, struct cryptop *crp)
622 const struct crypto_session_params *csp;
623 struct fpu_kern_ctx *ctx;
627 csp = crypto_get_params(crp->crp_session);
628 switch (csp->csp_cipher_alg) {
630 case CRYPTO_AES_NIST_GCM_16:
631 case CRYPTO_AES_CCM_16:
632 if ((crp->crp_flags & CRYPTO_F_IV_SEPARATE) == 0)
637 /* CBC & XTS can only handle full blocks for now */
638 if ((crp->crp_payload_length % AES_BLOCK_LEN) != 0)
646 kt = is_fpu_kern_thread(0);
648 ACQUIRE_CTX(ctxidx, ctx);
649 fpu_kern_enter(curthread, ctx,
650 FPU_KERN_NORMAL | FPU_KERN_KTHR);
654 if (csp->csp_mode == CSP_MODE_ETA) {
655 if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) {
656 error = aesni_cipher_crypt(ses, crp, csp);
658 error = aesni_cipher_mac(ses, crp, csp);
660 error = aesni_cipher_mac(ses, crp, csp);
662 error = aesni_cipher_crypt(ses, crp, csp);
664 } else if (csp->csp_mode == CSP_MODE_DIGEST)
665 error = aesni_cipher_mac(ses, crp, csp);
667 error = aesni_cipher_crypt(ses, crp, csp);
670 fpu_kern_leave(curthread, ctx);
671 RELEASE_CTX(ctxidx, ctx);
677 aesni_cipher_crypt(struct aesni_session *ses, struct cryptop *crp,
678 const struct crypto_session_params *csp)
680 uint8_t iv[AES_BLOCK_LEN], tag[GMAC_DIGEST_LEN], *buf, *authbuf;
682 bool encflag, allocated, authallocated;
684 buf = aesni_cipher_alloc(crp, crp->crp_payload_start,
685 crp->crp_payload_length, &allocated);
689 authallocated = false;
691 if (csp->csp_cipher_alg == CRYPTO_AES_NIST_GCM_16 ||
692 csp->csp_cipher_alg == CRYPTO_AES_CCM_16) {
693 authbuf = aesni_cipher_alloc(crp, crp->crp_aad_start,
694 crp->crp_aad_length, &authallocated);
695 if (authbuf == NULL) {
702 encflag = CRYPTO_OP_IS_ENCRYPT(crp->crp_op);
703 if (crp->crp_cipher_key != NULL)
704 aesni_cipher_setup_common(ses, csp, crp->crp_cipher_key,
705 csp->csp_cipher_klen);
708 if (crp->crp_flags & CRYPTO_F_IV_GENERATE) {
709 arc4rand(iv, csp->csp_ivlen, 0);
710 crypto_copyback(crp, crp->crp_iv_start, csp->csp_ivlen, iv);
711 } else if (crp->crp_flags & CRYPTO_F_IV_SEPARATE)
712 memcpy(iv, crp->crp_iv, csp->csp_ivlen);
714 crypto_copydata(crp, crp->crp_iv_start, csp->csp_ivlen, iv);
716 switch (csp->csp_cipher_alg) {
719 aesni_encrypt_cbc(ses->rounds, ses->enc_schedule,
720 crp->crp_payload_length, buf, buf, iv);
722 aesni_decrypt_cbc(ses->rounds, ses->dec_schedule,
723 crp->crp_payload_length, buf, iv);
726 /* encryption & decryption are the same */
727 aesni_encrypt_icm(ses->rounds, ses->enc_schedule,
728 crp->crp_payload_length, buf, buf, iv);
732 aesni_encrypt_xts(ses->rounds, ses->enc_schedule,
733 ses->xts_schedule, crp->crp_payload_length, buf,
736 aesni_decrypt_xts(ses->rounds, ses->dec_schedule,
737 ses->xts_schedule, crp->crp_payload_length, buf,
740 case CRYPTO_AES_NIST_GCM_16:
742 memset(tag, 0, sizeof(tag));
743 AES_GCM_encrypt(buf, buf, authbuf, iv, tag,
744 crp->crp_payload_length, crp->crp_aad_length,
745 csp->csp_ivlen, ses->enc_schedule, ses->rounds);
746 crypto_copyback(crp, crp->crp_digest_start, sizeof(tag),
749 crypto_copydata(crp, crp->crp_digest_start, sizeof(tag),
751 if (!AES_GCM_decrypt(buf, buf, authbuf, iv, tag,
752 crp->crp_payload_length, crp->crp_aad_length,
753 csp->csp_ivlen, ses->enc_schedule, ses->rounds))
757 case CRYPTO_AES_CCM_16:
759 memset(tag, 0, sizeof(tag));
760 AES_CCM_encrypt(buf, buf, authbuf, iv, tag,
761 crp->crp_payload_length, crp->crp_aad_length,
762 csp->csp_ivlen, ses->enc_schedule, ses->rounds);
763 crypto_copyback(crp, crp->crp_digest_start, sizeof(tag),
766 crypto_copydata(crp, crp->crp_digest_start, sizeof(tag),
768 if (!AES_CCM_decrypt(buf, buf, authbuf, iv, tag,
769 crp->crp_payload_length, crp->crp_aad_length,
770 csp->csp_ivlen, ses->enc_schedule, ses->rounds))
775 if (allocated && error == 0)
776 crypto_copyback(crp, crp->crp_payload_start,
777 crp->crp_payload_length, buf);
781 explicit_bzero(buf, crp->crp_payload_length);
785 explicit_bzero(authbuf, crp->crp_aad_length);
786 free(authbuf, M_AESNI);
792 aesni_cipher_mac(struct aesni_session *ses, struct cryptop *crp,
793 const struct crypto_session_params *csp)
796 struct SHA256Context sha2 __aligned(16);
797 struct sha1_ctxt sha1 __aligned(16);
799 uint8_t hmac_key[SHA1_BLOCK_LEN] __aligned(16);
800 uint32_t res[SHA2_256_HASH_LEN / sizeof(uint32_t)];
801 uint32_t res2[SHA2_256_HASH_LEN / sizeof(uint32_t)];
805 if (crp->crp_auth_key != NULL)
806 key = crp->crp_auth_key;
808 key = csp->csp_auth_key;
809 keylen = csp->csp_auth_klen;
812 /* Inner hash: (K ^ IPAD) || data */
813 ses->hash_init(&sctx);
814 for (i = 0; i < keylen; i++)
815 hmac_key[i] = key[i] ^ HMAC_IPAD_VAL;
816 for (i = keylen; i < sizeof(hmac_key); i++)
817 hmac_key[i] = 0 ^ HMAC_IPAD_VAL;
818 ses->hash_update(&sctx, hmac_key, sizeof(hmac_key));
820 crypto_apply(crp, crp->crp_aad_start, crp->crp_aad_length,
821 __DECONST(int (*)(void *, void *, u_int), ses->hash_update),
823 crypto_apply(crp, crp->crp_payload_start,
824 crp->crp_payload_length,
825 __DECONST(int (*)(void *, void *, u_int), ses->hash_update),
827 ses->hash_finalize(res, &sctx);
829 /* Outer hash: (K ^ OPAD) || inner hash */
830 ses->hash_init(&sctx);
831 for (i = 0; i < keylen; i++)
832 hmac_key[i] = key[i] ^ HMAC_OPAD_VAL;
833 for (i = keylen; i < sizeof(hmac_key); i++)
834 hmac_key[i] = 0 ^ HMAC_OPAD_VAL;
835 ses->hash_update(&sctx, hmac_key, sizeof(hmac_key));
836 ses->hash_update(&sctx, res, ses->hash_len);
837 ses->hash_finalize(res, &sctx);
839 ses->hash_init(&sctx);
841 crypto_apply(crp, crp->crp_aad_start, crp->crp_aad_length,
842 __DECONST(int (*)(void *, void *, u_int), ses->hash_update),
844 crypto_apply(crp, crp->crp_payload_start,
845 crp->crp_payload_length,
846 __DECONST(int (*)(void *, void *, u_int), ses->hash_update),
849 ses->hash_finalize(res, &sctx);
852 if (crp->crp_op & CRYPTO_OP_VERIFY_DIGEST) {
853 crypto_copydata(crp, crp->crp_digest_start, ses->mlen, res2);
854 if (timingsafe_bcmp(res, res2, ses->mlen) != 0)
857 crypto_copyback(crp, crp->crp_digest_start, ses->mlen, res);