2 * Copyright (c) 2005-2008 Pawel Jakub Dawidek <pjd@FreeBSD.org>
3 * Copyright (c) 2010 Konstantin Belousov <kib@FreeBSD.org>
4 * Copyright (c) 2014 The FreeBSD Foundation
5 * Copyright (c) 2017 Conrad Meyer <cem@FreeBSD.org>
8 * Portions of this software were developed by John-Mark Gurney
9 * under sponsorship of the FreeBSD Foundation and
10 * Rubicon Communications, LLC (Netgate).
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
41 #include <sys/libkern.h>
43 #include <sys/module.h>
44 #include <sys/malloc.h>
50 #include <crypto/aesni/aesni.h>
51 #include <crypto/aesni/sha_sse.h>
52 #include <crypto/sha1.h>
53 #include <crypto/sha2/sha224.h>
54 #include <crypto/sha2/sha256.h>
56 #include <opencrypto/cryptodev.h>
57 #include <opencrypto/gmac.h>
58 #include <cryptodev_if.h>
60 #include <machine/md_var.h>
61 #include <machine/specialreg.h>
63 #include <machine/npx.h>
64 #elif defined(__amd64__)
65 #include <machine/fpu.h>
68 static struct mtx_padalign *ctx_mtx;
69 static struct fpu_kern_ctx **ctx_fpu;
77 #define ACQUIRE_CTX(i, ctx) \
79 (i) = PCPU_GET(cpuid); \
80 mtx_lock(&ctx_mtx[(i)]); \
81 (ctx) = ctx_fpu[(i)]; \
83 #define RELEASE_CTX(i, ctx) \
85 mtx_unlock(&ctx_mtx[(i)]); \
90 static int aesni_newsession(device_t, crypto_session_t cses,
91 struct cryptoini *cri);
92 static int aesni_cipher_setup(struct aesni_session *ses,
93 struct cryptoini *encini, struct cryptoini *authini);
94 static int aesni_cipher_process(struct aesni_session *ses,
95 struct cryptodesc *enccrd, struct cryptodesc *authcrd, struct cryptop *crp);
96 static int aesni_cipher_crypt(struct aesni_session *ses,
97 struct cryptodesc *enccrd, struct cryptodesc *authcrd, struct cryptop *crp);
98 static int aesni_cipher_mac(struct aesni_session *ses, struct cryptodesc *crd,
101 MALLOC_DEFINE(M_AESNI, "aesni_data", "AESNI Data");
104 aesni_identify(driver_t *drv, device_t parent)
107 /* NB: order 10 is so we get attached after h/w devices */
108 if (device_find_child(parent, "aesni", -1) == NULL &&
109 BUS_ADD_CHILD(parent, 10, "aesni", -1) == 0)
110 panic("aesni: could not attach");
114 detect_cpu_features(bool *has_aes, bool *has_sha)
117 *has_aes = ((cpu_feature2 & CPUID2_AESNI) != 0 &&
118 (cpu_feature2 & CPUID2_SSE41) != 0);
119 *has_sha = ((cpu_stdext_feature & CPUID_STDEXT_SHA) != 0 &&
120 (cpu_feature2 & CPUID2_SSSE3) != 0);
124 aesni_probe(device_t dev)
126 bool has_aes, has_sha;
128 detect_cpu_features(&has_aes, &has_sha);
129 if (!has_aes && !has_sha) {
130 device_printf(dev, "No AES or SHA support.\n");
132 } else if (has_aes && has_sha)
134 "AES-CBC,AES-XTS,AES-GCM,AES-ICM,SHA1,SHA256");
136 device_set_desc(dev, "AES-CBC,AES-XTS,AES-GCM,AES-ICM");
138 device_set_desc(dev, "SHA1,SHA256");
148 /* XXX - no way to return driverid */
150 if (ctx_fpu[i] != NULL) {
151 mtx_destroy(&ctx_mtx[i]);
152 fpu_kern_free_ctx(ctx_fpu[i]);
156 free(ctx_mtx, M_AESNI);
158 free(ctx_fpu, M_AESNI);
163 aesni_attach(device_t dev)
165 struct aesni_softc *sc;
168 sc = device_get_softc(dev);
170 sc->cid = crypto_get_driverid(dev, sizeof(struct aesni_session),
171 CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SYNC);
173 device_printf(dev, "Could not get crypto driver id.\n");
177 ctx_mtx = malloc(sizeof *ctx_mtx * (mp_maxid + 1), M_AESNI,
179 ctx_fpu = malloc(sizeof *ctx_fpu * (mp_maxid + 1), M_AESNI,
183 ctx_fpu[i] = fpu_kern_alloc_ctx(0);
184 mtx_init(&ctx_mtx[i], "anifpumtx", NULL, MTX_DEF|MTX_NEW);
187 detect_cpu_features(&sc->has_aes, &sc->has_sha);
189 crypto_register(sc->cid, CRYPTO_AES_CBC, 0, 0);
190 crypto_register(sc->cid, CRYPTO_AES_ICM, 0, 0);
191 crypto_register(sc->cid, CRYPTO_AES_NIST_GCM_16, 0, 0);
192 crypto_register(sc->cid, CRYPTO_AES_128_NIST_GMAC, 0, 0);
193 crypto_register(sc->cid, CRYPTO_AES_192_NIST_GMAC, 0, 0);
194 crypto_register(sc->cid, CRYPTO_AES_256_NIST_GMAC, 0, 0);
195 crypto_register(sc->cid, CRYPTO_AES_XTS, 0, 0);
198 crypto_register(sc->cid, CRYPTO_SHA1, 0, 0);
199 crypto_register(sc->cid, CRYPTO_SHA1_HMAC, 0, 0);
200 crypto_register(sc->cid, CRYPTO_SHA2_224, 0, 0);
201 crypto_register(sc->cid, CRYPTO_SHA2_224_HMAC, 0, 0);
202 crypto_register(sc->cid, CRYPTO_SHA2_256, 0, 0);
203 crypto_register(sc->cid, CRYPTO_SHA2_256_HMAC, 0, 0);
209 aesni_detach(device_t dev)
211 struct aesni_softc *sc;
213 sc = device_get_softc(dev);
215 crypto_unregister_all(sc->cid);
223 aesni_newsession(device_t dev, crypto_session_t cses, struct cryptoini *cri)
225 struct aesni_softc *sc;
226 struct aesni_session *ses;
227 struct cryptoini *encini, *authini;
231 KASSERT(cses != NULL, ("EDOOFUS"));
237 sc = device_get_softc(dev);
239 ses = crypto_get_driver_session(cses);
245 for (; cri != NULL; cri = cri->cri_next) {
246 switch (cri->cri_alg) {
247 case CRYPTO_AES_NIST_GCM_16:
255 if (encini != NULL) {
256 CRYPTDEB("encini already set");
261 case CRYPTO_AES_128_NIST_GMAC:
262 case CRYPTO_AES_192_NIST_GMAC:
263 case CRYPTO_AES_256_NIST_GMAC:
265 * nothing to do here, maybe in the future cache some
271 case CRYPTO_SHA1_HMAC:
272 case CRYPTO_SHA2_224:
273 case CRYPTO_SHA2_224_HMAC:
274 case CRYPTO_SHA2_256:
275 case CRYPTO_SHA2_256_HMAC:
278 if (authini != NULL) {
279 CRYPTDEB("authini already set");
286 CRYPTDEB("unhandled algorithm");
290 if (encini == NULL && authini == NULL) {
291 CRYPTDEB("no cipher");
295 * GMAC algorithms are only supported with simultaneous GCM. Likewise
296 * GCM is not supported without GMAC.
302 ses->algo = encini->cri_alg;
304 ses->auth_algo = authini->cri_alg;
306 error = aesni_cipher_setup(ses, encini, authini);
308 CRYPTDEB("setup failed");
316 aesni_process(device_t dev, struct cryptop *crp, int hint __unused)
318 struct aesni_session *ses;
319 struct cryptodesc *crd, *enccrd, *authcrd;
332 if (crp->crp_callback == NULL || crp->crp_desc == NULL ||
333 crp->crp_session == NULL) {
338 for (crd = crp->crp_desc; crd != NULL; crd = crd->crd_next) {
339 switch (crd->crd_alg) {
340 case CRYPTO_AES_NIST_GCM_16:
346 if (enccrd != NULL) {
353 case CRYPTO_AES_128_NIST_GMAC:
354 case CRYPTO_AES_192_NIST_GMAC:
355 case CRYPTO_AES_256_NIST_GMAC:
357 case CRYPTO_SHA1_HMAC:
358 case CRYPTO_SHA2_224:
359 case CRYPTO_SHA2_224_HMAC:
360 case CRYPTO_SHA2_256:
361 case CRYPTO_SHA2_256_HMAC:
362 if (authcrd != NULL) {
375 if ((enccrd == NULL && authcrd == NULL) ||
376 (needauth && authcrd == NULL)) {
381 /* CBC & XTS can only handle full blocks for now */
382 if (enccrd != NULL && (enccrd->crd_alg == CRYPTO_AES_CBC ||
383 enccrd->crd_alg == CRYPTO_AES_XTS) &&
384 (enccrd->crd_len % AES_BLOCK_LEN) != 0) {
389 ses = crypto_get_driver_session(crp->crp_session);
390 KASSERT(ses != NULL, ("EDOOFUS"));
392 error = aesni_cipher_process(ses, enccrd, authcrd, crp);
397 crp->crp_etype = error;
403 aesni_cipher_alloc(struct cryptodesc *enccrd, struct cryptop *crp,
411 if (crp->crp_flags & CRYPTO_F_IMBUF) {
412 m = (struct mbuf *)crp->crp_buf;
413 if (m->m_next != NULL)
415 addr = mtod(m, uint8_t *);
416 } else if (crp->crp_flags & CRYPTO_F_IOV) {
417 uio = (struct uio *)crp->crp_buf;
418 if (uio->uio_iovcnt != 1)
421 addr = (uint8_t *)iov->iov_base;
423 addr = (uint8_t *)crp->crp_buf;
425 addr += enccrd->crd_skip;
429 addr = malloc(enccrd->crd_len, M_AESNI, M_NOWAIT);
432 crypto_copydata(crp->crp_flags, crp->crp_buf, enccrd->crd_skip,
433 enccrd->crd_len, addr);
439 static device_method_t aesni_methods[] = {
440 DEVMETHOD(device_identify, aesni_identify),
441 DEVMETHOD(device_probe, aesni_probe),
442 DEVMETHOD(device_attach, aesni_attach),
443 DEVMETHOD(device_detach, aesni_detach),
445 DEVMETHOD(cryptodev_newsession, aesni_newsession),
446 DEVMETHOD(cryptodev_process, aesni_process),
451 static driver_t aesni_driver = {
454 sizeof(struct aesni_softc),
456 static devclass_t aesni_devclass;
458 DRIVER_MODULE(aesni, nexus, aesni_driver, aesni_devclass, 0, 0);
459 MODULE_VERSION(aesni, 1);
460 MODULE_DEPEND(aesni, crypto, 1, 1, 1);
463 aesni_authprepare(struct aesni_session *ses, int klen, const void *cri_key)
470 if (keylen > sizeof(ses->hmac_key))
472 if (ses->auth_algo == CRYPTO_SHA1 && keylen > 0)
474 memcpy(ses->hmac_key, cri_key, keylen);
479 aesni_cipher_setup(struct aesni_session *ses, struct cryptoini *encini,
480 struct cryptoini *authini)
482 struct fpu_kern_ctx *ctx;
483 int kt, ctxidx, error;
485 switch (ses->auth_algo) {
487 case CRYPTO_SHA1_HMAC:
488 case CRYPTO_SHA2_224:
489 case CRYPTO_SHA2_224_HMAC:
490 case CRYPTO_SHA2_256:
491 case CRYPTO_SHA2_256_HMAC:
492 error = aesni_authprepare(ses, authini->cri_klen,
496 ses->mlen = authini->cri_mlen;
499 kt = is_fpu_kern_thread(0) || (encini == NULL);
501 ACQUIRE_CTX(ctxidx, ctx);
502 fpu_kern_enter(curthread, ctx,
503 FPU_KERN_NORMAL | FPU_KERN_KTHR);
508 error = aesni_cipher_setup_common(ses, encini->cri_key,
512 fpu_kern_leave(curthread, ctx);
513 RELEASE_CTX(ctxidx, ctx);
519 intel_sha1_update(void *vctx, const void *vdata, u_int datalen)
521 struct sha1_ctxt *ctx = vctx;
522 const char *data = vdata;
530 /* Do any aligned blocks without redundant copying. */
531 if (datalen >= 64 && ctx->count % 64 == 0) {
532 blocks = datalen / 64;
533 ctx->c.b64[0] += blocks * 64 * 8;
534 intel_sha1_step(ctx->h.b32, data + off, blocks);
538 while (off < datalen) {
539 gapstart = ctx->count % 64;
540 gaplen = 64 - gapstart;
542 copysiz = (gaplen < datalen - off) ? gaplen : datalen - off;
543 bcopy(&data[off], &ctx->m.b8[gapstart], copysiz);
544 ctx->count += copysiz;
546 ctx->c.b64[0] += copysiz * 8;
547 if (ctx->count % 64 == 0)
548 intel_sha1_step(ctx->h.b32, (void *)ctx->m.b8, 1);
555 SHA1_Init_fn(void *ctx)
561 SHA1_Finalize_fn(void *digest, void *ctx)
563 sha1_result(ctx, digest);
567 intel_sha256_update(void *vctx, const void *vdata, u_int len)
569 SHA256_CTX *ctx = vctx;
573 const unsigned char *src = vdata;
575 /* Number of bytes left in the buffer from previous updates */
576 r = (ctx->count >> 3) & 0x3f;
578 /* Convert the length into a number of bits */
581 /* Update number of bits */
582 ctx->count += bitlen;
584 /* Handle the case where we don't need to perform any transforms */
586 memcpy(&ctx->buf[r], src, len);
590 /* Finish the current block */
591 memcpy(&ctx->buf[r], src, 64 - r);
592 intel_sha256_step(ctx->state, ctx->buf, 1);
596 /* Perform complete blocks */
599 intel_sha256_step(ctx->state, src, blocks);
604 /* Copy left over data into buffer */
605 memcpy(ctx->buf, src, len);
610 SHA224_Init_fn(void *ctx)
616 SHA224_Finalize_fn(void *digest, void *ctx)
618 SHA224_Final(digest, ctx);
622 SHA256_Init_fn(void *ctx)
628 SHA256_Finalize_fn(void *digest, void *ctx)
630 SHA256_Final(digest, ctx);
634 * Compute the HASH( (key ^ xorbyte) || buf )
637 hmac_internal(void *ctx, uint32_t *res,
638 int (*update)(void *, const void *, u_int),
639 void (*finalize)(void *, void *), uint8_t *key, uint8_t xorbyte,
640 const void *buf, size_t off, size_t buflen, int crpflags)
644 for (i = 0; i < 64; i++)
646 update(ctx, key, 64);
647 for (i = 0; i < 64; i++)
650 crypto_apply(crpflags, __DECONST(void *, buf), off, buflen,
651 __DECONST(int (*)(void *, void *, u_int), update), ctx);
656 aesni_cipher_process(struct aesni_session *ses, struct cryptodesc *enccrd,
657 struct cryptodesc *authcrd, struct cryptop *crp)
659 struct fpu_kern_ctx *ctx;
663 if (enccrd != NULL) {
664 if ((enccrd->crd_alg == CRYPTO_AES_ICM ||
665 enccrd->crd_alg == CRYPTO_AES_NIST_GCM_16) &&
666 (enccrd->crd_flags & CRD_F_IV_EXPLICIT) == 0)
673 kt = is_fpu_kern_thread(0);
675 ACQUIRE_CTX(ctxidx, ctx);
676 fpu_kern_enter(curthread, ctx,
677 FPU_KERN_NORMAL | FPU_KERN_KTHR);
681 if (enccrd != NULL && authcrd != NULL) {
682 /* Perform the first operation */
683 if (crp->crp_desc == enccrd)
684 error = aesni_cipher_crypt(ses, enccrd, authcrd, crp);
686 error = aesni_cipher_mac(ses, authcrd, crp);
689 /* Perform the second operation */
690 if (crp->crp_desc == enccrd)
691 error = aesni_cipher_mac(ses, authcrd, crp);
693 error = aesni_cipher_crypt(ses, enccrd, authcrd, crp);
694 } else if (enccrd != NULL)
695 error = aesni_cipher_crypt(ses, enccrd, authcrd, crp);
697 error = aesni_cipher_mac(ses, authcrd, crp);
704 fpu_kern_leave(curthread, ctx);
705 RELEASE_CTX(ctxidx, ctx);
711 aesni_cipher_crypt(struct aesni_session *ses, struct cryptodesc *enccrd,
712 struct cryptodesc *authcrd, struct cryptop *crp)
714 uint8_t iv[AES_BLOCK_LEN], tag[GMAC_DIGEST_LEN], *buf, *authbuf;
716 bool encflag, allocated, authallocated;
718 KASSERT(ses->algo != CRYPTO_AES_NIST_GCM_16 || authcrd != NULL,
719 ("AES_NIST_GCM_16 must include MAC descriptor"));
724 buf = aesni_cipher_alloc(enccrd, crp, &allocated);
728 authallocated = false;
729 if (ses->algo == CRYPTO_AES_NIST_GCM_16) {
730 authbuf = aesni_cipher_alloc(authcrd, crp, &authallocated);
731 if (authbuf == NULL) {
738 encflag = (enccrd->crd_flags & CRD_F_ENCRYPT) == CRD_F_ENCRYPT;
739 if ((enccrd->crd_flags & CRD_F_KEY_EXPLICIT) != 0) {
740 error = aesni_cipher_setup_common(ses, enccrd->crd_key,
746 switch (enccrd->crd_alg) {
749 ivlen = AES_BLOCK_LEN;
754 case CRYPTO_AES_NIST_GCM_16:
755 ivlen = 12; /* should support arbitarily larger */
761 if ((enccrd->crd_flags & CRD_F_IV_EXPLICIT) != 0)
762 bcopy(enccrd->crd_iv, iv, ivlen);
764 arc4rand(iv, ivlen, 0);
766 if ((enccrd->crd_flags & CRD_F_IV_PRESENT) == 0)
767 crypto_copyback(crp->crp_flags, crp->crp_buf,
768 enccrd->crd_inject, ivlen, iv);
770 if ((enccrd->crd_flags & CRD_F_IV_EXPLICIT) != 0)
771 bcopy(enccrd->crd_iv, iv, ivlen);
773 crypto_copydata(crp->crp_flags, crp->crp_buf,
774 enccrd->crd_inject, ivlen, iv);
780 aesni_encrypt_cbc(ses->rounds, ses->enc_schedule,
781 enccrd->crd_len, buf, buf, iv);
783 aesni_decrypt_cbc(ses->rounds, ses->dec_schedule,
784 enccrd->crd_len, buf, iv);
787 /* encryption & decryption are the same */
788 aesni_encrypt_icm(ses->rounds, ses->enc_schedule,
789 enccrd->crd_len, buf, buf, iv);
793 aesni_encrypt_xts(ses->rounds, ses->enc_schedule,
794 ses->xts_schedule, enccrd->crd_len, buf, buf,
797 aesni_decrypt_xts(ses->rounds, ses->dec_schedule,
798 ses->xts_schedule, enccrd->crd_len, buf, buf,
801 case CRYPTO_AES_NIST_GCM_16:
803 crypto_copydata(crp->crp_flags, crp->crp_buf,
804 authcrd->crd_inject, GMAC_DIGEST_LEN, tag);
806 bzero(tag, sizeof tag);
809 AES_GCM_encrypt(buf, buf, authbuf, iv, tag,
810 enccrd->crd_len, authcrd->crd_len, ivlen,
811 ses->enc_schedule, ses->rounds);
814 crypto_copyback(crp->crp_flags, crp->crp_buf,
815 authcrd->crd_inject, GMAC_DIGEST_LEN, tag);
817 if (!AES_GCM_decrypt(buf, buf, authbuf, iv, tag,
818 enccrd->crd_len, authcrd->crd_len, ivlen,
819 ses->enc_schedule, ses->rounds))
826 crypto_copyback(crp->crp_flags, crp->crp_buf, enccrd->crd_skip,
827 enccrd->crd_len, buf);
831 explicit_bzero(buf, enccrd->crd_len);
835 explicit_bzero(authbuf, authcrd->crd_len);
836 free(authbuf, M_AESNI);
842 aesni_cipher_mac(struct aesni_session *ses, struct cryptodesc *crd,
846 struct SHA256Context sha2 __aligned(16);
847 struct sha1_ctxt sha1 __aligned(16);
849 uint32_t res[SHA2_256_HASH_LEN / sizeof(uint32_t)];
852 void (*InitFn)(void *);
853 int (*UpdateFn)(void *, const void *, unsigned);
854 void (*FinalizeFn)(void *, void *);
858 if ((crd->crd_flags & ~CRD_F_KEY_EXPLICIT) != 0) {
859 CRYPTDEB("%s: Unsupported MAC flags: 0x%x", __func__,
860 (crd->crd_flags & ~CRD_F_KEY_EXPLICIT));
863 if ((crd->crd_flags & CRD_F_KEY_EXPLICIT) != 0) {
864 error = aesni_authprepare(ses, crd->crd_klen, crd->crd_key);
870 switch (ses->auth_algo) {
871 case CRYPTO_SHA1_HMAC:
875 hashlen = SHA1_HASH_LEN;
876 InitFn = SHA1_Init_fn;
877 UpdateFn = intel_sha1_update;
878 FinalizeFn = SHA1_Finalize_fn;
882 case CRYPTO_SHA2_256_HMAC:
885 case CRYPTO_SHA2_256:
886 hashlen = SHA2_256_HASH_LEN;
887 InitFn = SHA256_Init_fn;
888 UpdateFn = intel_sha256_update;
889 FinalizeFn = SHA256_Finalize_fn;
893 case CRYPTO_SHA2_224_HMAC:
896 case CRYPTO_SHA2_224:
897 hashlen = SHA2_224_HASH_LEN;
898 InitFn = SHA224_Init_fn;
899 UpdateFn = intel_sha256_update;
900 FinalizeFn = SHA224_Finalize_fn;
905 * AES-GMAC authentication is verified while processing the
912 /* Inner hash: (K ^ IPAD) || data */
914 hmac_internal(ctx, res, UpdateFn, FinalizeFn, ses->hmac_key,
915 0x36, crp->crp_buf, crd->crd_skip, crd->crd_len,
917 /* Outer hash: (K ^ OPAD) || inner hash */
919 hmac_internal(ctx, res, UpdateFn, FinalizeFn, ses->hmac_key,
920 0x5C, res, 0, hashlen, 0);
923 crypto_apply(crp->crp_flags, crp->crp_buf, crd->crd_skip,
924 crd->crd_len, __DECONST(int (*)(void *, void *, u_int),
926 FinalizeFn(res, ctx);
929 if (ses->mlen != 0 && ses->mlen < hashlen)
932 crypto_copyback(crp->crp_flags, crp->crp_buf, crd->crd_inject, hashlen,