2 * Copyright (c) 2005-2008 Pawel Jakub Dawidek <pjd@FreeBSD.org>
3 * Copyright (c) 2010 Konstantin Belousov <kib@FreeBSD.org>
4 * Copyright (c) 2014 The FreeBSD Foundation
5 * Copyright (c) 2017 Conrad Meyer <cem@FreeBSD.org>
8 * Portions of this software were developed by John-Mark Gurney
9 * under sponsorship of the FreeBSD Foundation and
10 * Rubicon Communications, LLC (Netgate).
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
41 #include <sys/libkern.h>
43 #include <sys/module.h>
44 #include <sys/malloc.h>
50 #include <crypto/aesni/aesni.h>
51 #include <crypto/aesni/sha_sse.h>
52 #include <crypto/sha1.h>
53 #include <crypto/sha2/sha256.h>
55 #include <opencrypto/cryptodev.h>
56 #include <opencrypto/gmac.h>
57 #include <cryptodev_if.h>
59 #include <machine/md_var.h>
60 #include <machine/specialreg.h>
62 #include <machine/npx.h>
63 #elif defined(__amd64__)
64 #include <machine/fpu.h>
67 static struct mtx_padalign *ctx_mtx;
68 static struct fpu_kern_ctx **ctx_fpu;
76 #define ACQUIRE_CTX(i, ctx) \
78 (i) = PCPU_GET(cpuid); \
79 mtx_lock(&ctx_mtx[(i)]); \
80 (ctx) = ctx_fpu[(i)]; \
82 #define RELEASE_CTX(i, ctx) \
84 mtx_unlock(&ctx_mtx[(i)]); \
89 static int aesni_newsession(device_t, crypto_session_t cses,
90 struct cryptoini *cri);
91 static int aesni_cipher_setup(struct aesni_session *ses,
92 struct cryptoini *encini, struct cryptoini *authini);
93 static int aesni_cipher_process(struct aesni_session *ses,
94 struct cryptodesc *enccrd, struct cryptodesc *authcrd, struct cryptop *crp);
95 static int aesni_cipher_crypt(struct aesni_session *ses,
96 struct cryptodesc *enccrd, struct cryptodesc *authcrd, struct cryptop *crp);
97 static int aesni_cipher_mac(struct aesni_session *ses, struct cryptodesc *crd,
100 MALLOC_DEFINE(M_AESNI, "aesni_data", "AESNI Data");
103 aesni_identify(driver_t *drv, device_t parent)
106 /* NB: order 10 is so we get attached after h/w devices */
107 if (device_find_child(parent, "aesni", -1) == NULL &&
108 BUS_ADD_CHILD(parent, 10, "aesni", -1) == 0)
109 panic("aesni: could not attach");
113 detect_cpu_features(bool *has_aes, bool *has_sha)
116 *has_aes = ((cpu_feature2 & CPUID2_AESNI) != 0 &&
117 (cpu_feature2 & CPUID2_SSE41) != 0);
118 *has_sha = ((cpu_stdext_feature & CPUID_STDEXT_SHA) != 0 &&
119 (cpu_feature2 & CPUID2_SSSE3) != 0);
123 aesni_probe(device_t dev)
125 bool has_aes, has_sha;
127 detect_cpu_features(&has_aes, &has_sha);
128 if (!has_aes && !has_sha) {
129 device_printf(dev, "No AES or SHA support.\n");
131 } else if (has_aes && has_sha)
133 "AES-CBC,AES-XTS,AES-GCM,AES-ICM,SHA1,SHA256");
135 device_set_desc(dev, "AES-CBC,AES-XTS,AES-GCM,AES-ICM");
137 device_set_desc(dev, "SHA1,SHA256");
147 /* XXX - no way to return driverid */
149 if (ctx_fpu[i] != NULL) {
150 mtx_destroy(&ctx_mtx[i]);
151 fpu_kern_free_ctx(ctx_fpu[i]);
155 free(ctx_mtx, M_AESNI);
157 free(ctx_fpu, M_AESNI);
162 aesni_attach(device_t dev)
164 struct aesni_softc *sc;
167 sc = device_get_softc(dev);
169 sc->cid = crypto_get_driverid(dev, sizeof(struct aesni_session),
170 CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SYNC);
172 device_printf(dev, "Could not get crypto driver id.\n");
176 ctx_mtx = malloc(sizeof *ctx_mtx * (mp_maxid + 1), M_AESNI,
178 ctx_fpu = malloc(sizeof *ctx_fpu * (mp_maxid + 1), M_AESNI,
182 ctx_fpu[i] = fpu_kern_alloc_ctx(0);
183 mtx_init(&ctx_mtx[i], "anifpumtx", NULL, MTX_DEF|MTX_NEW);
186 detect_cpu_features(&sc->has_aes, &sc->has_sha);
188 crypto_register(sc->cid, CRYPTO_AES_CBC, 0, 0);
189 crypto_register(sc->cid, CRYPTO_AES_ICM, 0, 0);
190 crypto_register(sc->cid, CRYPTO_AES_NIST_GCM_16, 0, 0);
191 crypto_register(sc->cid, CRYPTO_AES_128_NIST_GMAC, 0, 0);
192 crypto_register(sc->cid, CRYPTO_AES_192_NIST_GMAC, 0, 0);
193 crypto_register(sc->cid, CRYPTO_AES_256_NIST_GMAC, 0, 0);
194 crypto_register(sc->cid, CRYPTO_AES_XTS, 0, 0);
197 crypto_register(sc->cid, CRYPTO_SHA1, 0, 0);
198 crypto_register(sc->cid, CRYPTO_SHA1_HMAC, 0, 0);
199 crypto_register(sc->cid, CRYPTO_SHA2_256_HMAC, 0, 0);
205 aesni_detach(device_t dev)
207 struct aesni_softc *sc;
209 sc = device_get_softc(dev);
211 crypto_unregister_all(sc->cid);
219 aesni_newsession(device_t dev, crypto_session_t cses, struct cryptoini *cri)
221 struct aesni_softc *sc;
222 struct aesni_session *ses;
223 struct cryptoini *encini, *authini;
227 KASSERT(cses != NULL, ("EDOOFUS"));
233 sc = device_get_softc(dev);
235 ses = crypto_get_driver_session(cses);
241 for (; cri != NULL; cri = cri->cri_next) {
242 switch (cri->cri_alg) {
243 case CRYPTO_AES_NIST_GCM_16:
251 if (encini != NULL) {
252 CRYPTDEB("encini already set");
257 case CRYPTO_AES_128_NIST_GMAC:
258 case CRYPTO_AES_192_NIST_GMAC:
259 case CRYPTO_AES_256_NIST_GMAC:
261 * nothing to do here, maybe in the future cache some
267 case CRYPTO_SHA1_HMAC:
268 case CRYPTO_SHA2_256_HMAC:
271 if (authini != NULL) {
272 CRYPTDEB("authini already set");
279 CRYPTDEB("unhandled algorithm");
283 if (encini == NULL && authini == NULL) {
284 CRYPTDEB("no cipher");
288 * GMAC algorithms are only supported with simultaneous GCM. Likewise
289 * GCM is not supported without GMAC.
295 ses->algo = encini->cri_alg;
297 ses->auth_algo = authini->cri_alg;
299 error = aesni_cipher_setup(ses, encini, authini);
301 CRYPTDEB("setup failed");
309 aesni_process(device_t dev, struct cryptop *crp, int hint __unused)
311 struct aesni_softc *sc;
312 struct aesni_session *ses;
313 struct cryptodesc *crd, *enccrd, *authcrd;
316 sc = device_get_softc(dev);
327 if (crp->crp_callback == NULL || crp->crp_desc == NULL ||
328 crp->crp_session == NULL) {
333 for (crd = crp->crp_desc; crd != NULL; crd = crd->crd_next) {
334 switch (crd->crd_alg) {
335 case CRYPTO_AES_NIST_GCM_16:
341 if (enccrd != NULL) {
348 case CRYPTO_AES_128_NIST_GMAC:
349 case CRYPTO_AES_192_NIST_GMAC:
350 case CRYPTO_AES_256_NIST_GMAC:
352 case CRYPTO_SHA1_HMAC:
353 case CRYPTO_SHA2_256_HMAC:
354 if (authcrd != NULL) {
367 if ((enccrd == NULL && authcrd == NULL) ||
368 (needauth && authcrd == NULL)) {
373 /* CBC & XTS can only handle full blocks for now */
374 if (enccrd != NULL && (enccrd->crd_alg == CRYPTO_AES_CBC ||
375 enccrd->crd_alg == CRYPTO_AES_XTS) &&
376 (enccrd->crd_len % AES_BLOCK_LEN) != 0) {
381 ses = crypto_get_driver_session(crp->crp_session);
382 KASSERT(ses != NULL, ("EDOOFUS"));
384 error = aesni_cipher_process(ses, enccrd, authcrd, crp);
389 crp->crp_etype = error;
395 aesni_cipher_alloc(struct cryptodesc *enccrd, struct cryptop *crp,
403 if (crp->crp_flags & CRYPTO_F_IMBUF) {
404 m = (struct mbuf *)crp->crp_buf;
405 if (m->m_next != NULL)
407 addr = mtod(m, uint8_t *);
408 } else if (crp->crp_flags & CRYPTO_F_IOV) {
409 uio = (struct uio *)crp->crp_buf;
410 if (uio->uio_iovcnt != 1)
413 addr = (uint8_t *)iov->iov_base;
415 addr = (uint8_t *)crp->crp_buf;
417 addr += enccrd->crd_skip;
421 addr = malloc(enccrd->crd_len, M_AESNI, M_NOWAIT);
424 crypto_copydata(crp->crp_flags, crp->crp_buf, enccrd->crd_skip,
425 enccrd->crd_len, addr);
431 static device_method_t aesni_methods[] = {
432 DEVMETHOD(device_identify, aesni_identify),
433 DEVMETHOD(device_probe, aesni_probe),
434 DEVMETHOD(device_attach, aesni_attach),
435 DEVMETHOD(device_detach, aesni_detach),
437 DEVMETHOD(cryptodev_newsession, aesni_newsession),
438 DEVMETHOD(cryptodev_process, aesni_process),
443 static driver_t aesni_driver = {
446 sizeof(struct aesni_softc),
448 static devclass_t aesni_devclass;
450 DRIVER_MODULE(aesni, nexus, aesni_driver, aesni_devclass, 0, 0);
451 MODULE_VERSION(aesni, 1);
452 MODULE_DEPEND(aesni, crypto, 1, 1, 1);
455 aesni_authprepare(struct aesni_session *ses, int klen, const void *cri_key)
462 if (keylen > sizeof(ses->hmac_key))
464 if (ses->auth_algo == CRYPTO_SHA1 && keylen > 0)
466 memcpy(ses->hmac_key, cri_key, keylen);
471 aesni_cipher_setup(struct aesni_session *ses, struct cryptoini *encini,
472 struct cryptoini *authini)
474 struct fpu_kern_ctx *ctx;
475 int kt, ctxidx, error;
477 switch (ses->auth_algo) {
479 case CRYPTO_SHA1_HMAC:
480 case CRYPTO_SHA2_256_HMAC:
481 error = aesni_authprepare(ses, authini->cri_klen,
485 ses->mlen = authini->cri_mlen;
488 kt = is_fpu_kern_thread(0) || (encini == NULL);
490 ACQUIRE_CTX(ctxidx, ctx);
491 fpu_kern_enter(curthread, ctx,
492 FPU_KERN_NORMAL | FPU_KERN_KTHR);
497 error = aesni_cipher_setup_common(ses, encini->cri_key,
501 fpu_kern_leave(curthread, ctx);
502 RELEASE_CTX(ctxidx, ctx);
508 intel_sha1_update(void *vctx, const void *vdata, u_int datalen)
510 struct sha1_ctxt *ctx = vctx;
511 const char *data = vdata;
519 /* Do any aligned blocks without redundant copying. */
520 if (datalen >= 64 && ctx->count % 64 == 0) {
521 blocks = datalen / 64;
522 ctx->c.b64[0] += blocks * 64 * 8;
523 intel_sha1_step(ctx->h.b32, data + off, blocks);
527 while (off < datalen) {
528 gapstart = ctx->count % 64;
529 gaplen = 64 - gapstart;
531 copysiz = (gaplen < datalen - off) ? gaplen : datalen - off;
532 bcopy(&data[off], &ctx->m.b8[gapstart], copysiz);
533 ctx->count += copysiz;
535 ctx->c.b64[0] += copysiz * 8;
536 if (ctx->count % 64 == 0)
537 intel_sha1_step(ctx->h.b32, (void *)ctx->m.b8, 1);
544 SHA1_Init_fn(void *ctx)
550 SHA1_Finalize_fn(void *digest, void *ctx)
552 sha1_result(ctx, digest);
556 intel_sha256_update(void *vctx, const void *vdata, u_int len)
558 SHA256_CTX *ctx = vctx;
562 const unsigned char *src = vdata;
564 /* Number of bytes left in the buffer from previous updates */
565 r = (ctx->count >> 3) & 0x3f;
567 /* Convert the length into a number of bits */
570 /* Update number of bits */
571 ctx->count += bitlen;
573 /* Handle the case where we don't need to perform any transforms */
575 memcpy(&ctx->buf[r], src, len);
579 /* Finish the current block */
580 memcpy(&ctx->buf[r], src, 64 - r);
581 intel_sha256_step(ctx->state, ctx->buf, 1);
585 /* Perform complete blocks */
588 intel_sha256_step(ctx->state, src, blocks);
593 /* Copy left over data into buffer */
594 memcpy(ctx->buf, src, len);
599 SHA256_Init_fn(void *ctx)
605 SHA256_Finalize_fn(void *digest, void *ctx)
607 SHA256_Final(digest, ctx);
611 * Compute the HASH( (key ^ xorbyte) || buf )
614 hmac_internal(void *ctx, uint32_t *res,
615 int (*update)(void *, const void *, u_int),
616 void (*finalize)(void *, void *), uint8_t *key, uint8_t xorbyte,
617 const void *buf, size_t off, size_t buflen, int crpflags)
621 for (i = 0; i < 64; i++)
623 update(ctx, key, 64);
624 for (i = 0; i < 64; i++)
627 crypto_apply(crpflags, __DECONST(void *, buf), off, buflen,
628 __DECONST(int (*)(void *, void *, u_int), update), ctx);
633 aesni_cipher_process(struct aesni_session *ses, struct cryptodesc *enccrd,
634 struct cryptodesc *authcrd, struct cryptop *crp)
636 struct fpu_kern_ctx *ctx;
640 if (enccrd != NULL) {
641 if ((enccrd->crd_alg == CRYPTO_AES_ICM ||
642 enccrd->crd_alg == CRYPTO_AES_NIST_GCM_16) &&
643 (enccrd->crd_flags & CRD_F_IV_EXPLICIT) == 0)
650 kt = is_fpu_kern_thread(0);
652 ACQUIRE_CTX(ctxidx, ctx);
653 fpu_kern_enter(curthread, ctx,
654 FPU_KERN_NORMAL | FPU_KERN_KTHR);
658 if (enccrd != NULL && authcrd != NULL) {
659 /* Perform the first operation */
660 if (crp->crp_desc == enccrd)
661 error = aesni_cipher_crypt(ses, enccrd, authcrd, crp);
663 error = aesni_cipher_mac(ses, authcrd, crp);
666 /* Perform the second operation */
667 if (crp->crp_desc == enccrd)
668 error = aesni_cipher_mac(ses, authcrd, crp);
670 error = aesni_cipher_crypt(ses, enccrd, authcrd, crp);
671 } else if (enccrd != NULL)
672 error = aesni_cipher_crypt(ses, enccrd, authcrd, crp);
674 error = aesni_cipher_mac(ses, authcrd, crp);
681 fpu_kern_leave(curthread, ctx);
682 RELEASE_CTX(ctxidx, ctx);
688 aesni_cipher_crypt(struct aesni_session *ses, struct cryptodesc *enccrd,
689 struct cryptodesc *authcrd, struct cryptop *crp)
691 uint8_t iv[AES_BLOCK_LEN], tag[GMAC_DIGEST_LEN], *buf, *authbuf;
693 bool encflag, allocated, authallocated;
695 KASSERT(ses->algo != CRYPTO_AES_NIST_GCM_16 || authcrd != NULL,
696 ("AES_NIST_GCM_16 must include MAC descriptor"));
701 buf = aesni_cipher_alloc(enccrd, crp, &allocated);
705 authallocated = false;
706 if (ses->algo == CRYPTO_AES_NIST_GCM_16) {
707 authbuf = aesni_cipher_alloc(authcrd, crp, &authallocated);
708 if (authbuf == NULL) {
715 encflag = (enccrd->crd_flags & CRD_F_ENCRYPT) == CRD_F_ENCRYPT;
716 if ((enccrd->crd_flags & CRD_F_KEY_EXPLICIT) != 0) {
717 error = aesni_cipher_setup_common(ses, enccrd->crd_key,
723 switch (enccrd->crd_alg) {
726 ivlen = AES_BLOCK_LEN;
731 case CRYPTO_AES_NIST_GCM_16:
732 ivlen = 12; /* should support arbitarily larger */
738 if ((enccrd->crd_flags & CRD_F_IV_EXPLICIT) != 0)
739 bcopy(enccrd->crd_iv, iv, ivlen);
741 arc4rand(iv, ivlen, 0);
743 if ((enccrd->crd_flags & CRD_F_IV_PRESENT) == 0)
744 crypto_copyback(crp->crp_flags, crp->crp_buf,
745 enccrd->crd_inject, ivlen, iv);
747 if ((enccrd->crd_flags & CRD_F_IV_EXPLICIT) != 0)
748 bcopy(enccrd->crd_iv, iv, ivlen);
750 crypto_copydata(crp->crp_flags, crp->crp_buf,
751 enccrd->crd_inject, ivlen, iv);
757 aesni_encrypt_cbc(ses->rounds, ses->enc_schedule,
758 enccrd->crd_len, buf, buf, iv);
760 aesni_decrypt_cbc(ses->rounds, ses->dec_schedule,
761 enccrd->crd_len, buf, iv);
764 /* encryption & decryption are the same */
765 aesni_encrypt_icm(ses->rounds, ses->enc_schedule,
766 enccrd->crd_len, buf, buf, iv);
770 aesni_encrypt_xts(ses->rounds, ses->enc_schedule,
771 ses->xts_schedule, enccrd->crd_len, buf, buf,
774 aesni_decrypt_xts(ses->rounds, ses->dec_schedule,
775 ses->xts_schedule, enccrd->crd_len, buf, buf,
778 case CRYPTO_AES_NIST_GCM_16:
780 crypto_copydata(crp->crp_flags, crp->crp_buf,
781 authcrd->crd_inject, GMAC_DIGEST_LEN, tag);
783 bzero(tag, sizeof tag);
786 AES_GCM_encrypt(buf, buf, authbuf, iv, tag,
787 enccrd->crd_len, authcrd->crd_len, ivlen,
788 ses->enc_schedule, ses->rounds);
791 crypto_copyback(crp->crp_flags, crp->crp_buf,
792 authcrd->crd_inject, GMAC_DIGEST_LEN, tag);
794 if (!AES_GCM_decrypt(buf, buf, authbuf, iv, tag,
795 enccrd->crd_len, authcrd->crd_len, ivlen,
796 ses->enc_schedule, ses->rounds))
803 crypto_copyback(crp->crp_flags, crp->crp_buf, enccrd->crd_skip,
804 enccrd->crd_len, buf);
808 explicit_bzero(buf, enccrd->crd_len);
812 explicit_bzero(authbuf, authcrd->crd_len);
813 free(authbuf, M_AESNI);
819 aesni_cipher_mac(struct aesni_session *ses, struct cryptodesc *crd,
823 struct SHA256Context sha2 __aligned(16);
824 struct sha1_ctxt sha1 __aligned(16);
826 uint32_t res[SHA2_256_HASH_LEN / sizeof(uint32_t)];
829 void (*InitFn)(void *);
830 int (*UpdateFn)(void *, const void *, unsigned);
831 void (*FinalizeFn)(void *, void *);
835 if ((crd->crd_flags & ~CRD_F_KEY_EXPLICIT) != 0) {
836 CRYPTDEB("%s: Unsupported MAC flags: 0x%x", __func__,
837 (crd->crd_flags & ~CRD_F_KEY_EXPLICIT));
840 if ((crd->crd_flags & CRD_F_KEY_EXPLICIT) != 0) {
841 error = aesni_authprepare(ses, crd->crd_klen, crd->crd_key);
847 switch (ses->auth_algo) {
848 case CRYPTO_SHA1_HMAC:
852 hashlen = SHA1_HASH_LEN;
853 InitFn = SHA1_Init_fn;
854 UpdateFn = intel_sha1_update;
855 FinalizeFn = SHA1_Finalize_fn;
859 case CRYPTO_SHA2_256_HMAC:
861 hashlen = SHA2_256_HASH_LEN;
862 InitFn = SHA256_Init_fn;
863 UpdateFn = intel_sha256_update;
864 FinalizeFn = SHA256_Finalize_fn;
869 * AES-GMAC authentication is verified while processing the
876 /* Inner hash: (K ^ IPAD) || data */
878 hmac_internal(ctx, res, UpdateFn, FinalizeFn, ses->hmac_key,
879 0x36, crp->crp_buf, crd->crd_skip, crd->crd_len,
881 /* Outer hash: (K ^ OPAD) || inner hash */
883 hmac_internal(ctx, res, UpdateFn, FinalizeFn, ses->hmac_key,
884 0x5C, res, 0, hashlen, 0);
887 crypto_apply(crp->crp_flags, crp->crp_buf, crd->crd_skip,
888 crd->crd_len, __DECONST(int (*)(void *, void *, u_int),
890 FinalizeFn(res, ctx);
893 if (ses->mlen != 0 && ses->mlen < hashlen)
896 crypto_copyback(crp->crp_flags, crp->crp_buf, crd->crd_inject, hashlen,