2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2000 Michael Smith
5 * Copyright (c) 2001 Scott Long
6 * Copyright (c) 2000 BSDi
7 * Copyright (c) 2001-2010 Adaptec, Inc.
8 * Copyright (c) 2010-2012 PMC-Sierra, Inc.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
37 * Driver for the Adaptec by PMC Series 6,7,8,... families of RAID controllers
39 #define AAC_DRIVERNAME "aacraid"
41 #include "opt_aacraid.h"
43 /* #include <stddef.h> */
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/malloc.h>
47 #include <sys/kernel.h>
48 #include <sys/kthread.h>
50 #include <sys/sysctl.h>
51 #include <sys/sysent.h>
53 #include <sys/ioccom.h>
57 #include <sys/signalvar.h>
59 #include <sys/eventhandler.h>
62 #include <machine/bus.h>
63 #include <machine/resource.h>
65 #include <dev/pci/pcireg.h>
66 #include <dev/pci/pcivar.h>
68 #include <dev/aacraid/aacraid_reg.h>
69 #include <sys/aac_ioctl.h>
70 #include <dev/aacraid/aacraid_debug.h>
71 #include <dev/aacraid/aacraid_var.h>
72 #include <dev/aacraid/aacraid_endian.h>
74 #ifndef FILTER_HANDLED
75 #define FILTER_HANDLED 0x02
78 static void aac_add_container(struct aac_softc *sc,
79 struct aac_mntinforesp *mir, int f,
81 static void aac_get_bus_info(struct aac_softc *sc);
82 static void aac_container_bus(struct aac_softc *sc);
83 static void aac_daemon(void *arg);
84 static int aac_convert_sgraw2(struct aac_softc *sc, struct aac_raw_io2 *raw,
85 int pages, int nseg, int nseg_new);
87 /* Command Processing */
88 static void aac_timeout(struct aac_softc *sc);
89 static void aac_command_thread(struct aac_softc *sc);
90 static int aac_sync_fib(struct aac_softc *sc, u_int32_t command,
91 u_int32_t xferstate, struct aac_fib *fib,
93 /* Command Buffer Management */
94 static void aac_map_command_helper(void *arg, bus_dma_segment_t *segs,
96 static int aac_alloc_commands(struct aac_softc *sc);
97 static void aac_free_commands(struct aac_softc *sc);
98 static void aac_unmap_command(struct aac_command *cm);
100 /* Hardware Interface */
101 static int aac_alloc(struct aac_softc *sc);
102 static void aac_common_map(void *arg, bus_dma_segment_t *segs, int nseg,
104 static int aac_check_firmware(struct aac_softc *sc);
105 static void aac_define_int_mode(struct aac_softc *sc);
106 static int aac_init(struct aac_softc *sc);
107 static int aac_find_pci_capability(struct aac_softc *sc, int cap);
108 static int aac_setup_intr(struct aac_softc *sc);
109 static int aac_check_config(struct aac_softc *sc);
111 /* PMC SRC interface */
112 static int aac_src_get_fwstatus(struct aac_softc *sc);
113 static void aac_src_qnotify(struct aac_softc *sc, int qbit);
114 static int aac_src_get_istatus(struct aac_softc *sc);
115 static void aac_src_clear_istatus(struct aac_softc *sc, int mask);
116 static void aac_src_set_mailbox(struct aac_softc *sc, u_int32_t command,
117 u_int32_t arg0, u_int32_t arg1,
118 u_int32_t arg2, u_int32_t arg3);
119 static int aac_src_get_mailbox(struct aac_softc *sc, int mb);
120 static void aac_src_access_devreg(struct aac_softc *sc, int mode);
121 static int aac_src_send_command(struct aac_softc *sc, struct aac_command *cm);
122 static int aac_src_get_outb_queue(struct aac_softc *sc);
123 static void aac_src_set_outb_queue(struct aac_softc *sc, int index);
125 struct aac_interface aacraid_src_interface = {
126 aac_src_get_fwstatus,
129 aac_src_clear_istatus,
132 aac_src_access_devreg,
133 aac_src_send_command,
134 aac_src_get_outb_queue,
135 aac_src_set_outb_queue
138 /* PMC SRCv interface */
139 static void aac_srcv_set_mailbox(struct aac_softc *sc, u_int32_t command,
140 u_int32_t arg0, u_int32_t arg1,
141 u_int32_t arg2, u_int32_t arg3);
142 static int aac_srcv_get_mailbox(struct aac_softc *sc, int mb);
144 struct aac_interface aacraid_srcv_interface = {
145 aac_src_get_fwstatus,
148 aac_src_clear_istatus,
149 aac_srcv_set_mailbox,
150 aac_srcv_get_mailbox,
151 aac_src_access_devreg,
152 aac_src_send_command,
153 aac_src_get_outb_queue,
154 aac_src_set_outb_queue
157 /* Debugging and Diagnostics */
158 static struct aac_code_lookup aac_cpu_variant[] = {
159 {"i960JX", CPUI960_JX},
160 {"i960CX", CPUI960_CX},
161 {"i960HX", CPUI960_HX},
162 {"i960RX", CPUI960_RX},
163 {"i960 80303", CPUI960_80303},
164 {"StrongARM SA110", CPUARM_SA110},
165 {"PPC603e", CPUPPC_603e},
166 {"XScale 80321", CPU_XSCALE_80321},
167 {"MIPS 4KC", CPU_MIPS_4KC},
168 {"MIPS 5KC", CPU_MIPS_5KC},
169 {"Unknown StrongARM", CPUARM_xxx},
170 {"Unknown PowerPC", CPUPPC_xxx},
172 {"Unknown processor", 0}
175 static struct aac_code_lookup aac_battery_platform[] = {
176 {"required battery present", PLATFORM_BAT_REQ_PRESENT},
177 {"REQUIRED BATTERY NOT PRESENT", PLATFORM_BAT_REQ_NOTPRESENT},
178 {"optional battery present", PLATFORM_BAT_OPT_PRESENT},
179 {"optional battery not installed", PLATFORM_BAT_OPT_NOTPRESENT},
180 {"no battery support", PLATFORM_BAT_NOT_SUPPORTED},
182 {"unknown battery platform", 0}
184 static void aac_describe_controller(struct aac_softc *sc);
185 static char *aac_describe_code(struct aac_code_lookup *table,
188 /* Management Interface */
189 static d_open_t aac_open;
190 static d_ioctl_t aac_ioctl;
191 static d_poll_t aac_poll;
192 static void aac_cdevpriv_dtor(void *arg);
193 static int aac_ioctl_sendfib(struct aac_softc *sc, caddr_t ufib);
194 static int aac_ioctl_send_raw_srb(struct aac_softc *sc, caddr_t arg);
195 static void aac_handle_aif(struct aac_softc *sc, struct aac_fib *fib);
196 static void aac_request_aif(struct aac_softc *sc);
197 static int aac_rev_check(struct aac_softc *sc, caddr_t udata);
198 static int aac_open_aif(struct aac_softc *sc, caddr_t arg);
199 static int aac_close_aif(struct aac_softc *sc, caddr_t arg);
200 static int aac_getnext_aif(struct aac_softc *sc, caddr_t arg);
201 static int aac_return_aif(struct aac_softc *sc,
202 struct aac_fib_context *ctx, caddr_t uptr);
203 static int aac_query_disk(struct aac_softc *sc, caddr_t uptr);
204 static int aac_get_pci_info(struct aac_softc *sc, caddr_t uptr);
205 static int aac_supported_features(struct aac_softc *sc, caddr_t uptr);
206 static void aac_ioctl_event(struct aac_softc *sc,
207 struct aac_event *event, void *arg);
208 static int aac_reset_adapter(struct aac_softc *sc);
209 static int aac_get_container_info(struct aac_softc *sc,
210 struct aac_fib *fib, int cid,
211 struct aac_mntinforesp *mir,
214 aac_check_adapter_health(struct aac_softc *sc, u_int8_t *bled);
216 static struct cdevsw aacraid_cdevsw = {
217 .d_version = D_VERSION,
220 .d_ioctl = aac_ioctl,
225 MALLOC_DEFINE(M_AACRAIDBUF, "aacraid_buf", "Buffers for the AACRAID driver");
228 SYSCTL_NODE(_hw, OID_AUTO, aacraid, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
229 "AACRAID driver parameters");
236 * Initialize the controller and softc
239 aacraid_attach(struct aac_softc *sc)
243 struct aac_mntinforesp mir;
244 int count = 0, i = 0;
247 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
248 sc->hint_flags = device_get_flags(sc->aac_dev);
250 * Initialize per-controller queues.
256 /* mark controller as suspended until we get ourselves organised */
257 sc->aac_state |= AAC_STATE_SUSPEND;
260 * Check that the firmware on the card is supported.
262 sc->msi_enabled = sc->msi_tupelo = FALSE;
263 if ((error = aac_check_firmware(sc)) != 0)
269 mtx_init(&sc->aac_io_lock, "AACRAID I/O lock", NULL, MTX_DEF);
270 TAILQ_INIT(&sc->aac_container_tqh);
271 TAILQ_INIT(&sc->aac_ev_cmfree);
273 /* Initialize the clock daemon callout. */
274 callout_init_mtx(&sc->aac_daemontime, &sc->aac_io_lock, 0);
277 * Initialize the adapter.
279 if ((error = aac_alloc(sc)) != 0)
281 aac_define_int_mode(sc);
282 if (!(sc->flags & AAC_FLAGS_SYNC_MODE)) {
283 if ((error = aac_init(sc)) != 0)
288 * Allocate and connect our interrupt.
290 if ((error = aac_setup_intr(sc)) != 0)
294 * Print a little information about the controller.
296 aac_describe_controller(sc);
299 * Make the control device.
301 unit = device_get_unit(sc->aac_dev);
302 sc->aac_dev_t = make_dev(&aacraid_cdevsw, unit, UID_ROOT, GID_OPERATOR,
303 0640, "aacraid%d", unit);
304 sc->aac_dev_t->si_drv1 = sc;
306 /* Create the AIF thread */
307 if (aac_kthread_create((void(*)(void *))aac_command_thread, sc,
308 &sc->aifthread, 0, 0, "aacraid%daif", unit))
309 panic("Could not create AIF thread");
311 /* Register the shutdown method to only be called post-dump */
312 if ((sc->eh = EVENTHANDLER_REGISTER(shutdown_final, aacraid_shutdown,
313 sc->aac_dev, SHUTDOWN_PRI_DEFAULT)) == NULL)
314 device_printf(sc->aac_dev,
315 "shutdown event registration failed\n");
317 /* Find containers */
318 mtx_lock(&sc->aac_io_lock);
319 aac_alloc_sync_fib(sc, &fib);
320 /* loop over possible containers */
322 if ((aac_get_container_info(sc, fib, i, &mir, &uid)) != 0)
325 count = mir.MntRespCount;
326 aac_add_container(sc, &mir, 0, uid);
328 } while ((i < count) && (i < AAC_MAX_CONTAINERS));
329 aac_release_sync_fib(sc);
330 mtx_unlock(&sc->aac_io_lock);
332 /* Register with CAM for the containers */
333 TAILQ_INIT(&sc->aac_sim_tqh);
334 aac_container_bus(sc);
335 /* Register with CAM for the non-DASD devices */
336 if ((sc->flags & AAC_FLAGS_ENABLE_CAM) != 0)
337 aac_get_bus_info(sc);
339 /* poke the bus to actually attach the child devices */
340 bus_generic_attach(sc->aac_dev);
342 /* mark the controller up */
343 sc->aac_state &= ~AAC_STATE_SUSPEND;
345 /* enable interrupts now */
346 AAC_ACCESS_DEVREG(sc, AAC_ENABLE_INTERRUPT);
348 mtx_lock(&sc->aac_io_lock);
349 callout_reset(&sc->aac_daemontime, 60 * hz, aac_daemon, sc);
350 mtx_unlock(&sc->aac_io_lock);
356 aac_daemon(void *arg)
358 struct aac_softc *sc;
360 struct aac_command *cm;
364 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
366 mtx_assert(&sc->aac_io_lock, MA_OWNED);
367 if (callout_pending(&sc->aac_daemontime) ||
368 callout_active(&sc->aac_daemontime) == 0)
372 if (!aacraid_alloc_command(sc, &cm)) {
374 cm->cm_timestamp = time_uptime;
376 cm->cm_flags |= AAC_CMD_WAIT;
379 sizeof(struct aac_fib_header) + sizeof(u_int32_t);
380 fib->Header.XferState =
381 AAC_FIBSTATE_HOSTOWNED |
382 AAC_FIBSTATE_INITIALISED |
384 AAC_FIBSTATE_FROMHOST |
385 AAC_FIBSTATE_REXPECTED |
388 AAC_FIBSTATE_FAST_RESPONSE;
389 fib->Header.Command = SendHostTime;
390 *(uint32_t *)fib->data = htole32(tv.tv_sec);
392 aacraid_map_command_sg(cm, NULL, 0, 0);
393 aacraid_release_command(cm);
396 callout_schedule(&sc->aac_daemontime, 30 * 60 * hz);
400 aacraid_add_event(struct aac_softc *sc, struct aac_event *event)
403 switch (event->ev_type & AAC_EVENT_MASK) {
404 case AAC_EVENT_CMFREE:
405 TAILQ_INSERT_TAIL(&sc->aac_ev_cmfree, event, ev_links);
408 device_printf(sc->aac_dev, "aac_add event: unknown event %d\n",
417 * Request information of container #cid
420 aac_get_container_info(struct aac_softc *sc, struct aac_fib *sync_fib, int cid,
421 struct aac_mntinforesp *mir, u_int32_t *uid)
423 struct aac_command *cm;
425 struct aac_mntinfo *mi;
426 struct aac_cnt_config *ccfg;
429 if (sync_fib == NULL) {
430 if (aacraid_alloc_command(sc, &cm)) {
431 device_printf(sc->aac_dev,
432 "Warning, no free command available\n");
440 mi = (struct aac_mntinfo *)&fib->data[0];
441 /* 4KB support?, 64-bit LBA? */
442 if (sc->aac_support_opt2 & AAC_SUPPORTED_VARIABLE_BLOCK_SIZE)
443 mi->Command = VM_NameServeAllBlk;
444 else if (sc->flags & AAC_FLAGS_LBA_64BIT)
445 mi->Command = VM_NameServe64;
447 mi->Command = VM_NameServe;
448 mi->MntType = FT_FILESYS;
450 aac_mntinfo_tole(mi);
453 if (aac_sync_fib(sc, ContainerCommand, 0, fib,
454 sizeof(struct aac_mntinfo))) {
455 device_printf(sc->aac_dev, "Error probing container %d\n", cid);
459 cm->cm_timestamp = time_uptime;
463 sizeof(struct aac_fib_header) + sizeof(struct aac_mntinfo);
464 fib->Header.XferState =
465 AAC_FIBSTATE_HOSTOWNED |
466 AAC_FIBSTATE_INITIALISED |
468 AAC_FIBSTATE_FROMHOST |
469 AAC_FIBSTATE_REXPECTED |
472 AAC_FIBSTATE_FAST_RESPONSE;
473 fib->Header.Command = ContainerCommand;
474 if (aacraid_wait_command(cm) != 0) {
475 device_printf(sc->aac_dev, "Error probing container %d\n", cid);
476 aacraid_release_command(cm);
480 bcopy(&fib->data[0], mir, sizeof(struct aac_mntinforesp));
481 aac_mntinforesp_toh(mir);
485 if (mir->MntTable[0].VolType != CT_NONE &&
486 !(mir->MntTable[0].ContentState & AAC_FSCS_HIDDEN)) {
487 if (!(sc->aac_support_opt2 & AAC_SUPPORTED_VARIABLE_BLOCK_SIZE)) {
488 mir->MntTable[0].ObjExtension.BlockDevice.BlockSize = 0x200;
489 mir->MntTable[0].ObjExtension.BlockDevice.bdLgclPhysMap = 0;
491 ccfg = (struct aac_cnt_config *)&fib->data[0];
492 bzero(ccfg, sizeof (*ccfg) - CT_PACKET_SIZE);
493 ccfg->Command = VM_ContainerConfig;
494 ccfg->CTCommand.command = CT_CID_TO_32BITS_UID;
495 ccfg->CTCommand.param[0] = cid;
496 aac_cnt_config_tole(ccfg);
499 rval = aac_sync_fib(sc, ContainerCommand, 0, fib,
500 sizeof(struct aac_cnt_config));
501 aac_cnt_config_toh(ccfg);
502 if (rval == 0 && ccfg->Command == ST_OK &&
503 ccfg->CTCommand.param[0] == CT_OK &&
504 mir->MntTable[0].VolType != CT_PASSTHRU)
505 *uid = ccfg->CTCommand.param[1];
508 sizeof(struct aac_fib_header) + sizeof(struct aac_cnt_config);
509 fib->Header.XferState =
510 AAC_FIBSTATE_HOSTOWNED |
511 AAC_FIBSTATE_INITIALISED |
513 AAC_FIBSTATE_FROMHOST |
514 AAC_FIBSTATE_REXPECTED |
517 AAC_FIBSTATE_FAST_RESPONSE;
518 fib->Header.Command = ContainerCommand;
519 rval = aacraid_wait_command(cm);
520 aac_cnt_config_toh(ccfg);
521 if (rval == 0 && ccfg->Command == ST_OK &&
522 ccfg->CTCommand.param[0] == CT_OK &&
523 mir->MntTable[0].VolType != CT_PASSTHRU)
524 *uid = ccfg->CTCommand.param[1];
525 aacraid_release_command(cm);
533 * Create a device to represent a new container
536 aac_add_container(struct aac_softc *sc, struct aac_mntinforesp *mir, int f,
539 struct aac_container *co;
541 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
544 * Check container volume type for validity. Note that many of
545 * the possible types may never show up.
547 if ((mir->Status == ST_OK) && (mir->MntTable[0].VolType != CT_NONE)) {
548 co = (struct aac_container *)malloc(sizeof *co, M_AACRAIDBUF,
551 panic("Out of memory?!");
555 bcopy(&mir->MntTable[0], &co->co_mntobj,
556 sizeof(struct aac_mntobj));
558 TAILQ_INSERT_TAIL(&sc->aac_container_tqh, co, co_link);
563 * Allocate resources associated with (sc)
566 aac_alloc(struct aac_softc *sc)
570 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
573 * Create DMA tag for mapping buffers into controller-addressable space.
575 if (bus_dma_tag_create(sc->aac_parent_dmat, /* parent */
576 1, 0, /* algnmnt, boundary */
577 (sc->flags & AAC_FLAGS_SG_64BIT) ?
579 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
580 BUS_SPACE_MAXADDR, /* highaddr */
581 NULL, NULL, /* filter, filterarg */
582 sc->aac_max_sectors << 9, /* maxsize */
583 sc->aac_sg_tablesize, /* nsegments */
584 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
585 BUS_DMA_ALLOCNOW, /* flags */
586 busdma_lock_mutex, /* lockfunc */
587 &sc->aac_io_lock, /* lockfuncarg */
588 &sc->aac_buffer_dmat)) {
589 device_printf(sc->aac_dev, "can't allocate buffer DMA tag\n");
594 * Create DMA tag for mapping FIBs into controller-addressable space..
596 if (sc->flags & AAC_FLAGS_NEW_COMM_TYPE1)
597 maxsize = sc->aac_max_fibs_alloc * (sc->aac_max_fib_size +
598 sizeof(struct aac_fib_xporthdr) + 31);
600 maxsize = sc->aac_max_fibs_alloc * (sc->aac_max_fib_size + 31);
601 if (bus_dma_tag_create(sc->aac_parent_dmat, /* parent */
602 1, 0, /* algnmnt, boundary */
603 (sc->flags & AAC_FLAGS_4GB_WINDOW) ?
604 BUS_SPACE_MAXADDR_32BIT :
605 0x7fffffff, /* lowaddr */
606 BUS_SPACE_MAXADDR, /* highaddr */
607 NULL, NULL, /* filter, filterarg */
608 maxsize, /* maxsize */
610 maxsize, /* maxsize */
612 NULL, NULL, /* No locking needed */
613 &sc->aac_fib_dmat)) {
614 device_printf(sc->aac_dev, "can't allocate FIB DMA tag\n");
619 * Create DMA tag for the common structure and allocate it.
621 maxsize = sizeof(struct aac_common);
622 maxsize += sc->aac_max_fibs * sizeof(u_int32_t);
623 if (bus_dma_tag_create(sc->aac_parent_dmat, /* parent */
624 1, 0, /* algnmnt, boundary */
625 (sc->flags & AAC_FLAGS_4GB_WINDOW) ?
626 BUS_SPACE_MAXADDR_32BIT :
627 0x7fffffff, /* lowaddr */
628 BUS_SPACE_MAXADDR, /* highaddr */
629 NULL, NULL, /* filter, filterarg */
630 maxsize, /* maxsize */
632 maxsize, /* maxsegsize */
634 NULL, NULL, /* No locking needed */
635 &sc->aac_common_dmat)) {
636 device_printf(sc->aac_dev,
637 "can't allocate common structure DMA tag\n");
640 if (bus_dmamem_alloc(sc->aac_common_dmat, (void **)&sc->aac_common,
641 BUS_DMA_NOWAIT, &sc->aac_common_dmamap)) {
642 device_printf(sc->aac_dev, "can't allocate common structure\n");
646 (void)bus_dmamap_load(sc->aac_common_dmat, sc->aac_common_dmamap,
647 sc->aac_common, maxsize,
648 aac_common_map, sc, 0);
649 bzero(sc->aac_common, maxsize);
651 /* Allocate some FIBs and associated command structs */
652 TAILQ_INIT(&sc->aac_fibmap_tqh);
653 sc->aac_commands = malloc(sc->aac_max_fibs * sizeof(struct aac_command),
654 M_AACRAIDBUF, M_WAITOK|M_ZERO);
655 mtx_lock(&sc->aac_io_lock);
656 while (sc->total_fibs < sc->aac_max_fibs) {
657 if (aac_alloc_commands(sc) != 0)
660 mtx_unlock(&sc->aac_io_lock);
661 if (sc->total_fibs == 0)
668 * Free all of the resources associated with (sc)
670 * Should not be called if the controller is active.
673 aacraid_free(struct aac_softc *sc)
677 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
679 /* remove the control device */
680 if (sc->aac_dev_t != NULL)
681 destroy_dev(sc->aac_dev_t);
683 /* throw away any FIB buffers, discard the FIB DMA tag */
684 aac_free_commands(sc);
685 if (sc->aac_fib_dmat)
686 bus_dma_tag_destroy(sc->aac_fib_dmat);
688 free(sc->aac_commands, M_AACRAIDBUF);
690 /* destroy the common area */
691 if (sc->aac_common) {
692 bus_dmamap_unload(sc->aac_common_dmat, sc->aac_common_dmamap);
693 bus_dmamem_free(sc->aac_common_dmat, sc->aac_common,
694 sc->aac_common_dmamap);
696 if (sc->aac_common_dmat)
697 bus_dma_tag_destroy(sc->aac_common_dmat);
699 /* disconnect the interrupt handler */
700 for (i = 0; i < AAC_MAX_MSIX; ++i) {
702 bus_teardown_intr(sc->aac_dev,
703 sc->aac_irq[i], sc->aac_intr[i]);
705 bus_release_resource(sc->aac_dev, SYS_RES_IRQ,
706 sc->aac_irq_rid[i], sc->aac_irq[i]);
710 if (sc->msi_enabled || sc->msi_tupelo)
711 pci_release_msi(sc->aac_dev);
713 /* destroy data-transfer DMA tag */
714 if (sc->aac_buffer_dmat)
715 bus_dma_tag_destroy(sc->aac_buffer_dmat);
717 /* destroy the parent DMA tag */
718 if (sc->aac_parent_dmat)
719 bus_dma_tag_destroy(sc->aac_parent_dmat);
721 /* release the register window mapping */
722 if (sc->aac_regs_res0 != NULL)
723 bus_release_resource(sc->aac_dev, SYS_RES_MEMORY,
724 sc->aac_regs_rid0, sc->aac_regs_res0);
725 if (sc->aac_regs_res1 != NULL)
726 bus_release_resource(sc->aac_dev, SYS_RES_MEMORY,
727 sc->aac_regs_rid1, sc->aac_regs_res1);
731 * Disconnect from the controller completely, in preparation for unload.
734 aacraid_detach(device_t dev)
736 struct aac_softc *sc;
737 struct aac_container *co;
741 sc = device_get_softc(dev);
742 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
744 callout_drain(&sc->aac_daemontime);
745 /* Remove the child containers */
746 while ((co = TAILQ_FIRST(&sc->aac_container_tqh)) != NULL) {
747 TAILQ_REMOVE(&sc->aac_container_tqh, co, co_link);
748 free(co, M_AACRAIDBUF);
751 /* Remove the CAM SIMs */
752 while ((sim = TAILQ_FIRST(&sc->aac_sim_tqh)) != NULL) {
753 TAILQ_REMOVE(&sc->aac_sim_tqh, sim, sim_link);
754 error = device_delete_child(dev, sim->sim_dev);
757 free(sim, M_AACRAIDBUF);
760 if (sc->aifflags & AAC_AIFFLAGS_RUNNING) {
761 sc->aifflags |= AAC_AIFFLAGS_EXIT;
762 wakeup(sc->aifthread);
763 tsleep(sc->aac_dev, PUSER | PCATCH, "aac_dch", 30 * hz);
766 if (sc->aifflags & AAC_AIFFLAGS_RUNNING)
767 panic("Cannot shutdown AIF thread");
769 if ((error = aacraid_shutdown(dev)))
772 EVENTHANDLER_DEREGISTER(shutdown_final, sc->eh);
776 mtx_destroy(&sc->aac_io_lock);
782 * Bring the controller down to a dormant state and detach all child devices.
784 * This function is called before detach or system shutdown.
786 * Note that we can assume that the bioq on the controller is empty, as we won't
787 * allow shutdown if any device is open.
790 aacraid_shutdown(device_t dev)
792 struct aac_softc *sc;
794 struct aac_close_command *cc;
796 sc = device_get_softc(dev);
797 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
799 sc->aac_state |= AAC_STATE_SUSPEND;
802 * Send a Container shutdown followed by a HostShutdown FIB to the
803 * controller to convince it that we don't want to talk to it anymore.
804 * We've been closed and all I/O completed already
806 device_printf(sc->aac_dev, "shutting down controller...");
808 mtx_lock(&sc->aac_io_lock);
809 aac_alloc_sync_fib(sc, &fib);
810 cc = (struct aac_close_command *)&fib->data[0];
812 bzero(cc, sizeof(struct aac_close_command));
813 cc->Command = htole32(VM_CloseAll);
814 cc->ContainerId = htole32(0xfffffffe);
815 if (aac_sync_fib(sc, ContainerCommand, 0, fib,
816 sizeof(struct aac_close_command)))
821 AAC_ACCESS_DEVREG(sc, AAC_DISABLE_INTERRUPT);
822 aac_release_sync_fib(sc);
823 mtx_unlock(&sc->aac_io_lock);
829 * Bring the controller to a quiescent state, ready for system suspend.
832 aacraid_suspend(device_t dev)
834 struct aac_softc *sc;
836 sc = device_get_softc(dev);
838 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
839 sc->aac_state |= AAC_STATE_SUSPEND;
841 AAC_ACCESS_DEVREG(sc, AAC_DISABLE_INTERRUPT);
846 * Bring the controller back to a state ready for operation.
849 aacraid_resume(device_t dev)
851 struct aac_softc *sc;
853 sc = device_get_softc(dev);
855 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
856 sc->aac_state &= ~AAC_STATE_SUSPEND;
857 AAC_ACCESS_DEVREG(sc, AAC_ENABLE_INTERRUPT);
862 * Interrupt handler for NEW_COMM_TYPE1, NEW_COMM_TYPE2, NEW_COMM_TYPE34 interface.
865 aacraid_new_intr_type1(void *arg)
867 struct aac_msix_ctx *ctx;
868 struct aac_softc *sc;
870 struct aac_command *cm;
872 u_int32_t bellbits, bellbits_shifted, index, handle;
873 int isFastResponse, isAif, noMoreAif, mode;
875 ctx = (struct aac_msix_ctx *)arg;
877 vector_no = ctx->vector_no;
879 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
880 mtx_lock(&sc->aac_io_lock);
882 if (sc->msi_enabled) {
883 mode = AAC_INT_MODE_MSI;
884 if (vector_no == 0) {
885 bellbits = AAC_MEM0_GETREG4(sc, AAC_SRC_ODBR_MSI);
886 if (bellbits & 0x40000)
887 mode |= AAC_INT_MODE_AIF;
888 else if (bellbits & 0x1000)
889 mode |= AAC_INT_MODE_SYNC;
892 mode = AAC_INT_MODE_INTX;
893 bellbits = AAC_MEM0_GETREG4(sc, AAC_SRC_ODBR_R);
894 if (bellbits & AAC_DB_RESPONSE_SENT_NS) {
895 bellbits = AAC_DB_RESPONSE_SENT_NS;
896 AAC_MEM0_SETREG4(sc, AAC_SRC_ODBR_C, bellbits);
898 bellbits_shifted = (bellbits >> AAC_SRC_ODR_SHIFT);
899 AAC_MEM0_SETREG4(sc, AAC_SRC_ODBR_C, bellbits);
900 if (bellbits_shifted & AAC_DB_AIF_PENDING)
901 mode |= AAC_INT_MODE_AIF;
902 if (bellbits_shifted & AAC_DB_SYNC_COMMAND)
903 mode |= AAC_INT_MODE_SYNC;
905 /* ODR readback, Prep #238630 */
906 AAC_MEM0_GETREG4(sc, AAC_SRC_ODBR_R);
909 if (mode & AAC_INT_MODE_SYNC) {
910 if (sc->aac_sync_cm) {
911 cm = sc->aac_sync_cm;
912 aac_unmap_command(cm);
913 cm->cm_flags |= AAC_CMD_COMPLETED;
914 aac_fib_header_toh(&cm->cm_fib->Header);
916 /* is there a completion handler? */
917 if (cm->cm_complete != NULL) {
920 /* assume that someone is sleeping on this command */
923 sc->flags &= ~AAC_QUEUE_FRZN;
924 sc->aac_sync_cm = NULL;
926 if (mode & AAC_INT_MODE_INTX)
927 mode &= ~AAC_INT_MODE_SYNC;
932 if (mode & AAC_INT_MODE_AIF) {
933 if (mode & AAC_INT_MODE_INTX) {
939 if (sc->flags & AAC_FLAGS_SYNC_MODE)
943 /* handle async. status */
944 index = sc->aac_host_rrq_idx[vector_no];
946 isFastResponse = isAif = noMoreAif = 0;
947 /* remove toggle bit (31) */
948 handle = (le32toh(sc->aac_common->ac_host_rrq[index]) &
950 /* check fast response bit (30) */
951 if (handle & 0x40000000)
953 /* check AIF bit (23) */
954 else if (handle & 0x00800000)
956 handle &= 0x0000ffff;
960 cm = sc->aac_commands + (handle - 1);
962 aac_fib_header_toh(&fib->Header);
963 sc->aac_rrq_outstanding[vector_no]--;
965 noMoreAif = (fib->Header.XferState & AAC_FIBSTATE_NOMOREAIF) ? 1:0;
967 aac_handle_aif(sc, fib);
969 aacraid_release_command(cm);
971 if (isFastResponse) {
972 fib->Header.XferState |= AAC_FIBSTATE_DONEADAP;
973 *((u_int32_t *)(fib->data)) = htole32(ST_OK);
974 cm->cm_flags |= AAC_CMD_FASTRESP;
977 aac_unmap_command(cm);
978 cm->cm_flags |= AAC_CMD_COMPLETED;
980 /* is there a completion handler? */
981 if (cm->cm_complete != NULL) {
984 /* assume that someone is sleeping on this command */
987 sc->flags &= ~AAC_QUEUE_FRZN;
990 sc->aac_common->ac_host_rrq[index++] = 0;
991 if (index == (vector_no + 1) * sc->aac_vector_cap)
992 index = vector_no * sc->aac_vector_cap;
993 sc->aac_host_rrq_idx[vector_no] = index;
995 if ((isAif && !noMoreAif) || sc->aif_pending)
1000 if (mode & AAC_INT_MODE_AIF) {
1001 aac_request_aif(sc);
1002 AAC_ACCESS_DEVREG(sc, AAC_CLEAR_AIF_BIT);
1006 /* see if we can start some more I/O */
1007 if ((sc->flags & AAC_QUEUE_FRZN) == 0)
1008 aacraid_startio(sc);
1009 mtx_unlock(&sc->aac_io_lock);
1013 * Handle notification of one or more FIBs coming from the controller.
1016 aac_command_thread(struct aac_softc *sc)
1020 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
1022 mtx_lock(&sc->aac_io_lock);
1023 sc->aifflags = AAC_AIFFLAGS_RUNNING;
1025 while ((sc->aifflags & AAC_AIFFLAGS_EXIT) == 0) {
1028 if ((sc->aifflags & AAC_AIFFLAGS_PENDING) == 0)
1029 retval = msleep(sc->aifthread, &sc->aac_io_lock, PRIBIO,
1030 "aacraid_aifthd", AAC_PERIODIC_INTERVAL * hz);
1033 * First see if any FIBs need to be allocated.
1035 if ((sc->aifflags & AAC_AIFFLAGS_ALLOCFIBS) != 0) {
1036 aac_alloc_commands(sc);
1037 sc->aifflags &= ~AAC_AIFFLAGS_ALLOCFIBS;
1038 aacraid_startio(sc);
1042 * While we're here, check to see if any commands are stuck.
1043 * This is pretty low-priority, so it's ok if it doesn't
1046 if (retval == EWOULDBLOCK)
1049 /* Check the hardware printf message buffer */
1050 if (sc->aac_common->ac_printf[0] != 0)
1051 aac_print_printf(sc);
1053 sc->aifflags &= ~AAC_AIFFLAGS_RUNNING;
1054 mtx_unlock(&sc->aac_io_lock);
1055 wakeup(sc->aac_dev);
1057 aac_kthread_exit(0);
1061 * Submit a command to the controller, return when it completes.
1062 * XXX This is very dangerous! If the card has gone out to lunch, we could
1063 * be stuck here forever. At the same time, signals are not caught
1064 * because there is a risk that a signal could wakeup the sleep before
1065 * the card has a chance to complete the command. Since there is no way
1066 * to cancel a command that is in progress, we can't protect against the
1067 * card completing a command late and spamming the command and data
1068 * memory. So, we are held hostage until the command completes.
1071 aacraid_wait_command(struct aac_command *cm)
1073 struct aac_softc *sc;
1077 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
1078 mtx_assert(&sc->aac_io_lock, MA_OWNED);
1080 /* Put the command on the ready queue and get things going */
1081 aac_enqueue_ready(cm);
1082 aacraid_startio(sc);
1083 error = msleep(cm, &sc->aac_io_lock, PRIBIO, "aacraid_wait", 0);
1088 *Command Buffer Management
1092 * Allocate a command.
1095 aacraid_alloc_command(struct aac_softc *sc, struct aac_command **cmp)
1097 struct aac_command *cm;
1099 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
1101 if ((cm = aac_dequeue_free(sc)) == NULL) {
1102 if (sc->total_fibs < sc->aac_max_fibs) {
1103 sc->aifflags |= AAC_AIFFLAGS_ALLOCFIBS;
1104 wakeup(sc->aifthread);
1114 * Release a command back to the freelist.
1117 aacraid_release_command(struct aac_command *cm)
1119 struct aac_event *event;
1120 struct aac_softc *sc;
1123 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
1124 mtx_assert(&sc->aac_io_lock, MA_OWNED);
1126 /* (re)initialize the command/FIB */
1127 cm->cm_sgtable = NULL;
1129 cm->cm_complete = NULL;
1131 cm->cm_passthr_dmat = 0;
1132 cm->cm_fib->Header.XferState = AAC_FIBSTATE_EMPTY;
1133 cm->cm_fib->Header.StructType = AAC_FIBTYPE_TFIB;
1134 cm->cm_fib->Header.Unused = 0;
1135 cm->cm_fib->Header.SenderSize = cm->cm_sc->aac_max_fib_size;
1138 * These are duplicated in aac_start to cover the case where an
1139 * intermediate stage may have destroyed them. They're left
1140 * initialized here for debugging purposes only.
1142 cm->cm_fib->Header.u.ReceiverFibAddress = (u_int32_t)cm->cm_fibphys;
1143 cm->cm_fib->Header.Handle = 0;
1145 aac_enqueue_free(cm);
1148 * Dequeue all events so that there's no risk of events getting
1151 while ((event = TAILQ_FIRST(&sc->aac_ev_cmfree)) != NULL) {
1152 TAILQ_REMOVE(&sc->aac_ev_cmfree, event, ev_links);
1153 event->ev_callback(sc, event, event->ev_arg);
1158 * Map helper for command/FIB allocation.
1161 aac_map_command_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1165 fibphys = (uint64_t *)arg;
1167 *fibphys = segs[0].ds_addr;
1171 * Allocate and initialize commands/FIBs for this adapter.
1174 aac_alloc_commands(struct aac_softc *sc)
1176 struct aac_command *cm;
1177 struct aac_fibmap *fm;
1182 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
1183 mtx_assert(&sc->aac_io_lock, MA_OWNED);
1185 if (sc->total_fibs + sc->aac_max_fibs_alloc > sc->aac_max_fibs)
1188 fm = malloc(sizeof(struct aac_fibmap), M_AACRAIDBUF, M_NOWAIT|M_ZERO);
1192 mtx_unlock(&sc->aac_io_lock);
1193 /* allocate the FIBs in DMAable memory and load them */
1194 if (bus_dmamem_alloc(sc->aac_fib_dmat, (void **)&fm->aac_fibs,
1195 BUS_DMA_NOWAIT, &fm->aac_fibmap)) {
1196 device_printf(sc->aac_dev,
1197 "Not enough contiguous memory available.\n");
1198 free(fm, M_AACRAIDBUF);
1199 mtx_lock(&sc->aac_io_lock);
1203 maxsize = sc->aac_max_fib_size + 31;
1204 if (sc->flags & AAC_FLAGS_NEW_COMM_TYPE1)
1205 maxsize += sizeof(struct aac_fib_xporthdr);
1206 /* Ignore errors since this doesn't bounce */
1207 (void)bus_dmamap_load(sc->aac_fib_dmat, fm->aac_fibmap, fm->aac_fibs,
1208 sc->aac_max_fibs_alloc * maxsize,
1209 aac_map_command_helper, &fibphys, 0);
1210 mtx_lock(&sc->aac_io_lock);
1212 /* initialize constant fields in the command structure */
1213 bzero(fm->aac_fibs, sc->aac_max_fibs_alloc * maxsize);
1214 for (i = 0; i < sc->aac_max_fibs_alloc; i++) {
1215 cm = sc->aac_commands + sc->total_fibs;
1216 fm->aac_commands = cm;
1218 cm->cm_fib = (struct aac_fib *)
1219 ((u_int8_t *)fm->aac_fibs + i * maxsize);
1220 cm->cm_fibphys = fibphys + i * maxsize;
1221 if (sc->flags & AAC_FLAGS_NEW_COMM_TYPE1) {
1222 u_int64_t fibphys_aligned;
1224 (cm->cm_fibphys + sizeof(struct aac_fib_xporthdr) + 31) & ~31;
1225 cm->cm_fib = (struct aac_fib *)
1226 ((u_int8_t *)cm->cm_fib + (fibphys_aligned - cm->cm_fibphys));
1227 cm->cm_fibphys = fibphys_aligned;
1229 u_int64_t fibphys_aligned;
1230 fibphys_aligned = (cm->cm_fibphys + 31) & ~31;
1231 cm->cm_fib = (struct aac_fib *)
1232 ((u_int8_t *)cm->cm_fib + (fibphys_aligned - cm->cm_fibphys));
1233 cm->cm_fibphys = fibphys_aligned;
1235 cm->cm_index = sc->total_fibs;
1237 if ((error = bus_dmamap_create(sc->aac_buffer_dmat, 0,
1238 &cm->cm_datamap)) != 0)
1240 if (sc->aac_max_fibs <= 1 || sc->aac_max_fibs - sc->total_fibs > 1)
1241 aacraid_release_command(cm);
1246 TAILQ_INSERT_TAIL(&sc->aac_fibmap_tqh, fm, fm_link);
1247 fwprintf(sc, HBA_FLAGS_DBG_COMM_B, "total_fibs= %d\n", sc->total_fibs);
1251 bus_dmamap_unload(sc->aac_fib_dmat, fm->aac_fibmap);
1252 bus_dmamem_free(sc->aac_fib_dmat, fm->aac_fibs, fm->aac_fibmap);
1253 free(fm, M_AACRAIDBUF);
1258 * Free FIBs owned by this adapter.
1261 aac_free_commands(struct aac_softc *sc)
1263 struct aac_fibmap *fm;
1264 struct aac_command *cm;
1267 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
1269 while ((fm = TAILQ_FIRST(&sc->aac_fibmap_tqh)) != NULL) {
1271 TAILQ_REMOVE(&sc->aac_fibmap_tqh, fm, fm_link);
1273 * We check against total_fibs to handle partially
1276 for (i = 0; i < sc->aac_max_fibs_alloc && sc->total_fibs--; i++) {
1277 cm = fm->aac_commands + i;
1278 bus_dmamap_destroy(sc->aac_buffer_dmat, cm->cm_datamap);
1280 bus_dmamap_unload(sc->aac_fib_dmat, fm->aac_fibmap);
1281 bus_dmamem_free(sc->aac_fib_dmat, fm->aac_fibs, fm->aac_fibmap);
1282 free(fm, M_AACRAIDBUF);
1287 * Command-mapping helper function - populate this command's s/g table.
1290 aacraid_map_command_sg(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1292 struct aac_softc *sc;
1293 struct aac_command *cm;
1294 struct aac_fib *fib;
1297 cm = (struct aac_command *)arg;
1300 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "nseg %d", nseg);
1301 mtx_assert(&sc->aac_io_lock, MA_OWNED);
1303 if ((sc->flags & AAC_FLAGS_SYNC_MODE) && sc->aac_sync_cm)
1306 /* copy into the FIB */
1307 if (cm->cm_sgtable != NULL) {
1308 if (fib->Header.Command == RawIo2) {
1309 struct aac_raw_io2 *raw;
1310 struct aac_sge_ieee1212 *sg;
1311 u_int32_t min_size = PAGE_SIZE, cur_size;
1312 int conformable = TRUE;
1314 raw = (struct aac_raw_io2 *)&fib->data[0];
1315 sg = (struct aac_sge_ieee1212 *)cm->cm_sgtable;
1318 for (i = 0; i < nseg; i++) {
1319 cur_size = segs[i].ds_len;
1321 *(bus_addr_t *)&sg[i].addrLow = segs[i].ds_addr;
1322 sg[i].length = cur_size;
1325 raw->sgeFirstSize = cur_size;
1326 } else if (i == 1) {
1327 raw->sgeNominalSize = cur_size;
1328 min_size = cur_size;
1329 } else if ((i+1) < nseg &&
1330 cur_size != raw->sgeNominalSize) {
1331 conformable = FALSE;
1332 if (cur_size < min_size)
1333 min_size = cur_size;
1337 /* not conformable: evaluate required sg elements */
1339 int j, err_found, nseg_new = nseg;
1340 for (i = min_size / PAGE_SIZE; i >= 1; --i) {
1343 for (j = 1; j < nseg - 1; ++j) {
1344 if (sg[j].length % (i*PAGE_SIZE)) {
1348 nseg_new += (sg[j].length / (i*PAGE_SIZE));
1353 if (i>0 && nseg_new<=sc->aac_sg_tablesize &&
1354 !(sc->hint_flags & 4))
1355 nseg = aac_convert_sgraw2(sc,
1356 raw, i, nseg, nseg_new);
1358 raw->flags |= RIO2_SGL_CONFORMANT;
1361 for (i = 0; i < nseg; i++)
1362 aac_sge_ieee1212_tole(sg + i);
1363 aac_raw_io2_tole(raw);
1365 /* update the FIB size for the s/g count */
1366 fib->Header.Size += nseg *
1367 sizeof(struct aac_sge_ieee1212);
1369 } else if (fib->Header.Command == RawIo) {
1370 struct aac_sg_tableraw *sg;
1371 sg = (struct aac_sg_tableraw *)cm->cm_sgtable;
1372 sg->SgCount = htole32(nseg);
1373 for (i = 0; i < nseg; i++) {
1374 sg->SgEntryRaw[i].SgAddress = segs[i].ds_addr;
1375 sg->SgEntryRaw[i].SgByteCount = segs[i].ds_len;
1376 sg->SgEntryRaw[i].Next = 0;
1377 sg->SgEntryRaw[i].Prev = 0;
1378 sg->SgEntryRaw[i].Flags = 0;
1379 aac_sg_entryraw_tole(&sg->SgEntryRaw[i]);
1381 aac_raw_io_tole((struct aac_raw_io *)&fib->data[0]);
1382 /* update the FIB size for the s/g count */
1383 fib->Header.Size += nseg*sizeof(struct aac_sg_entryraw);
1384 } else if ((cm->cm_sc->flags & AAC_FLAGS_SG_64BIT) == 0) {
1385 struct aac_sg_table *sg;
1386 sg = cm->cm_sgtable;
1387 sg->SgCount = htole32(nseg);
1388 for (i = 0; i < nseg; i++) {
1389 sg->SgEntry[i].SgAddress = segs[i].ds_addr;
1390 sg->SgEntry[i].SgByteCount = segs[i].ds_len;
1391 aac_sg_entry_tole(&sg->SgEntry[i]);
1393 /* update the FIB size for the s/g count */
1394 fib->Header.Size += nseg*sizeof(struct aac_sg_entry);
1396 struct aac_sg_table64 *sg;
1397 sg = (struct aac_sg_table64 *)cm->cm_sgtable;
1398 sg->SgCount = htole32(nseg);
1399 for (i = 0; i < nseg; i++) {
1400 sg->SgEntry64[i].SgAddress = segs[i].ds_addr;
1401 sg->SgEntry64[i].SgByteCount = segs[i].ds_len;
1402 aac_sg_entry64_tole(&sg->SgEntry64[i]);
1404 /* update the FIB size for the s/g count */
1405 fib->Header.Size += nseg*sizeof(struct aac_sg_entry64);
1409 /* Fix up the address values in the FIB. Use the command array index
1410 * instead of a pointer since these fields are only 32 bits. Shift
1411 * the SenderFibAddress over to make room for the fast response bit
1412 * and for the AIF bit
1414 cm->cm_fib->Header.SenderFibAddress = (cm->cm_index << 2);
1415 cm->cm_fib->Header.u.ReceiverFibAddress = (u_int32_t)cm->cm_fibphys;
1417 /* save a pointer to the command for speedy reverse-lookup */
1418 cm->cm_fib->Header.Handle += cm->cm_index + 1;
1420 if (cm->cm_passthr_dmat == 0) {
1421 if (cm->cm_flags & AAC_CMD_DATAIN)
1422 bus_dmamap_sync(sc->aac_buffer_dmat, cm->cm_datamap,
1423 BUS_DMASYNC_PREREAD);
1424 if (cm->cm_flags & AAC_CMD_DATAOUT)
1425 bus_dmamap_sync(sc->aac_buffer_dmat, cm->cm_datamap,
1426 BUS_DMASYNC_PREWRITE);
1429 cm->cm_flags |= AAC_CMD_MAPPED;
1431 if (cm->cm_flags & AAC_CMD_WAIT) {
1432 aac_fib_header_tole(&fib->Header);
1433 aacraid_sync_command(sc, AAC_MONKER_SYNCFIB,
1434 cm->cm_fibphys, 0, 0, 0, NULL, NULL);
1435 } else if (sc->flags & AAC_FLAGS_SYNC_MODE) {
1437 sc->aac_sync_cm = cm;
1438 aac_fib_header_tole(&fib->Header);
1439 aacraid_sync_command(sc, AAC_MONKER_SYNCFIB,
1440 cm->cm_fibphys, 0, 0, 0, &wait, NULL);
1442 int count = 10000000L;
1443 while (AAC_SEND_COMMAND(sc, cm) != 0) {
1445 aac_unmap_command(cm);
1446 sc->flags |= AAC_QUEUE_FRZN;
1447 aac_requeue_ready(cm);
1449 DELAY(5); /* wait 5 usec. */
1456 aac_convert_sgraw2(struct aac_softc *sc, struct aac_raw_io2 *raw,
1457 int pages, int nseg, int nseg_new)
1459 struct aac_sge_ieee1212 *sge;
1463 sge = malloc(nseg_new * sizeof(struct aac_sge_ieee1212),
1464 M_AACRAIDBUF, M_NOWAIT|M_ZERO);
1468 for (i = 1, pos = 1; i < nseg - 1; ++i) {
1469 for (j = 0; j < raw->sge[i].length / (pages*PAGE_SIZE); ++j) {
1470 addr_low = raw->sge[i].addrLow + j * pages * PAGE_SIZE;
1471 sge[pos].addrLow = addr_low;
1472 sge[pos].addrHigh = raw->sge[i].addrHigh;
1473 if (addr_low < raw->sge[i].addrLow)
1474 sge[pos].addrHigh++;
1475 sge[pos].length = pages * PAGE_SIZE;
1480 sge[pos] = raw->sge[nseg-1];
1481 for (i = 1; i < nseg_new; ++i)
1482 raw->sge[i] = sge[i];
1484 free(sge, M_AACRAIDBUF);
1485 raw->sgeCnt = nseg_new;
1486 raw->flags |= RIO2_SGL_CONFORMANT;
1487 raw->sgeNominalSize = pages * PAGE_SIZE;
1493 * Unmap a command from controller-visible space.
1496 aac_unmap_command(struct aac_command *cm)
1498 struct aac_softc *sc;
1501 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
1503 if (!(cm->cm_flags & AAC_CMD_MAPPED))
1506 if (cm->cm_datalen != 0 && cm->cm_passthr_dmat == 0) {
1507 if (cm->cm_flags & AAC_CMD_DATAIN)
1508 bus_dmamap_sync(sc->aac_buffer_dmat, cm->cm_datamap,
1509 BUS_DMASYNC_POSTREAD);
1510 if (cm->cm_flags & AAC_CMD_DATAOUT)
1511 bus_dmamap_sync(sc->aac_buffer_dmat, cm->cm_datamap,
1512 BUS_DMASYNC_POSTWRITE);
1514 bus_dmamap_unload(sc->aac_buffer_dmat, cm->cm_datamap);
1516 cm->cm_flags &= ~AAC_CMD_MAPPED;
1520 * Hardware Interface
1524 * Initialize the adapter.
1527 aac_common_map(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1529 struct aac_softc *sc;
1531 sc = (struct aac_softc *)arg;
1532 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
1534 sc->aac_common_busaddr = segs[0].ds_addr;
1538 aac_check_firmware(struct aac_softc *sc)
1540 u_int32_t code, major, minor, maxsize;
1541 u_int32_t options = 0, atu_size = 0, status, waitCount;
1544 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
1546 /* check if flash update is running */
1547 if (AAC_GET_FWSTATUS(sc) & AAC_FLASH_UPD_PENDING) {
1550 code = AAC_GET_FWSTATUS(sc);
1551 if (time_uptime > (then + AAC_FWUPD_TIMEOUT)) {
1552 device_printf(sc->aac_dev,
1553 "FATAL: controller not coming ready, "
1554 "status %x\n", code);
1557 } while (!(code & AAC_FLASH_UPD_SUCCESS) && !(code & AAC_FLASH_UPD_FAILED));
1559 * Delay 10 seconds. Because right now FW is doing a soft reset,
1560 * do not read scratch pad register at this time
1562 waitCount = 10 * 10000;
1564 DELAY(100); /* delay 100 microseconds */
1570 * Wait for the adapter to come ready.
1574 code = AAC_GET_FWSTATUS(sc);
1575 if (time_uptime > (then + AAC_BOOT_TIMEOUT)) {
1576 device_printf(sc->aac_dev,
1577 "FATAL: controller not coming ready, "
1578 "status %x\n", code);
1581 } while (!(code & AAC_UP_AND_RUNNING) || code == 0xffffffff);
1584 * Retrieve the firmware version numbers. Dell PERC2/QC cards with
1585 * firmware version 1.x are not compatible with this driver.
1587 if (sc->flags & AAC_FLAGS_PERC2QC) {
1588 if (aacraid_sync_command(sc, AAC_MONKER_GETKERNVER, 0, 0, 0, 0,
1590 device_printf(sc->aac_dev,
1591 "Error reading firmware version\n");
1595 /* These numbers are stored as ASCII! */
1596 major = (AAC_GET_MAILBOX(sc, 1) & 0xff) - 0x30;
1597 minor = (AAC_GET_MAILBOX(sc, 2) & 0xff) - 0x30;
1599 device_printf(sc->aac_dev,
1600 "Firmware version %d.%d is not supported.\n",
1606 * Retrieve the capabilities/supported options word so we know what
1607 * work-arounds to enable. Some firmware revs don't support this
1610 if (aacraid_sync_command(sc, AAC_MONKER_GETINFO, 0, 0, 0, 0, &status, NULL)) {
1611 if (status != AAC_SRB_STS_INVALID_REQUEST) {
1612 device_printf(sc->aac_dev,
1613 "RequestAdapterInfo failed\n");
1617 options = AAC_GET_MAILBOX(sc, 1);
1618 atu_size = AAC_GET_MAILBOX(sc, 2);
1619 sc->supported_options = options;
1620 sc->doorbell_mask = AAC_GET_MAILBOX(sc, 3);
1622 if ((options & AAC_SUPPORTED_4GB_WINDOW) != 0 &&
1623 (sc->flags & AAC_FLAGS_NO4GB) == 0)
1624 sc->flags |= AAC_FLAGS_4GB_WINDOW;
1625 if (options & AAC_SUPPORTED_NONDASD)
1626 sc->flags |= AAC_FLAGS_ENABLE_CAM;
1627 if ((options & AAC_SUPPORTED_SGMAP_HOST64) != 0
1628 && (sizeof(bus_addr_t) > 4)
1629 && (sc->hint_flags & 0x1)) {
1630 device_printf(sc->aac_dev,
1631 "Enabling 64-bit address support\n");
1632 sc->flags |= AAC_FLAGS_SG_64BIT;
1634 if (sc->aac_if.aif_send_command) {
1635 if (options & AAC_SUPPORTED_NEW_COMM_TYPE2)
1636 sc->flags |= AAC_FLAGS_NEW_COMM | AAC_FLAGS_NEW_COMM_TYPE2;
1637 else if (options & AAC_SUPPORTED_NEW_COMM_TYPE1)
1638 sc->flags |= AAC_FLAGS_NEW_COMM | AAC_FLAGS_NEW_COMM_TYPE1;
1639 else if ((options & AAC_SUPPORTED_NEW_COMM_TYPE3) ||
1640 (options & AAC_SUPPORTED_NEW_COMM_TYPE4))
1641 sc->flags |= AAC_FLAGS_NEW_COMM | AAC_FLAGS_NEW_COMM_TYPE34;
1643 if (options & AAC_SUPPORTED_64BIT_ARRAYSIZE)
1644 sc->flags |= AAC_FLAGS_ARRAY_64BIT;
1647 if (!(sc->flags & AAC_FLAGS_NEW_COMM)) {
1648 device_printf(sc->aac_dev, "Communication interface not supported!\n");
1652 if (sc->hint_flags & 2) {
1653 device_printf(sc->aac_dev,
1654 "Sync. mode enforced by driver parameter. This will cause a significant performance decrease!\n");
1655 sc->flags |= AAC_FLAGS_SYNC_MODE;
1656 } else if (sc->flags & AAC_FLAGS_NEW_COMM_TYPE34) {
1657 device_printf(sc->aac_dev,
1658 "Async. mode not supported by current driver, sync. mode enforced.\nPlease update driver to get full performance.\n");
1659 sc->flags |= AAC_FLAGS_SYNC_MODE;
1662 /* Check for broken hardware that does a lower number of commands */
1663 sc->aac_max_fibs = (sc->flags & AAC_FLAGS_256FIBS ? 256:512);
1665 /* Remap mem. resource, if required */
1666 if (atu_size > rman_get_size(sc->aac_regs_res0)) {
1667 bus_release_resource(
1668 sc->aac_dev, SYS_RES_MEMORY,
1669 sc->aac_regs_rid0, sc->aac_regs_res0);
1670 sc->aac_regs_res0 = bus_alloc_resource_anywhere(
1671 sc->aac_dev, SYS_RES_MEMORY, &sc->aac_regs_rid0,
1672 atu_size, RF_ACTIVE);
1673 if (sc->aac_regs_res0 == NULL) {
1674 sc->aac_regs_res0 = bus_alloc_resource_any(
1675 sc->aac_dev, SYS_RES_MEMORY,
1676 &sc->aac_regs_rid0, RF_ACTIVE);
1677 if (sc->aac_regs_res0 == NULL) {
1678 device_printf(sc->aac_dev,
1679 "couldn't allocate register window\n");
1683 sc->aac_btag0 = rman_get_bustag(sc->aac_regs_res0);
1684 sc->aac_bhandle0 = rman_get_bushandle(sc->aac_regs_res0);
1687 /* Read preferred settings */
1688 sc->aac_max_fib_size = sizeof(struct aac_fib);
1689 sc->aac_max_sectors = 128; /* 64KB */
1690 sc->aac_max_aif = 1;
1691 if (sc->flags & AAC_FLAGS_SG_64BIT)
1692 sc->aac_sg_tablesize = (AAC_FIB_DATASIZE
1693 - sizeof(struct aac_blockwrite64))
1694 / sizeof(struct aac_sg_entry64);
1696 sc->aac_sg_tablesize = (AAC_FIB_DATASIZE
1697 - sizeof(struct aac_blockwrite))
1698 / sizeof(struct aac_sg_entry);
1700 if (!aacraid_sync_command(sc, AAC_MONKER_GETCOMMPREF, 0, 0, 0, 0, NULL, NULL)) {
1701 options = AAC_GET_MAILBOX(sc, 1);
1702 sc->aac_max_fib_size = (options & 0xFFFF);
1703 sc->aac_max_sectors = (options >> 16) << 1;
1704 options = AAC_GET_MAILBOX(sc, 2);
1705 sc->aac_sg_tablesize = (options >> 16);
1706 options = AAC_GET_MAILBOX(sc, 3);
1707 sc->aac_max_fibs = ((options >> 16) & 0xFFFF);
1708 if (sc->aac_max_fibs == 0 || sc->aac_hwif != AAC_HWIF_SRCV)
1709 sc->aac_max_fibs = (options & 0xFFFF);
1710 options = AAC_GET_MAILBOX(sc, 4);
1711 sc->aac_max_aif = (options & 0xFFFF);
1712 options = AAC_GET_MAILBOX(sc, 5);
1713 sc->aac_max_msix =(sc->flags & AAC_FLAGS_NEW_COMM_TYPE2) ? options : 0;
1716 maxsize = sc->aac_max_fib_size + 31;
1717 if (sc->flags & AAC_FLAGS_NEW_COMM_TYPE1)
1718 maxsize += sizeof(struct aac_fib_xporthdr);
1719 if (maxsize > PAGE_SIZE) {
1720 sc->aac_max_fib_size -= (maxsize - PAGE_SIZE);
1721 maxsize = PAGE_SIZE;
1723 sc->aac_max_fibs_alloc = PAGE_SIZE / maxsize;
1725 if (sc->aac_max_fib_size > sizeof(struct aac_fib)) {
1726 sc->flags |= AAC_FLAGS_RAW_IO;
1727 device_printf(sc->aac_dev, "Enable Raw I/O\n");
1729 if ((sc->flags & AAC_FLAGS_RAW_IO) &&
1730 (sc->flags & AAC_FLAGS_ARRAY_64BIT)) {
1731 sc->flags |= AAC_FLAGS_LBA_64BIT;
1732 device_printf(sc->aac_dev, "Enable 64-bit array\n");
1735 #ifdef AACRAID_DEBUG
1736 aacraid_get_fw_debug_buffer(sc);
1742 aac_init(struct aac_softc *sc)
1744 struct aac_adapter_init *ip;
1747 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
1749 /* reset rrq index */
1750 sc->aac_fibs_pushed_no = 0;
1751 for (i = 0; i < sc->aac_max_msix; i++)
1752 sc->aac_host_rrq_idx[i] = i * sc->aac_vector_cap;
1755 * Fill in the init structure. This tells the adapter about the
1756 * physical location of various important shared data structures.
1758 ip = &sc->aac_common->ac_init;
1759 ip->InitStructRevision = AAC_INIT_STRUCT_REVISION;
1760 if (sc->aac_max_fib_size > sizeof(struct aac_fib)) {
1761 ip->InitStructRevision = AAC_INIT_STRUCT_REVISION_4;
1762 sc->flags |= AAC_FLAGS_RAW_IO;
1764 ip->NoOfMSIXVectors = sc->aac_max_msix;
1766 ip->AdapterFibsPhysicalAddress = sc->aac_common_busaddr +
1767 offsetof(struct aac_common, ac_fibs);
1768 ip->AdapterFibsVirtualAddress = 0;
1769 ip->AdapterFibsSize = AAC_ADAPTER_FIBS * sizeof(struct aac_fib);
1770 ip->AdapterFibAlign = sizeof(struct aac_fib);
1772 ip->PrintfBufferAddress = sc->aac_common_busaddr +
1773 offsetof(struct aac_common, ac_printf);
1774 ip->PrintfBufferSize = AAC_PRINTF_BUFSIZE;
1777 * The adapter assumes that pages are 4K in size, except on some
1778 * broken firmware versions that do the page->byte conversion twice,
1779 * therefore 'assuming' that this value is in 16MB units (2^24).
1780 * Round up since the granularity is so high.
1782 ip->HostPhysMemPages = ctob(physmem) / AAC_PAGE_SIZE;
1783 if (sc->flags & AAC_FLAGS_BROKEN_MEMMAP) {
1784 ip->HostPhysMemPages =
1785 (ip->HostPhysMemPages + AAC_PAGE_SIZE) / AAC_PAGE_SIZE;
1787 ip->HostElapsedSeconds = time_uptime; /* reset later if invalid */
1789 ip->InitFlags = AAC_INITFLAGS_NEW_COMM_SUPPORTED;
1790 if (sc->flags & AAC_FLAGS_NEW_COMM_TYPE1) {
1791 ip->InitStructRevision = AAC_INIT_STRUCT_REVISION_6;
1792 ip->InitFlags |= (AAC_INITFLAGS_NEW_COMM_TYPE1_SUPPORTED |
1793 AAC_INITFLAGS_FAST_JBOD_SUPPORTED);
1794 device_printf(sc->aac_dev, "New comm. interface type1 enabled\n");
1795 } else if (sc->flags & AAC_FLAGS_NEW_COMM_TYPE2) {
1796 ip->InitStructRevision = AAC_INIT_STRUCT_REVISION_7;
1797 ip->InitFlags |= (AAC_INITFLAGS_NEW_COMM_TYPE2_SUPPORTED |
1798 AAC_INITFLAGS_FAST_JBOD_SUPPORTED);
1799 device_printf(sc->aac_dev, "New comm. interface type2 enabled\n");
1801 ip->MaxNumAif = sc->aac_max_aif;
1802 ip->HostRRQ_AddrLow =
1803 sc->aac_common_busaddr + offsetof(struct aac_common, ac_host_rrq);
1804 /* always 32-bit address */
1805 ip->HostRRQ_AddrHigh = 0;
1807 if (sc->aac_support_opt2 & AAC_SUPPORTED_POWER_MANAGEMENT) {
1808 ip->InitFlags |= AAC_INITFLAGS_DRIVER_SUPPORTS_PM;
1809 ip->InitFlags |= AAC_INITFLAGS_DRIVER_USES_UTC_TIME;
1810 device_printf(sc->aac_dev, "Power Management enabled\n");
1813 ip->MaxIoCommands = sc->aac_max_fibs;
1814 ip->MaxIoSize = sc->aac_max_sectors << 9;
1815 ip->MaxFibSize = sc->aac_max_fib_size;
1817 aac_adapter_init_tole(ip);
1820 * Do controller-type-specific initialisation
1822 AAC_MEM0_SETREG4(sc, AAC_SRC_ODBR_C, ~0);
1825 * Give the init structure to the controller.
1827 if (aacraid_sync_command(sc, AAC_MONKER_INITSTRUCT,
1828 sc->aac_common_busaddr +
1829 offsetof(struct aac_common, ac_init), 0, 0, 0,
1831 device_printf(sc->aac_dev,
1832 "error establishing init structure\n");
1838 * Check configuration issues
1840 if ((error = aac_check_config(sc)) != 0)
1849 aac_define_int_mode(struct aac_softc *sc)
1852 int cap, msi_count, error = 0;
1857 if (sc->flags & AAC_FLAGS_SYNC_MODE) {
1858 device_printf(dev, "using line interrupts\n");
1859 sc->aac_max_msix = 1;
1860 sc->aac_vector_cap = sc->aac_max_fibs;
1864 /* max. vectors from AAC_MONKER_GETCOMMPREF */
1865 if (sc->aac_max_msix == 0) {
1866 if (sc->aac_hwif == AAC_HWIF_SRC) {
1868 if ((error = pci_alloc_msi(dev, &msi_count)) != 0) {
1869 device_printf(dev, "alloc msi failed - err=%d; "
1870 "will use INTx\n", error);
1871 pci_release_msi(dev);
1873 sc->msi_tupelo = TRUE;
1877 device_printf(dev, "using MSI interrupts\n");
1879 device_printf(dev, "using line interrupts\n");
1881 sc->aac_max_msix = 1;
1882 sc->aac_vector_cap = sc->aac_max_fibs;
1887 msi_count = pci_msix_count(dev);
1888 if (msi_count > AAC_MAX_MSIX)
1889 msi_count = AAC_MAX_MSIX;
1890 if (msi_count > sc->aac_max_msix)
1891 msi_count = sc->aac_max_msix;
1892 if (msi_count == 0 || (error = pci_alloc_msix(dev, &msi_count)) != 0) {
1893 device_printf(dev, "alloc msix failed - msi_count=%d, err=%d; "
1894 "will try MSI\n", msi_count, error);
1895 pci_release_msi(dev);
1897 sc->msi_enabled = TRUE;
1898 device_printf(dev, "using MSI-X interrupts (%u vectors)\n",
1902 if (!sc->msi_enabled) {
1904 if ((error = pci_alloc_msi(dev, &msi_count)) != 0) {
1905 device_printf(dev, "alloc msi failed - err=%d; "
1906 "will use INTx\n", error);
1907 pci_release_msi(dev);
1909 sc->msi_enabled = TRUE;
1910 device_printf(dev, "using MSI interrupts\n");
1914 if (sc->msi_enabled) {
1915 /* now read controller capability from PCI config. space */
1916 cap = aac_find_pci_capability(sc, PCIY_MSIX);
1917 val = (cap != 0 ? pci_read_config(dev, cap + 2, 2) : 0);
1918 if (!(val & AAC_PCI_MSI_ENABLE)) {
1919 pci_release_msi(dev);
1920 sc->msi_enabled = FALSE;
1924 if (!sc->msi_enabled) {
1925 device_printf(dev, "using legacy interrupts\n");
1926 sc->aac_max_msix = 1;
1928 AAC_ACCESS_DEVREG(sc, AAC_ENABLE_MSIX);
1929 if (sc->aac_max_msix > msi_count)
1930 sc->aac_max_msix = msi_count;
1932 sc->aac_vector_cap = sc->aac_max_fibs / sc->aac_max_msix;
1934 fwprintf(sc, HBA_FLAGS_DBG_DEBUG_B, "msi_enabled %d vector_cap %d max_fibs %d max_msix %d",
1935 sc->msi_enabled,sc->aac_vector_cap, sc->aac_max_fibs, sc->aac_max_msix);
1939 aac_find_pci_capability(struct aac_softc *sc, int cap)
1947 status = pci_read_config(dev, PCIR_STATUS, 2);
1948 if (!(status & PCIM_STATUS_CAPPRESENT))
1951 status = pci_read_config(dev, PCIR_HDRTYPE, 1);
1952 switch (status & PCIM_HDRTYPE) {
1958 ptr = PCIR_CAP_PTR_2;
1964 ptr = pci_read_config(dev, ptr, 1);
1968 next = pci_read_config(dev, ptr + PCICAP_NEXTPTR, 1);
1969 val = pci_read_config(dev, ptr + PCICAP_ID, 1);
1979 aac_setup_intr(struct aac_softc *sc)
1981 int i, msi_count, rid;
1982 struct resource *res;
1985 msi_count = sc->aac_max_msix;
1986 rid = ((sc->msi_enabled || sc->msi_tupelo)? 1:0);
1988 for (i = 0; i < msi_count; i++, rid++) {
1989 if ((res = bus_alloc_resource_any(sc->aac_dev,SYS_RES_IRQ, &rid,
1990 RF_SHAREABLE | RF_ACTIVE)) == NULL) {
1991 device_printf(sc->aac_dev,"can't allocate interrupt\n");
1994 sc->aac_irq_rid[i] = rid;
1995 sc->aac_irq[i] = res;
1996 if (aac_bus_setup_intr(sc->aac_dev, res,
1997 INTR_MPSAFE | INTR_TYPE_BIO, NULL,
1998 aacraid_new_intr_type1, &sc->aac_msix[i], &tag)) {
1999 device_printf(sc->aac_dev, "can't set up interrupt\n");
2002 sc->aac_msix[i].vector_no = i;
2003 sc->aac_msix[i].sc = sc;
2004 sc->aac_intr[i] = tag;
2011 aac_check_config(struct aac_softc *sc)
2013 struct aac_fib *fib;
2014 struct aac_cnt_config *ccfg;
2015 struct aac_cf_status_hdr *cf_shdr;
2018 mtx_lock(&sc->aac_io_lock);
2019 aac_alloc_sync_fib(sc, &fib);
2021 ccfg = (struct aac_cnt_config *)&fib->data[0];
2022 bzero(ccfg, sizeof (*ccfg) - CT_PACKET_SIZE);
2023 ccfg->Command = VM_ContainerConfig;
2024 ccfg->CTCommand.command = CT_GET_CONFIG_STATUS;
2025 ccfg->CTCommand.param[CNT_SIZE] = sizeof(struct aac_cf_status_hdr);
2027 aac_cnt_config_tole(ccfg);
2028 rval = aac_sync_fib(sc, ContainerCommand, 0, fib,
2029 sizeof (struct aac_cnt_config));
2030 aac_cnt_config_toh(ccfg);
2032 cf_shdr = (struct aac_cf_status_hdr *)ccfg->CTCommand.data;
2033 if (rval == 0 && ccfg->Command == ST_OK &&
2034 ccfg->CTCommand.param[0] == CT_OK) {
2035 if (le32toh(cf_shdr->action) <= CFACT_PAUSE) {
2036 bzero(ccfg, sizeof (*ccfg) - CT_PACKET_SIZE);
2037 ccfg->Command = VM_ContainerConfig;
2038 ccfg->CTCommand.command = CT_COMMIT_CONFIG;
2040 aac_cnt_config_tole(ccfg);
2041 rval = aac_sync_fib(sc, ContainerCommand, 0, fib,
2042 sizeof (struct aac_cnt_config));
2043 aac_cnt_config_toh(ccfg);
2045 if (rval == 0 && ccfg->Command == ST_OK &&
2046 ccfg->CTCommand.param[0] == CT_OK) {
2047 /* successful completion */
2050 /* auto commit aborted due to error(s) */
2054 /* auto commit aborted due to adapter indicating
2055 config. issues too dangerous to auto commit */
2063 aac_release_sync_fib(sc);
2064 mtx_unlock(&sc->aac_io_lock);
2069 * Send a synchronous command to the controller and wait for a result.
2070 * Indicate if the controller completed the command with an error status.
2073 aacraid_sync_command(struct aac_softc *sc, u_int32_t command,
2074 u_int32_t arg0, u_int32_t arg1, u_int32_t arg2, u_int32_t arg3,
2075 u_int32_t *sp, u_int32_t *r1)
2080 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2082 /* populate the mailbox */
2083 AAC_SET_MAILBOX(sc, command, arg0, arg1, arg2, arg3);
2085 /* ensure the sync command doorbell flag is cleared */
2086 if (!sc->msi_enabled)
2087 AAC_CLEAR_ISTATUS(sc, AAC_DB_SYNC_COMMAND);
2089 /* then set it to signal the adapter */
2090 AAC_QNOTIFY(sc, AAC_DB_SYNC_COMMAND);
2092 if ((command != AAC_MONKER_SYNCFIB) || (sp == NULL) || (*sp != 0)) {
2093 /* spin waiting for the command to complete */
2096 if (time_uptime > (then + AAC_SYNC_TIMEOUT)) {
2097 fwprintf(sc, HBA_FLAGS_DBG_ERROR_B, "timed out");
2100 } while (!(AAC_GET_ISTATUS(sc) & AAC_DB_SYNC_COMMAND));
2102 /* clear the completion flag */
2103 AAC_CLEAR_ISTATUS(sc, AAC_DB_SYNC_COMMAND);
2105 /* get the command status */
2106 status = AAC_GET_MAILBOX(sc, 0);
2110 /* return parameter */
2112 *r1 = AAC_GET_MAILBOX(sc, 1);
2114 if (status != AAC_SRB_STS_SUCCESS)
2121 aac_sync_fib(struct aac_softc *sc, u_int32_t command, u_int32_t xferstate,
2122 struct aac_fib *fib, u_int16_t datasize)
2124 uint32_t ReceiverFibAddress;
2126 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2127 mtx_assert(&sc->aac_io_lock, MA_OWNED);
2129 if (datasize > AAC_FIB_DATASIZE)
2133 * Set up the sync FIB
2135 fib->Header.XferState = AAC_FIBSTATE_HOSTOWNED |
2136 AAC_FIBSTATE_INITIALISED |
2138 fib->Header.XferState |= xferstate;
2139 fib->Header.Command = command;
2140 fib->Header.StructType = AAC_FIBTYPE_TFIB;
2141 fib->Header.Size = sizeof(struct aac_fib_header) + datasize;
2142 fib->Header.SenderSize = sizeof(struct aac_fib);
2143 fib->Header.SenderFibAddress = 0; /* Not needed */
2144 ReceiverFibAddress = sc->aac_common_busaddr +
2145 offsetof(struct aac_common, ac_sync_fib);
2146 fib->Header.u.ReceiverFibAddress = ReceiverFibAddress;
2147 aac_fib_header_tole(&fib->Header);
2150 * Give the FIB to the controller, wait for a response.
2152 if (aacraid_sync_command(sc, AAC_MONKER_SYNCFIB,
2153 ReceiverFibAddress, 0, 0, 0, NULL, NULL)) {
2154 fwprintf(sc, HBA_FLAGS_DBG_ERROR_B, "IO error");
2155 aac_fib_header_toh(&fib->Header);
2159 aac_fib_header_toh(&fib->Header);
2164 * Check for commands that have been outstanding for a suspiciously long time,
2165 * and complain about them.
2168 aac_timeout(struct aac_softc *sc)
2170 struct aac_command *cm;
2174 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2176 * Traverse the busy command list, bitch about late commands once
2180 deadline = time_uptime - AAC_CMD_TIMEOUT;
2181 TAILQ_FOREACH(cm, &sc->aac_busy, cm_link) {
2182 if (cm->cm_timestamp < deadline) {
2183 device_printf(sc->aac_dev,
2184 "COMMAND %p TIMEOUT AFTER %d SECONDS\n",
2185 cm, (int)(time_uptime-cm->cm_timestamp));
2186 AAC_PRINT_FIB(sc, cm->cm_fib);
2192 aac_reset_adapter(sc);
2193 aacraid_print_queues(sc);
2197 * Interface Function Vectors
2201 * Read the current firmware status word.
2204 aac_src_get_fwstatus(struct aac_softc *sc)
2206 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2208 return(AAC_MEM0_GETREG4(sc, AAC_SRC_OMR));
2212 * Notify the controller of a change in a given queue
2215 aac_src_qnotify(struct aac_softc *sc, int qbit)
2217 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2219 AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, qbit << AAC_SRC_IDR_SHIFT);
2223 * Get the interrupt reason bits
2226 aac_src_get_istatus(struct aac_softc *sc)
2230 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2232 if (sc->msi_enabled) {
2233 val = AAC_MEM0_GETREG4(sc, AAC_SRC_ODBR_MSI);
2234 if (val & AAC_MSI_SYNC_STATUS)
2235 val = AAC_DB_SYNC_COMMAND;
2239 val = AAC_MEM0_GETREG4(sc, AAC_SRC_ODBR_R) >> AAC_SRC_ODR_SHIFT;
2245 * Clear some interrupt reason bits
2248 aac_src_clear_istatus(struct aac_softc *sc, int mask)
2250 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2252 if (sc->msi_enabled) {
2253 if (mask == AAC_DB_SYNC_COMMAND)
2254 AAC_ACCESS_DEVREG(sc, AAC_CLEAR_SYNC_BIT);
2256 AAC_MEM0_SETREG4(sc, AAC_SRC_ODBR_C, mask << AAC_SRC_ODR_SHIFT);
2261 * Populate the mailbox and set the command word
2264 aac_src_set_mailbox(struct aac_softc *sc, u_int32_t command, u_int32_t arg0,
2265 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3)
2267 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2269 AAC_MEM0_SETREG4(sc, AAC_SRC_MAILBOX, command);
2270 AAC_MEM0_SETREG4(sc, AAC_SRC_MAILBOX + 4, arg0);
2271 AAC_MEM0_SETREG4(sc, AAC_SRC_MAILBOX + 8, arg1);
2272 AAC_MEM0_SETREG4(sc, AAC_SRC_MAILBOX + 12, arg2);
2273 AAC_MEM0_SETREG4(sc, AAC_SRC_MAILBOX + 16, arg3);
2277 aac_srcv_set_mailbox(struct aac_softc *sc, u_int32_t command, u_int32_t arg0,
2278 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3)
2280 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2282 AAC_MEM0_SETREG4(sc, AAC_SRCV_MAILBOX, command);
2283 AAC_MEM0_SETREG4(sc, AAC_SRCV_MAILBOX + 4, arg0);
2284 AAC_MEM0_SETREG4(sc, AAC_SRCV_MAILBOX + 8, arg1);
2285 AAC_MEM0_SETREG4(sc, AAC_SRCV_MAILBOX + 12, arg2);
2286 AAC_MEM0_SETREG4(sc, AAC_SRCV_MAILBOX + 16, arg3);
2290 * Fetch the immediate command status word
2293 aac_src_get_mailbox(struct aac_softc *sc, int mb)
2295 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2297 return(AAC_MEM0_GETREG4(sc, AAC_SRC_MAILBOX + (mb * 4)));
2301 aac_srcv_get_mailbox(struct aac_softc *sc, int mb)
2303 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2305 return(AAC_MEM0_GETREG4(sc, AAC_SRCV_MAILBOX + (mb * 4)));
2309 * Set/clear interrupt masks
2312 aac_src_access_devreg(struct aac_softc *sc, int mode)
2316 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2319 case AAC_ENABLE_INTERRUPT:
2320 AAC_MEM0_SETREG4(sc, AAC_SRC_OIMR,
2321 (sc->msi_enabled ? AAC_INT_ENABLE_TYPE1_MSIX :
2322 AAC_INT_ENABLE_TYPE1_INTX));
2325 case AAC_DISABLE_INTERRUPT:
2326 AAC_MEM0_SETREG4(sc, AAC_SRC_OIMR, AAC_INT_DISABLE_ALL);
2329 case AAC_ENABLE_MSIX:
2331 val = AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
2333 AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, val);
2334 AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
2336 val = PMC_ALL_INTERRUPT_BITS;
2337 AAC_MEM0_SETREG4(sc, AAC_SRC_IOAR, val);
2338 val = AAC_MEM0_GETREG4(sc, AAC_SRC_OIMR);
2339 AAC_MEM0_SETREG4(sc, AAC_SRC_OIMR,
2340 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
2343 case AAC_DISABLE_MSIX:
2345 val = AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
2347 AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, val);
2348 AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
2351 case AAC_CLEAR_AIF_BIT:
2353 val = AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
2355 AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, val);
2356 AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
2359 case AAC_CLEAR_SYNC_BIT:
2361 val = AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
2363 AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, val);
2364 AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
2367 case AAC_ENABLE_INTX:
2369 val = AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
2371 AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, val);
2372 AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
2374 val = PMC_ALL_INTERRUPT_BITS;
2375 AAC_MEM0_SETREG4(sc, AAC_SRC_IOAR, val);
2376 val = AAC_MEM0_GETREG4(sc, AAC_SRC_OIMR);
2377 AAC_MEM0_SETREG4(sc, AAC_SRC_OIMR,
2378 val & (~(PMC_GLOBAL_INT_BIT2)));
2387 * New comm. interface: Send command functions
2390 aac_src_send_command(struct aac_softc *sc, struct aac_command *cm)
2392 struct aac_fib_xporthdr *pFibX;
2393 u_int32_t fibsize, high_addr;
2396 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "send command (new comm. type1)");
2398 if (sc->msi_enabled && cm->cm_fib->Header.Command != AifRequest &&
2399 sc->aac_max_msix > 1) {
2400 u_int16_t vector_no, first_choice = 0xffff;
2402 vector_no = sc->aac_fibs_pushed_no % sc->aac_max_msix;
2405 if (vector_no == sc->aac_max_msix)
2407 if (sc->aac_rrq_outstanding[vector_no] <
2410 if (0xffff == first_choice)
2411 first_choice = vector_no;
2412 else if (vector_no == first_choice)
2415 if (vector_no == first_choice)
2417 sc->aac_rrq_outstanding[vector_no]++;
2418 if (sc->aac_fibs_pushed_no == 0xffffffff)
2419 sc->aac_fibs_pushed_no = 0;
2421 sc->aac_fibs_pushed_no++;
2423 cm->cm_fib->Header.Handle += (vector_no << 16);
2426 if (sc->flags & AAC_FLAGS_NEW_COMM_TYPE2) {
2427 /* Calculate the amount to the fibsize bits */
2428 fibsize = (cm->cm_fib->Header.Size + 127) / 128 - 1;
2429 /* Fill new FIB header */
2430 address = cm->cm_fibphys;
2431 high_addr = (u_int32_t)(address >> 32);
2432 if (high_addr == 0L) {
2433 cm->cm_fib->Header.StructType = AAC_FIBTYPE_TFIB2;
2434 cm->cm_fib->Header.u.TimeStamp = 0L;
2436 cm->cm_fib->Header.StructType = AAC_FIBTYPE_TFIB2_64;
2437 cm->cm_fib->Header.u.SenderFibAddressHigh = high_addr;
2439 cm->cm_fib->Header.SenderFibAddress = (u_int32_t)address;
2441 /* Calculate the amount to the fibsize bits */
2442 fibsize = (sizeof(struct aac_fib_xporthdr) +
2443 cm->cm_fib->Header.Size + 127) / 128 - 1;
2444 /* Fill XPORT header */
2445 pFibX = (struct aac_fib_xporthdr *)
2446 ((unsigned char *)cm->cm_fib - sizeof(struct aac_fib_xporthdr));
2447 pFibX->Handle = cm->cm_fib->Header.Handle;
2448 pFibX->HostAddress = cm->cm_fibphys;
2449 pFibX->Size = cm->cm_fib->Header.Size;
2450 aac_fib_xporthdr_tole(pFibX);
2451 address = cm->cm_fibphys - sizeof(struct aac_fib_xporthdr);
2452 high_addr = (u_int32_t)(address >> 32);
2455 aac_fib_header_tole(&cm->cm_fib->Header);
2459 aac_enqueue_busy(cm);
2461 AAC_MEM0_SETREG4(sc, AAC_SRC_IQUE64_H, high_addr);
2462 AAC_MEM0_SETREG4(sc, AAC_SRC_IQUE64_L, (u_int32_t)address + fibsize);
2464 AAC_MEM0_SETREG4(sc, AAC_SRC_IQUE32, (u_int32_t)address + fibsize);
2470 * New comm. interface: get, set outbound queue index
2473 aac_src_get_outb_queue(struct aac_softc *sc)
2475 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2481 aac_src_set_outb_queue(struct aac_softc *sc, int index)
2483 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2487 * Debugging and Diagnostics
2491 * Print some information about the controller.
2494 aac_describe_controller(struct aac_softc *sc)
2496 struct aac_fib *fib;
2497 struct aac_adapter_info *info;
2498 char *adapter_type = "Adaptec RAID controller";
2500 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2502 mtx_lock(&sc->aac_io_lock);
2503 aac_alloc_sync_fib(sc, &fib);
2505 if (sc->supported_options & AAC_SUPPORTED_SUPPLEMENT_ADAPTER_INFO) {
2507 if (aac_sync_fib(sc, RequestSupplementAdapterInfo, 0, fib, 1))
2508 device_printf(sc->aac_dev, "RequestSupplementAdapterInfo failed\n");
2510 struct aac_supplement_adapter_info *supp_info;
2512 supp_info = ((struct aac_supplement_adapter_info *)&fib->data[0]);
2513 adapter_type = (char *)supp_info->AdapterTypeText;
2514 sc->aac_feature_bits = le32toh(supp_info->FeatureBits);
2515 sc->aac_support_opt2 = le32toh(supp_info->SupportedOptions2);
2518 device_printf(sc->aac_dev, "%s, aacraid driver %d.%d.%d-%d\n",
2520 AAC_DRIVER_MAJOR_VERSION, AAC_DRIVER_MINOR_VERSION,
2521 AAC_DRIVER_BUGFIX_LEVEL, AAC_DRIVER_BUILD);
2524 if (aac_sync_fib(sc, RequestAdapterInfo, 0, fib, 1)) {
2525 device_printf(sc->aac_dev, "RequestAdapterInfo failed\n");
2526 aac_release_sync_fib(sc);
2527 mtx_unlock(&sc->aac_io_lock);
2531 /* save the kernel revision structure for later use */
2532 info = (struct aac_adapter_info *)&fib->data[0];
2533 aac_adapter_info_toh(info);
2534 sc->aac_revision = info->KernelRevision;
2537 device_printf(sc->aac_dev, "%s %dMHz, %dMB memory "
2538 "(%dMB cache, %dMB execution), %s\n",
2539 aac_describe_code(aac_cpu_variant, info->CpuVariant),
2540 info->ClockSpeed, info->TotalMem / (1024 * 1024),
2541 info->BufferMem / (1024 * 1024),
2542 info->ExecutionMem / (1024 * 1024),
2543 aac_describe_code(aac_battery_platform,
2544 info->batteryPlatform));
2546 device_printf(sc->aac_dev,
2547 "Kernel %d.%d-%d, Build %d, S/N %6X\n",
2548 info->KernelRevision.external.comp.major,
2549 info->KernelRevision.external.comp.minor,
2550 info->KernelRevision.external.comp.dash,
2551 info->KernelRevision.buildNumber,
2552 (u_int32_t)(info->SerialNumber & 0xffffff));
2554 device_printf(sc->aac_dev, "Supported Options=%b\n",
2555 sc->supported_options,
2578 aac_release_sync_fib(sc);
2579 mtx_unlock(&sc->aac_io_lock);
2583 * Look up a text description of a numeric error code and return a pointer to
2587 aac_describe_code(struct aac_code_lookup *table, u_int32_t code)
2591 for (i = 0; table[i].string != NULL; i++)
2592 if (table[i].code == code)
2593 return(table[i].string);
2594 return(table[i + 1].string);
2598 * Management Interface
2602 aac_open(struct cdev *dev, int flags, int fmt, struct thread *td)
2604 struct aac_softc *sc;
2607 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2608 device_busy(sc->aac_dev);
2609 devfs_set_cdevpriv(sc, aac_cdevpriv_dtor);
2614 aac_ioctl(struct cdev *dev, u_long cmd, caddr_t arg, int flag, struct thread *td)
2616 union aac_statrequest *as;
2617 struct aac_softc *sc;
2620 as = (union aac_statrequest *)arg;
2622 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2626 switch (as->as_item) {
2630 bcopy(&sc->aac_qstat[as->as_item], &as->as_qstat,
2631 sizeof(struct aac_qstat));
2639 case FSACTL_SENDFIB:
2640 case FSACTL_SEND_LARGE_FIB:
2641 arg = *(caddr_t*)arg;
2642 case FSACTL_LNX_SENDFIB:
2643 case FSACTL_LNX_SEND_LARGE_FIB:
2644 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "FSACTL_SENDFIB");
2645 error = aac_ioctl_sendfib(sc, arg);
2647 case FSACTL_SEND_RAW_SRB:
2648 arg = *(caddr_t*)arg;
2649 case FSACTL_LNX_SEND_RAW_SRB:
2650 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "FSACTL_SEND_RAW_SRB");
2651 error = aac_ioctl_send_raw_srb(sc, arg);
2653 case FSACTL_AIF_THREAD:
2654 case FSACTL_LNX_AIF_THREAD:
2655 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "FSACTL_AIF_THREAD");
2658 case FSACTL_OPEN_GET_ADAPTER_FIB:
2659 arg = *(caddr_t*)arg;
2660 case FSACTL_LNX_OPEN_GET_ADAPTER_FIB:
2661 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "FSACTL_OPEN_GET_ADAPTER_FIB");
2662 error = aac_open_aif(sc, arg);
2664 case FSACTL_GET_NEXT_ADAPTER_FIB:
2665 arg = *(caddr_t*)arg;
2666 case FSACTL_LNX_GET_NEXT_ADAPTER_FIB:
2667 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "FSACTL_GET_NEXT_ADAPTER_FIB");
2668 error = aac_getnext_aif(sc, arg);
2670 case FSACTL_CLOSE_GET_ADAPTER_FIB:
2671 arg = *(caddr_t*)arg;
2672 case FSACTL_LNX_CLOSE_GET_ADAPTER_FIB:
2673 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "FSACTL_CLOSE_GET_ADAPTER_FIB");
2674 error = aac_close_aif(sc, arg);
2676 case FSACTL_MINIPORT_REV_CHECK:
2677 arg = *(caddr_t*)arg;
2678 case FSACTL_LNX_MINIPORT_REV_CHECK:
2679 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "FSACTL_MINIPORT_REV_CHECK");
2680 error = aac_rev_check(sc, arg);
2682 case FSACTL_QUERY_DISK:
2683 arg = *(caddr_t*)arg;
2684 case FSACTL_LNX_QUERY_DISK:
2685 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "FSACTL_QUERY_DISK");
2686 error = aac_query_disk(sc, arg);
2688 case FSACTL_DELETE_DISK:
2689 case FSACTL_LNX_DELETE_DISK:
2691 * We don't trust the underland to tell us when to delete a
2692 * container, rather we rely on an AIF coming from the
2697 case FSACTL_GET_PCI_INFO:
2698 arg = *(caddr_t*)arg;
2699 case FSACTL_LNX_GET_PCI_INFO:
2700 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "FSACTL_GET_PCI_INFO");
2701 error = aac_get_pci_info(sc, arg);
2703 case FSACTL_GET_FEATURES:
2704 arg = *(caddr_t*)arg;
2705 case FSACTL_LNX_GET_FEATURES:
2706 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "FSACTL_GET_FEATURES");
2707 error = aac_supported_features(sc, arg);
2710 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "unsupported cmd 0x%lx\n", cmd);
2718 aac_poll(struct cdev *dev, int poll_events, struct thread *td)
2720 struct aac_softc *sc;
2721 struct aac_fib_context *ctx;
2727 mtx_lock(&sc->aac_io_lock);
2728 if ((poll_events & (POLLRDNORM | POLLIN)) != 0) {
2729 for (ctx = sc->fibctx; ctx; ctx = ctx->next) {
2730 if (ctx->ctx_idx != sc->aifq_idx || ctx->ctx_wrap) {
2731 revents |= poll_events & (POLLIN | POLLRDNORM);
2736 mtx_unlock(&sc->aac_io_lock);
2739 if (poll_events & (POLLIN | POLLRDNORM))
2740 selrecord(td, &sc->rcv_select);
2747 aac_ioctl_event(struct aac_softc *sc, struct aac_event *event, void *arg)
2750 switch (event->ev_type) {
2751 case AAC_EVENT_CMFREE:
2752 mtx_assert(&sc->aac_io_lock, MA_OWNED);
2753 if (aacraid_alloc_command(sc, (struct aac_command **)arg)) {
2754 aacraid_add_event(sc, event);
2757 free(event, M_AACRAIDBUF);
2766 * Send a FIB supplied from userspace
2768 * Currently, sending a FIB from userspace in BE hosts is not supported.
2769 * There are several things that need to be considered in order to
2770 * support this, such as:
2771 * - At least the FIB data part from userspace should already be in LE,
2772 * or else the kernel would need to know all FIB types to be able to
2773 * correctly convert it to BE.
2774 * - SG tables are converted to BE by aacraid_map_command_sg(). This
2775 * conversion should be supressed if the FIB comes from userspace.
2776 * - aacraid_wait_command() calls functions that convert the FIB header
2777 * to LE. But if the header is already in LE, the conversion should not
2781 aac_ioctl_sendfib(struct aac_softc *sc, caddr_t ufib)
2783 struct aac_command *cm;
2786 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2793 mtx_lock(&sc->aac_io_lock);
2794 if (aacraid_alloc_command(sc, &cm)) {
2795 struct aac_event *event;
2797 event = malloc(sizeof(struct aac_event), M_AACRAIDBUF,
2799 if (event == NULL) {
2801 mtx_unlock(&sc->aac_io_lock);
2804 event->ev_type = AAC_EVENT_CMFREE;
2805 event->ev_callback = aac_ioctl_event;
2806 event->ev_arg = &cm;
2807 aacraid_add_event(sc, event);
2808 msleep(cm, &sc->aac_io_lock, 0, "aacraid_ctlsfib", 0);
2810 mtx_unlock(&sc->aac_io_lock);
2813 * Fetch the FIB header, then re-copy to get data as well.
2815 if ((error = copyin(ufib, cm->cm_fib,
2816 sizeof(struct aac_fib_header))) != 0)
2818 size = cm->cm_fib->Header.Size + sizeof(struct aac_fib_header);
2819 if (size > sc->aac_max_fib_size) {
2820 device_printf(sc->aac_dev, "incoming FIB oversized (%d > %d)\n",
2821 size, sc->aac_max_fib_size);
2822 size = sc->aac_max_fib_size;
2824 if ((error = copyin(ufib, cm->cm_fib, size)) != 0)
2826 cm->cm_fib->Header.Size = size;
2827 cm->cm_timestamp = time_uptime;
2831 * Pass the FIB to the controller, wait for it to complete.
2833 mtx_lock(&sc->aac_io_lock);
2834 error = aacraid_wait_command(cm);
2835 mtx_unlock(&sc->aac_io_lock);
2837 device_printf(sc->aac_dev,
2838 "aacraid_wait_command return %d\n", error);
2843 * Copy the FIB and data back out to the caller.
2845 size = cm->cm_fib->Header.Size;
2846 if (size > sc->aac_max_fib_size) {
2847 device_printf(sc->aac_dev, "outbound FIB oversized (%d > %d)\n",
2848 size, sc->aac_max_fib_size);
2849 size = sc->aac_max_fib_size;
2851 error = copyout(cm->cm_fib, ufib, size);
2855 mtx_lock(&sc->aac_io_lock);
2856 aacraid_release_command(cm);
2857 mtx_unlock(&sc->aac_io_lock);
2863 * Send a passthrough FIB supplied from userspace
2866 aac_ioctl_send_raw_srb(struct aac_softc *sc, caddr_t arg)
2868 struct aac_command *cm;
2869 struct aac_fib *fib;
2870 struct aac_srb *srbcmd;
2871 struct aac_srb *user_srb = (struct aac_srb *)arg;
2873 int error, transfer_data = 0;
2874 bus_dmamap_t orig_map = 0;
2875 u_int32_t fibsize = 0;
2876 u_int64_t srb_sg_address;
2877 u_int32_t srb_sg_bytecount;
2879 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
2883 mtx_lock(&sc->aac_io_lock);
2884 if (aacraid_alloc_command(sc, &cm)) {
2885 struct aac_event *event;
2887 event = malloc(sizeof(struct aac_event), M_AACRAIDBUF,
2889 if (event == NULL) {
2891 mtx_unlock(&sc->aac_io_lock);
2894 event->ev_type = AAC_EVENT_CMFREE;
2895 event->ev_callback = aac_ioctl_event;
2896 event->ev_arg = &cm;
2897 aacraid_add_event(sc, event);
2898 msleep(cm, &sc->aac_io_lock, 0, "aacraid_ctlsraw", 0);
2900 mtx_unlock(&sc->aac_io_lock);
2903 /* save original dma map */
2904 orig_map = cm->cm_datamap;
2907 srbcmd = (struct aac_srb *)fib->data;
2908 if ((error = copyin((void *)&user_srb->data_len, &fibsize,
2909 sizeof (u_int32_t))) != 0)
2911 if (fibsize > (sc->aac_max_fib_size-sizeof(struct aac_fib_header))) {
2915 if ((error = copyin((void *)user_srb, srbcmd, fibsize)) != 0)
2918 srbcmd->function = 0; /* SRBF_ExecuteScsi */
2919 srbcmd->retry_limit = 0; /* obsolete */
2921 /* only one sg element from userspace supported */
2922 if (srbcmd->sg_map.SgCount > 1) {
2927 if (fibsize == (sizeof(struct aac_srb) +
2928 srbcmd->sg_map.SgCount * sizeof(struct aac_sg_entry))) {
2929 struct aac_sg_entry *sgp = srbcmd->sg_map.SgEntry;
2930 struct aac_sg_entry sg;
2932 if ((error = copyin(sgp, &sg, sizeof(sg))) != 0)
2935 srb_sg_bytecount = sg.SgByteCount;
2936 srb_sg_address = (u_int64_t)sg.SgAddress;
2937 } else if (fibsize == (sizeof(struct aac_srb) +
2938 srbcmd->sg_map.SgCount * sizeof(struct aac_sg_entry64))) {
2940 struct aac_sg_entry64 *sgp =
2941 (struct aac_sg_entry64 *)srbcmd->sg_map.SgEntry;
2942 struct aac_sg_entry64 sg;
2944 if ((error = copyin(sgp, &sg, sizeof(sg))) != 0)
2947 srb_sg_bytecount = sg.SgByteCount;
2948 srb_sg_address = sg.SgAddress;
2957 user_reply = (char *)arg + fibsize;
2958 srbcmd->data_len = srb_sg_bytecount;
2959 if (srbcmd->sg_map.SgCount == 1)
2962 if (transfer_data) {
2964 * Create DMA tag for the passthr. data buffer and allocate it.
2966 if (bus_dma_tag_create(sc->aac_parent_dmat, /* parent */
2967 1, 0, /* algnmnt, boundary */
2968 (sc->flags & AAC_FLAGS_SG_64BIT) ?
2969 BUS_SPACE_MAXADDR_32BIT :
2970 0x7fffffff, /* lowaddr */
2971 BUS_SPACE_MAXADDR, /* highaddr */
2972 NULL, NULL, /* filter, filterarg */
2973 srb_sg_bytecount, /* size */
2974 sc->aac_sg_tablesize, /* nsegments */
2975 srb_sg_bytecount, /* maxsegsize */
2977 NULL, NULL, /* No locking needed */
2978 &cm->cm_passthr_dmat)) {
2982 if (bus_dmamem_alloc(cm->cm_passthr_dmat, (void **)&cm->cm_data,
2983 BUS_DMA_NOWAIT, &cm->cm_datamap)) {
2987 /* fill some cm variables */
2988 cm->cm_datalen = srb_sg_bytecount;
2989 if (srbcmd->flags & AAC_SRB_FLAGS_DATA_IN)
2990 cm->cm_flags |= AAC_CMD_DATAIN;
2991 if (srbcmd->flags & AAC_SRB_FLAGS_DATA_OUT)
2992 cm->cm_flags |= AAC_CMD_DATAOUT;
2994 if (srbcmd->flags & AAC_SRB_FLAGS_DATA_OUT) {
2995 if ((error = copyin((void *)(uintptr_t)srb_sg_address,
2996 cm->cm_data, cm->cm_datalen)) != 0)
2998 /* sync required for bus_dmamem_alloc() alloc. mem.? */
2999 bus_dmamap_sync(cm->cm_passthr_dmat, cm->cm_datamap,
3000 BUS_DMASYNC_PREWRITE);
3005 fib->Header.Size = sizeof(struct aac_fib_header) +
3006 sizeof(struct aac_srb);
3007 fib->Header.XferState =
3008 AAC_FIBSTATE_HOSTOWNED |
3009 AAC_FIBSTATE_INITIALISED |
3010 AAC_FIBSTATE_EMPTY |
3011 AAC_FIBSTATE_FROMHOST |
3012 AAC_FIBSTATE_REXPECTED |
3016 fib->Header.Command = (sc->flags & AAC_FLAGS_SG_64BIT) ?
3017 ScsiPortCommandU64 : ScsiPortCommand;
3018 cm->cm_sgtable = (struct aac_sg_table *)&srbcmd->sg_map;
3020 aac_srb_tole(srbcmd);
3023 if (transfer_data) {
3024 bus_dmamap_load(cm->cm_passthr_dmat,
3025 cm->cm_datamap, cm->cm_data,
3027 aacraid_map_command_sg, cm, 0);
3029 aacraid_map_command_sg(cm, NULL, 0, 0);
3032 /* wait for completion */
3033 mtx_lock(&sc->aac_io_lock);
3034 while (!(cm->cm_flags & AAC_CMD_COMPLETED))
3035 msleep(cm, &sc->aac_io_lock, 0, "aacraid_ctlsrw2", 0);
3036 mtx_unlock(&sc->aac_io_lock);
3039 if (transfer_data && (le32toh(srbcmd->flags) & AAC_SRB_FLAGS_DATA_IN)) {
3040 if ((error = copyout(cm->cm_data,
3041 (void *)(uintptr_t)srb_sg_address,
3042 cm->cm_datalen)) != 0)
3044 /* sync required for bus_dmamem_alloc() allocated mem.? */
3045 bus_dmamap_sync(cm->cm_passthr_dmat, cm->cm_datamap,
3046 BUS_DMASYNC_POSTREAD);
3050 aac_srb_response_toh((struct aac_srb_response *)fib->data);
3051 error = copyout(fib->data, user_reply, sizeof(struct aac_srb_response));
3054 if (cm && cm->cm_data) {
3056 bus_dmamap_unload(cm->cm_passthr_dmat, cm->cm_datamap);
3057 bus_dmamem_free(cm->cm_passthr_dmat, cm->cm_data, cm->cm_datamap);
3058 cm->cm_datamap = orig_map;
3060 if (cm && cm->cm_passthr_dmat)
3061 bus_dma_tag_destroy(cm->cm_passthr_dmat);
3063 mtx_lock(&sc->aac_io_lock);
3064 aacraid_release_command(cm);
3065 mtx_unlock(&sc->aac_io_lock);
3071 * Request an AIF from the controller (new comm. type1)
3074 aac_request_aif(struct aac_softc *sc)
3076 struct aac_command *cm;
3077 struct aac_fib *fib;
3079 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3081 if (aacraid_alloc_command(sc, &cm)) {
3082 sc->aif_pending = 1;
3085 sc->aif_pending = 0;
3089 fib->Header.Size = sizeof(struct aac_fib);
3090 fib->Header.XferState =
3091 AAC_FIBSTATE_HOSTOWNED |
3092 AAC_FIBSTATE_INITIALISED |
3093 AAC_FIBSTATE_EMPTY |
3094 AAC_FIBSTATE_FROMHOST |
3095 AAC_FIBSTATE_REXPECTED |
3098 /* set AIF marker */
3099 fib->Header.Handle = 0x00800000;
3100 fib->Header.Command = AifRequest;
3101 ((struct aac_aif_command *)fib->data)->command = htole32(AifReqEvent);
3103 aacraid_map_command_sg(cm, NULL, 0, 0);
3108 * cdevpriv interface private destructor.
3111 aac_cdevpriv_dtor(void *arg)
3113 struct aac_softc *sc;
3116 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3117 device_unbusy(sc->aac_dev);
3121 * Handle an AIF sent to us by the controller; queue it for later reference.
3122 * If the queue fills up, then drop the older entries.
3125 aac_handle_aif(struct aac_softc *sc, struct aac_fib *fib)
3127 struct aac_aif_command *aif;
3128 struct aac_container *co, *co_next;
3129 struct aac_fib_context *ctx;
3130 struct aac_fib *sync_fib;
3131 struct aac_mntinforesp mir;
3132 int next, current, found;
3133 int count = 0, changed = 0, i = 0;
3134 u_int32_t channel, uid;
3136 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3138 aif = (struct aac_aif_command*)&fib->data[0];
3139 aacraid_print_aif(sc, aif);
3141 /* Is it an event that we should care about? */
3142 switch (le32toh(aif->command)) {
3143 case AifCmdEventNotify:
3144 switch (le32toh(aif->data.EN.type)) {
3145 case AifEnAddContainer:
3146 case AifEnDeleteContainer:
3148 * A container was added or deleted, but the message
3149 * doesn't tell us anything else! Re-enumerate the
3150 * containers and sort things out.
3152 aac_alloc_sync_fib(sc, &sync_fib);
3155 * Ask the controller for its containers one at
3157 * XXX What if the controller's list changes
3158 * midway through this enumaration?
3159 * XXX This should be done async.
3161 if (aac_get_container_info(sc, sync_fib, i,
3165 count = mir.MntRespCount;
3167 * Check the container against our list.
3168 * co->co_found was already set to 0 in a
3171 if ((mir.Status == ST_OK) &&
3172 (mir.MntTable[0].VolType != CT_NONE)) {
3175 &sc->aac_container_tqh,
3177 if (co->co_mntobj.ObjectId ==
3178 mir.MntTable[0].ObjectId) {
3185 * If the container matched, continue
3194 * This is a new container. Do all the
3195 * appropriate things to set it up.
3197 aac_add_container(sc, &mir, 1, uid);
3201 } while ((i < count) && (i < AAC_MAX_CONTAINERS));
3202 aac_release_sync_fib(sc);
3205 * Go through our list of containers and see which ones
3206 * were not marked 'found'. Since the controller didn't
3207 * list them they must have been deleted. Do the
3208 * appropriate steps to destroy the device. Also reset
3209 * the co->co_found field.
3211 co = TAILQ_FIRST(&sc->aac_container_tqh);
3212 while (co != NULL) {
3213 if (co->co_found == 0) {
3214 co_next = TAILQ_NEXT(co, co_link);
3215 TAILQ_REMOVE(&sc->aac_container_tqh, co,
3217 free(co, M_AACRAIDBUF);
3222 co = TAILQ_NEXT(co, co_link);
3226 /* Attach the newly created containers */
3228 if (sc->cam_rescan_cb != NULL)
3229 sc->cam_rescan_cb(sc, 0,
3230 AAC_CAM_TARGET_WILDCARD);
3235 case AifEnEnclosureManagement:
3236 switch (le32toh(aif->data.EN.data.EEE.eventType)) {
3237 case AIF_EM_DRIVE_INSERTION:
3238 case AIF_EM_DRIVE_REMOVAL:
3239 channel = le32toh(aif->data.EN.data.EEE.unitID);
3240 if (sc->cam_rescan_cb != NULL)
3241 sc->cam_rescan_cb(sc,
3242 ((channel>>24) & 0xF) + 1,
3243 (channel & 0xFFFF));
3249 case AifEnDeleteJBOD:
3250 case AifRawDeviceRemove:
3251 channel = le32toh(aif->data.EN.data.ECE.container);
3252 if (sc->cam_rescan_cb != NULL)
3253 sc->cam_rescan_cb(sc, ((channel>>24) & 0xF) + 1,
3254 AAC_CAM_TARGET_WILDCARD);
3265 /* Copy the AIF data to the AIF queue for ioctl retrieval */
3266 current = sc->aifq_idx;
3267 next = (current + 1) % AAC_AIFQ_LENGTH;
3269 sc->aifq_filled = 1;
3270 bcopy(fib, &sc->aac_aifq[current], sizeof(struct aac_fib));
3271 /* Make aifq's FIB header and data LE */
3272 aac_fib_header_tole(&sc->aac_aifq[current].Header);
3273 /* modify AIF contexts */
3274 if (sc->aifq_filled) {
3275 for (ctx = sc->fibctx; ctx; ctx = ctx->next) {
3276 if (next == ctx->ctx_idx)
3278 else if (current == ctx->ctx_idx && ctx->ctx_wrap)
3279 ctx->ctx_idx = next;
3282 sc->aifq_idx = next;
3283 /* On the off chance that someone is sleeping for an aif... */
3284 if (sc->aac_state & AAC_STATE_AIF_SLEEPER)
3285 wakeup(sc->aac_aifq);
3286 /* Wakeup any poll()ers */
3287 selwakeuppri(&sc->rcv_select, PRIBIO);
3293 * Return the Revision of the driver to userspace and check to see if the
3294 * userspace app is possibly compatible. This is extremely bogus since
3295 * our driver doesn't follow Adaptec's versioning system. Cheat by just
3296 * returning what the card reported.
3299 aac_rev_check(struct aac_softc *sc, caddr_t udata)
3301 struct aac_rev_check rev_check;
3302 struct aac_rev_check_resp rev_check_resp;
3305 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3308 * Copyin the revision struct from userspace
3310 if ((error = copyin(udata, (caddr_t)&rev_check,
3311 sizeof(struct aac_rev_check))) != 0) {
3315 fwprintf(sc, HBA_FLAGS_DBG_IOCTL_COMMANDS_B, "Userland revision= %d\n",
3316 rev_check.callingRevision.buildNumber);
3319 * Doctor up the response struct.
3321 rev_check_resp.possiblyCompatible = 1;
3322 rev_check_resp.adapterSWRevision.external.comp.major =
3323 AAC_DRIVER_MAJOR_VERSION;
3324 rev_check_resp.adapterSWRevision.external.comp.minor =
3325 AAC_DRIVER_MINOR_VERSION;
3326 rev_check_resp.adapterSWRevision.external.comp.type =
3328 rev_check_resp.adapterSWRevision.external.comp.dash =
3329 AAC_DRIVER_BUGFIX_LEVEL;
3330 rev_check_resp.adapterSWRevision.buildNumber =
3333 return(copyout((caddr_t)&rev_check_resp, udata,
3334 sizeof(struct aac_rev_check_resp)));
3338 * Pass the fib context to the caller
3341 aac_open_aif(struct aac_softc *sc, caddr_t arg)
3343 struct aac_fib_context *fibctx, *ctx;
3346 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3348 fibctx = malloc(sizeof(struct aac_fib_context), M_AACRAIDBUF, M_NOWAIT|M_ZERO);
3352 mtx_lock(&sc->aac_io_lock);
3353 /* all elements are already 0, add to queue */
3354 if (sc->fibctx == NULL)
3355 sc->fibctx = fibctx;
3357 for (ctx = sc->fibctx; ctx->next; ctx = ctx->next)
3363 /* evaluate unique value */
3364 fibctx->unique = (*(u_int32_t *)&fibctx & 0xffffffff);
3366 while (ctx != fibctx) {
3367 if (ctx->unique == fibctx->unique) {
3375 error = copyout(&fibctx->unique, (void *)arg, sizeof(u_int32_t));
3376 mtx_unlock(&sc->aac_io_lock);
3378 aac_close_aif(sc, (caddr_t)ctx);
3383 * Close the caller's fib context
3386 aac_close_aif(struct aac_softc *sc, caddr_t arg)
3388 struct aac_fib_context *ctx;
3390 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3392 mtx_lock(&sc->aac_io_lock);
3393 for (ctx = sc->fibctx; ctx; ctx = ctx->next) {
3394 if (ctx->unique == *(uint32_t *)&arg) {
3395 if (ctx == sc->fibctx)
3398 ctx->prev->next = ctx->next;
3400 ctx->next->prev = ctx->prev;
3406 free(ctx, M_AACRAIDBUF);
3408 mtx_unlock(&sc->aac_io_lock);
3413 * Pass the caller the next AIF in their queue
3416 aac_getnext_aif(struct aac_softc *sc, caddr_t arg)
3418 struct get_adapter_fib_ioctl agf;
3419 struct aac_fib_context *ctx;
3422 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3424 mtx_lock(&sc->aac_io_lock);
3425 #ifdef COMPAT_FREEBSD32
3426 if (SV_CURPROC_FLAG(SV_ILP32)) {
3427 struct get_adapter_fib_ioctl32 agf32;
3428 error = copyin(arg, &agf32, sizeof(agf32));
3430 agf.AdapterFibContext = agf32.AdapterFibContext;
3431 agf.Wait = agf32.Wait;
3432 agf.AifFib = (caddr_t)(uintptr_t)agf32.AifFib;
3436 error = copyin(arg, &agf, sizeof(agf));
3438 for (ctx = sc->fibctx; ctx; ctx = ctx->next) {
3439 if (agf.AdapterFibContext == ctx->unique)
3443 mtx_unlock(&sc->aac_io_lock);
3447 error = aac_return_aif(sc, ctx, agf.AifFib);
3448 if (error == EAGAIN && agf.Wait) {
3449 fwprintf(sc, HBA_FLAGS_DBG_AIF_B, "aac_getnext_aif(): waiting for AIF");
3450 sc->aac_state |= AAC_STATE_AIF_SLEEPER;
3451 while (error == EAGAIN) {
3452 mtx_unlock(&sc->aac_io_lock);
3453 error = tsleep(sc->aac_aifq, PRIBIO |
3454 PCATCH, "aacaif", 0);
3455 mtx_lock(&sc->aac_io_lock);
3457 error = aac_return_aif(sc, ctx, agf.AifFib);
3459 sc->aac_state &= ~AAC_STATE_AIF_SLEEPER;
3462 mtx_unlock(&sc->aac_io_lock);
3467 * Hand the next AIF off the top of the queue out to userspace.
3470 aac_return_aif(struct aac_softc *sc, struct aac_fib_context *ctx, caddr_t uptr)
3474 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3476 current = ctx->ctx_idx;
3477 if (current == sc->aifq_idx && !ctx->ctx_wrap) {
3482 copyout(&sc->aac_aifq[current], (void *)uptr, sizeof(struct aac_fib));
3484 device_printf(sc->aac_dev,
3485 "aac_return_aif: copyout returned %d\n", error);
3488 ctx->ctx_idx = (current + 1) % AAC_AIFQ_LENGTH;
3494 aac_get_pci_info(struct aac_softc *sc, caddr_t uptr)
3496 struct aac_pci_info {
3502 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3504 pciinf.bus = pci_get_bus(sc->aac_dev);
3505 pciinf.slot = pci_get_slot(sc->aac_dev);
3507 error = copyout((caddr_t)&pciinf, uptr,
3508 sizeof(struct aac_pci_info));
3514 aac_supported_features(struct aac_softc *sc, caddr_t uptr)
3516 struct aac_features f;
3519 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3521 if ((error = copyin(uptr, &f, sizeof (f))) != 0)
3525 * When the management driver receives FSACTL_GET_FEATURES ioctl with
3526 * ALL zero in the featuresState, the driver will return the current
3527 * state of all the supported features, the data field will not be
3529 * When the management driver receives FSACTL_GET_FEATURES ioctl with
3530 * a specific bit set in the featuresState, the driver will return the
3531 * current state of this specific feature and whatever data that are
3532 * associated with the feature in the data field or perform whatever
3533 * action needed indicates in the data field.
3535 if (f.feat.fValue == 0) {
3536 f.feat.fBits.largeLBA =
3537 (sc->flags & AAC_FLAGS_LBA_64BIT) ? 1 : 0;
3538 f.feat.fBits.JBODSupport = 1;
3539 /* TODO: In the future, add other features state here as well */
3541 if (f.feat.fBits.largeLBA)
3542 f.feat.fBits.largeLBA =
3543 (sc->flags & AAC_FLAGS_LBA_64BIT) ? 1 : 0;
3544 /* TODO: Add other features state and data in the future */
3547 error = copyout(&f, uptr, sizeof (f));
3552 * Give the userland some information about the container. The AAC arch
3553 * expects the driver to be a SCSI passthrough type driver, so it expects
3554 * the containers to have b:t:l numbers. Fake it.
3557 aac_query_disk(struct aac_softc *sc, caddr_t uptr)
3559 struct aac_query_disk query_disk;
3560 struct aac_container *co;
3563 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3565 mtx_lock(&sc->aac_io_lock);
3566 error = copyin(uptr, (caddr_t)&query_disk,
3567 sizeof(struct aac_query_disk));
3569 mtx_unlock(&sc->aac_io_lock);
3573 id = query_disk.ContainerNumber;
3575 mtx_unlock(&sc->aac_io_lock);
3579 TAILQ_FOREACH(co, &sc->aac_container_tqh, co_link) {
3580 if (co->co_mntobj.ObjectId == id)
3585 query_disk.Valid = 0;
3586 query_disk.Locked = 0;
3587 query_disk.Deleted = 1; /* XXX is this right? */
3589 query_disk.Valid = 1;
3590 query_disk.Locked = 1;
3591 query_disk.Deleted = 0;
3592 query_disk.Bus = device_get_unit(sc->aac_dev);
3593 query_disk.Target = 0;
3595 query_disk.UnMapped = 0;
3598 error = copyout((caddr_t)&query_disk, uptr,
3599 sizeof(struct aac_query_disk));
3601 mtx_unlock(&sc->aac_io_lock);
3606 aac_container_bus(struct aac_softc *sc)
3608 struct aac_sim *sim;
3611 sim =(struct aac_sim *)malloc(sizeof(struct aac_sim),
3612 M_AACRAIDBUF, M_NOWAIT | M_ZERO);
3614 device_printf(sc->aac_dev,
3615 "No memory to add container bus\n");
3616 panic("Out of memory?!");
3618 child = device_add_child(sc->aac_dev, "aacraidp", -1);
3619 if (child == NULL) {
3620 device_printf(sc->aac_dev,
3621 "device_add_child failed for container bus\n");
3622 free(sim, M_AACRAIDBUF);
3623 panic("Out of memory?!");
3626 sim->TargetsPerBus = AAC_MAX_CONTAINERS;
3628 sim->BusType = CONTAINER_BUS;
3629 sim->InitiatorBusId = -1;
3631 sim->sim_dev = child;
3632 sim->aac_cam = NULL;
3634 device_set_ivars(child, sim);
3635 device_set_desc(child, "Container Bus");
3636 TAILQ_INSERT_TAIL(&sc->aac_sim_tqh, sim, sim_link);
3638 device_set_desc(child, aac_describe_code(aac_container_types,
3639 mir->MntTable[0].VolType));
3641 bus_generic_attach(sc->aac_dev);
3645 aac_get_bus_info(struct aac_softc *sc)
3647 struct aac_fib *fib;
3648 struct aac_ctcfg *c_cmd;
3649 struct aac_ctcfg_resp *c_resp;
3650 struct aac_vmioctl *vmi;
3651 struct aac_vmi_businf_resp *vmi_resp;
3652 struct aac_getbusinf businfo;
3653 struct aac_sim *caminf;
3657 mtx_lock(&sc->aac_io_lock);
3658 aac_alloc_sync_fib(sc, &fib);
3659 c_cmd = (struct aac_ctcfg *)&fib->data[0];
3660 bzero(c_cmd, sizeof(struct aac_ctcfg));
3662 c_cmd->Command = VM_ContainerConfig;
3663 c_cmd->cmd = CT_GET_SCSI_METHOD;
3666 aac_ctcfg_tole(c_cmd);
3667 error = aac_sync_fib(sc, ContainerCommand, 0, fib,
3668 sizeof(struct aac_ctcfg));
3670 device_printf(sc->aac_dev, "Error %d sending "
3671 "VM_ContainerConfig command\n", error);
3672 aac_release_sync_fib(sc);
3673 mtx_unlock(&sc->aac_io_lock);
3677 c_resp = (struct aac_ctcfg_resp *)&fib->data[0];
3678 aac_ctcfg_resp_toh(c_resp);
3679 if (c_resp->Status != ST_OK) {
3680 device_printf(sc->aac_dev, "VM_ContainerConfig returned 0x%x\n",
3682 aac_release_sync_fib(sc);
3683 mtx_unlock(&sc->aac_io_lock);
3687 sc->scsi_method_id = c_resp->param;
3689 vmi = (struct aac_vmioctl *)&fib->data[0];
3690 bzero(vmi, sizeof(struct aac_vmioctl));
3692 vmi->Command = VM_Ioctl;
3693 vmi->ObjType = FT_DRIVE;
3694 vmi->MethId = sc->scsi_method_id;
3696 vmi->IoctlCmd = GetBusInfo;
3698 aac_vmioctl_tole(vmi);
3699 error = aac_sync_fib(sc, ContainerCommand, 0, fib,
3700 sizeof(struct aac_vmi_businf_resp));
3702 device_printf(sc->aac_dev, "Error %d sending VMIoctl command\n",
3704 aac_release_sync_fib(sc);
3705 mtx_unlock(&sc->aac_io_lock);
3709 vmi_resp = (struct aac_vmi_businf_resp *)&fib->data[0];
3710 aac_vmi_businf_resp_toh(vmi_resp);
3711 if (vmi_resp->Status != ST_OK) {
3712 device_printf(sc->aac_dev, "VM_Ioctl returned %d\n",
3714 aac_release_sync_fib(sc);
3715 mtx_unlock(&sc->aac_io_lock);
3719 bcopy(&vmi_resp->BusInf, &businfo, sizeof(struct aac_getbusinf));
3720 aac_release_sync_fib(sc);
3721 mtx_unlock(&sc->aac_io_lock);
3723 for (i = 0; i < businfo.BusCount; i++) {
3724 if (businfo.BusValid[i] != AAC_BUS_VALID)
3727 caminf = (struct aac_sim *)malloc( sizeof(struct aac_sim),
3728 M_AACRAIDBUF, M_NOWAIT | M_ZERO);
3729 if (caminf == NULL) {
3730 device_printf(sc->aac_dev,
3731 "No memory to add passthrough bus %d\n", i);
3735 child = device_add_child(sc->aac_dev, "aacraidp", -1);
3736 if (child == NULL) {
3737 device_printf(sc->aac_dev,
3738 "device_add_child failed for passthrough bus %d\n",
3740 free(caminf, M_AACRAIDBUF);
3744 caminf->TargetsPerBus = businfo.TargetsPerBus;
3745 caminf->BusNumber = i+1;
3746 caminf->BusType = PASSTHROUGH_BUS;
3747 caminf->InitiatorBusId = -1;
3748 caminf->aac_sc = sc;
3749 caminf->sim_dev = child;
3750 caminf->aac_cam = NULL;
3752 device_set_ivars(child, caminf);
3753 device_set_desc(child, "SCSI Passthrough Bus");
3754 TAILQ_INSERT_TAIL(&sc->aac_sim_tqh, caminf, sim_link);
3759 * Check to see if the kernel is up and running. If we are in a
3760 * BlinkLED state, return the BlinkLED code.
3763 aac_check_adapter_health(struct aac_softc *sc, u_int8_t *bled)
3767 ret = AAC_GET_FWSTATUS(sc);
3769 if (ret & AAC_UP_AND_RUNNING)
3771 else if (ret & AAC_KERNEL_PANIC && bled)
3772 *bled = (ret >> 16) & 0xff;
3778 * Once do an IOP reset, basically have to re-initialize the card as
3779 * if coming up from a cold boot, and the driver is responsible for
3780 * any IO that was outstanding to the adapter at the time of the IOP
3781 * RESET. And prepare the driver for IOP RESET by making the init code
3782 * modular with the ability to call it from multiple places.
3785 aac_reset_adapter(struct aac_softc *sc)
3787 struct aac_command *cm;
3788 struct aac_fib *fib;
3789 struct aac_pause_command *pc;
3790 u_int32_t status, reset_mask, waitCount, max_msix_orig;
3791 int ret, msi_enabled_orig;
3793 fwprintf(sc, HBA_FLAGS_DBG_FUNCTION_ENTRY_B, "");
3794 mtx_assert(&sc->aac_io_lock, MA_OWNED);
3796 if (sc->aac_state & AAC_STATE_RESET) {
3797 device_printf(sc->aac_dev, "aac_reset_adapter() already in progress\n");
3800 sc->aac_state |= AAC_STATE_RESET;
3802 /* disable interrupt */
3803 AAC_ACCESS_DEVREG(sc, AAC_DISABLE_INTERRUPT);
3806 * Abort all pending commands:
3807 * a) on the controller
3809 while ((cm = aac_dequeue_busy(sc)) != NULL) {
3810 cm->cm_flags |= AAC_CMD_RESET;
3812 /* is there a completion handler? */
3813 if (cm->cm_complete != NULL) {
3814 cm->cm_complete(cm);
3816 /* assume that someone is sleeping on this
3823 /* b) in the waiting queues */
3824 while ((cm = aac_dequeue_ready(sc)) != NULL) {
3825 cm->cm_flags |= AAC_CMD_RESET;
3827 /* is there a completion handler? */
3828 if (cm->cm_complete != NULL) {
3829 cm->cm_complete(cm);
3831 /* assume that someone is sleeping on this
3839 if (aac_check_adapter_health(sc, NULL) == 0) {
3840 mtx_unlock(&sc->aac_io_lock);
3841 (void) aacraid_shutdown(sc->aac_dev);
3842 mtx_lock(&sc->aac_io_lock);
3845 /* execute IOP reset */
3846 if (sc->aac_support_opt2 & AAC_SUPPORTED_MU_RESET) {
3847 AAC_MEM0_SETREG4(sc, AAC_IRCSR, AAC_IRCSR_CORES_RST);
3849 /* We need to wait for 5 seconds before accessing the MU again
3850 * 10000 * 100us = 1000,000us = 1000ms = 1s
3852 waitCount = 5 * 10000;
3854 DELAY(100); /* delay 100 microseconds */
3858 ret = aacraid_sync_command(sc, AAC_IOP_RESET_ALWAYS,
3859 0, 0, 0, 0, &status, &reset_mask);
3860 if (ret && !sc->doorbell_mask) {
3861 /* call IOP_RESET for older firmware */
3862 if ((aacraid_sync_command(sc, AAC_IOP_RESET, 0,0,0,0,
3863 &status, NULL)) != 0) {
3864 if (status == AAC_SRB_STS_INVALID_REQUEST) {
3865 device_printf(sc->aac_dev,
3866 "IOP_RESET not supported\n");
3868 /* probably timeout */
3869 device_printf(sc->aac_dev,
3870 "IOP_RESET failed\n");
3873 /* unwind aac_shutdown() */
3874 aac_alloc_sync_fib(sc, &fib);
3875 pc = (struct aac_pause_command *)&fib->data[0];
3876 pc->Command = VM_ContainerConfig;
3877 pc->Type = CT_PAUSE_IO;
3882 aac_pause_command_tole(pc);
3883 (void) aac_sync_fib(sc, ContainerCommand, 0,
3884 fib, sizeof (struct aac_pause_command));
3885 aac_release_sync_fib(sc);
3889 } else if (sc->doorbell_mask) {
3891 reset_mask = sc->doorbell_mask;
3894 (sc->aac_support_opt2 & AAC_SUPPORTED_DOORBELL_RESET)) {
3895 AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, reset_mask);
3897 * We need to wait for 5 seconds before accessing the
3899 * 10000 * 100us = 1000,000us = 1000ms = 1s
3901 waitCount = 5 * 10000;
3903 DELAY(100); /* delay 100 microseconds */
3910 * Initialize the adapter.
3912 max_msix_orig = sc->aac_max_msix;
3913 msi_enabled_orig = sc->msi_enabled;
3914 sc->msi_enabled = FALSE;
3915 if (aac_check_firmware(sc) != 0)
3917 if (!(sc->flags & AAC_FLAGS_SYNC_MODE)) {
3918 sc->aac_max_msix = max_msix_orig;
3919 if (msi_enabled_orig) {
3920 sc->msi_enabled = msi_enabled_orig;
3921 AAC_ACCESS_DEVREG(sc, AAC_ENABLE_MSIX);
3923 mtx_unlock(&sc->aac_io_lock);
3925 mtx_lock(&sc->aac_io_lock);
3929 sc->aac_state &= ~AAC_STATE_RESET;
3930 AAC_ACCESS_DEVREG(sc, AAC_ENABLE_INTERRUPT);
3931 aacraid_startio(sc);