2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
35 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
39 #include <sys/power.h>
44 #include <dev/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/bus.h>
49 #include <contrib/dev/acpica/acpi.h>
50 #include <dev/acpica/acpivar.h>
53 * Support for ACPI Processor devices, including C[1-3] sleep states.
56 /* Hooks for the ACPI CA debugging infrastructure */
57 #define _COMPONENT ACPI_PROCESSOR
58 ACPI_MODULE_NAME("PROCESSOR")
61 struct resource *p_lvlx; /* Register to read to enter state. */
62 uint32_t type; /* C1-3 (C4 and up treated as C3). */
63 uint32_t trans_lat; /* Transition latency (usec). */
64 uint32_t power; /* Power consumed (mW). */
65 int res_type; /* Resource type for p_lvlx. */
67 #define MAX_CX_STATES 8
69 struct acpi_cpu_softc {
71 ACPI_HANDLE cpu_handle;
72 struct pcpu *cpu_pcpu;
73 uint32_t cpu_acpi_id; /* ACPI processor id */
74 uint32_t cpu_p_blk; /* ACPI P_BLK location */
75 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
76 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
77 int cpu_cx_count; /* Number of valid Cx states. */
78 int cpu_prev_sleep;/* Last idle sleep duration. */
79 int cpu_features; /* Child driver supported features. */
81 int cpu_non_c3; /* Index of lowest non-C3 state. */
82 int cpu_short_slp; /* Count of < 1us sleeps. */
83 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
84 /* Values for sysctl. */
85 struct sysctl_ctx_list cpu_sysctl_ctx;
86 struct sysctl_oid *cpu_sysctl_tree;
88 char cpu_cx_supported[64];
92 struct acpi_cpu_device {
93 struct resource_list ad_rl;
96 #define CPU_GET_REG(reg, width) \
97 (bus_space_read_ ## width(rman_get_bustag((reg)), \
98 rman_get_bushandle((reg)), 0))
99 #define CPU_SET_REG(reg, width, val) \
100 (bus_space_write_ ## width(rman_get_bustag((reg)), \
101 rman_get_bushandle((reg)), 0, (val)))
103 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
105 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */
107 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
108 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
110 #define PCI_VENDOR_INTEL 0x8086
111 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
112 #define PCI_REVISION_A_STEP 0
113 #define PCI_REVISION_B_STEP 1
114 #define PCI_REVISION_4E 2
115 #define PCI_REVISION_4M 3
117 /* Platform hardware resource information. */
118 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
119 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
120 static int cpu_quirks; /* Indicate any hardware bugs. */
123 static int cpu_disable_idle; /* Disable entry to idle function */
124 static int cpu_cx_count; /* Number of valid Cx states */
126 /* Values for sysctl. */
127 static struct sysctl_ctx_list cpu_sysctl_ctx;
128 static struct sysctl_oid *cpu_sysctl_tree;
129 static int cpu_cx_generic;
130 static int cpu_cx_lowest;
132 static device_t *cpu_devices;
133 static int cpu_ndevices;
134 static struct acpi_cpu_softc **cpu_softc;
135 ACPI_SERIAL_DECL(cpu, "ACPI CPU");
137 static int acpi_cpu_probe(device_t dev);
138 static int acpi_cpu_attach(device_t dev);
139 static int acpi_cpu_suspend(device_t dev);
140 static int acpi_cpu_resume(device_t dev);
141 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
143 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
144 static device_t acpi_cpu_add_child(device_t dev, int order, const char *name,
146 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index,
148 static int acpi_cpu_shutdown(device_t dev);
149 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
150 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc);
151 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
152 static void acpi_cpu_startup(void *arg);
153 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc);
154 static void acpi_cpu_idle(void);
155 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
156 static int acpi_cpu_quirks(void);
157 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
158 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val);
159 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
160 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
162 static device_method_t acpi_cpu_methods[] = {
163 /* Device interface */
164 DEVMETHOD(device_probe, acpi_cpu_probe),
165 DEVMETHOD(device_attach, acpi_cpu_attach),
166 DEVMETHOD(device_detach, bus_generic_detach),
167 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
168 DEVMETHOD(device_suspend, acpi_cpu_suspend),
169 DEVMETHOD(device_resume, acpi_cpu_resume),
172 DEVMETHOD(bus_add_child, acpi_cpu_add_child),
173 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar),
174 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
175 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
176 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
177 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
178 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
179 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
180 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
181 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
182 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
183 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
188 static driver_t acpi_cpu_driver = {
191 sizeof(struct acpi_cpu_softc),
194 static devclass_t acpi_cpu_devclass;
195 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
196 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
199 acpi_cpu_probe(device_t dev)
207 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
210 handle = acpi_get_handle(dev);
211 if (cpu_softc == NULL)
212 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
213 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
215 /* Get our Processor object. */
217 buf.Length = ACPI_ALLOCATE_BUFFER;
218 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
219 if (ACPI_FAILURE(status)) {
220 device_printf(dev, "probe failed to get Processor obj - %s\n",
221 AcpiFormatException(status));
224 obj = (ACPI_OBJECT *)buf.Pointer;
225 if (obj->Type != ACPI_TYPE_PROCESSOR) {
226 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
232 * Find the processor associated with our unit. We could use the
233 * ProcId as a key, however, some boxes do not have the same values
234 * in their Processor object as the ProcId values in the MADT.
236 acpi_id = obj->Processor.ProcId;
238 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
242 * Check if we already probed this processor. We scan the bus twice
243 * so it's possible we've already seen this one.
245 if (cpu_softc[cpu_id] != NULL)
248 /* Mark this processor as in-use and save our derived id for attach. */
249 cpu_softc[cpu_id] = (void *)1;
250 acpi_set_magic(dev, cpu_id);
251 device_set_desc(dev, "ACPI CPU");
257 acpi_cpu_attach(device_t dev)
260 ACPI_OBJECT arg, *obj;
261 ACPI_OBJECT_LIST arglist;
262 struct pcpu *pcpu_data;
263 struct acpi_cpu_softc *sc;
264 struct acpi_softc *acpi_sc;
267 int cpu_id, drv_count, i;
271 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
273 sc = device_get_softc(dev);
275 sc->cpu_handle = acpi_get_handle(dev);
276 cpu_id = acpi_get_magic(dev);
277 cpu_softc[cpu_id] = sc;
278 pcpu_data = pcpu_find(cpu_id);
279 pcpu_data->pc_device = dev;
280 sc->cpu_pcpu = pcpu_data;
281 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand;
282 cpu_cst_cnt = AcpiGbl_FADT.CstControl;
285 buf.Length = ACPI_ALLOCATE_BUFFER;
286 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
287 if (ACPI_FAILURE(status)) {
288 device_printf(dev, "attach failed to get Processor obj - %s\n",
289 AcpiFormatException(status));
292 obj = (ACPI_OBJECT *)buf.Pointer;
293 sc->cpu_p_blk = obj->Processor.PblkAddress;
294 sc->cpu_p_blk_len = obj->Processor.PblkLength;
295 sc->cpu_acpi_id = obj->Processor.ProcId;
297 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
298 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
301 * If this is the first cpu we attach, create and initialize the generic
302 * resources that will be used by all acpi cpu devices.
304 if (device_get_unit(dev) == 0) {
305 /* Assume we won't be using generic Cx mode by default */
306 cpu_cx_generic = FALSE;
308 /* Install hw.acpi.cpu sysctl tree */
309 acpi_sc = acpi_device_get_parent_softc(dev);
310 sysctl_ctx_init(&cpu_sysctl_ctx);
311 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx,
312 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
313 CTLFLAG_RD, 0, "node for CPU children");
315 /* Queue post cpu-probing task handler */
316 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL);
320 * Before calling any CPU methods, collect child driver feature hints
321 * and notify ACPI of them. We support unified SMP power control
322 * so advertise this ourselves. Note this is not the same as independent
323 * SMP control where each CPU can have different settings.
325 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3;
326 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
327 for (i = 0; i < drv_count; i++) {
328 if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
329 sc->cpu_features |= features;
331 free(drivers, M_TEMP);
335 * CPU capabilities are specified as a buffer of 32-bit integers:
336 * revision, count, and one or more capabilities. The revision of
337 * "1" is not specified anywhere but seems to match Linux. We should
338 * also support _OSC here.
340 if (sc->cpu_features) {
341 arglist.Pointer = &arg;
343 arg.Type = ACPI_TYPE_BUFFER;
344 arg.Buffer.Length = sizeof(cap_set);
345 arg.Buffer.Pointer = (uint8_t *)cap_set;
346 cap_set[0] = 1; /* revision */
347 cap_set[1] = 1; /* number of capabilities integers */
348 cap_set[2] = sc->cpu_features;
349 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL);
352 /* Probe for Cx state support. */
353 acpi_cpu_cx_probe(sc);
355 /* Finally, call identify and probe/attach for child devices. */
356 bus_generic_probe(dev);
357 bus_generic_attach(dev);
363 * Disable any entry to the idle function during suspend and re-enable it
367 acpi_cpu_suspend(device_t dev)
371 error = bus_generic_suspend(dev);
374 cpu_disable_idle = TRUE;
379 acpi_cpu_resume(device_t dev)
382 cpu_disable_idle = FALSE;
383 return (bus_generic_resume(dev));
387 * Find the nth present CPU and return its pc_cpuid as well as set the
388 * pc_acpi_id from the most reliable source.
391 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
393 struct pcpu *pcpu_data;
396 KASSERT(acpi_id != NULL, ("Null acpi_id"));
397 KASSERT(cpu_id != NULL, ("Null cpu_id"));
398 for (i = 0; i <= mp_maxid; i++) {
401 pcpu_data = pcpu_find(i);
402 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i));
405 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
406 * override it with the value from the ASL. Otherwise, if the
407 * two don't match, prefer the MADT-derived value. Finally,
408 * return the pc_cpuid to reference this processor.
410 if (pcpu_data->pc_acpi_id == 0xffffffff)
411 pcpu_data->pc_acpi_id = *acpi_id;
412 else if (pcpu_data->pc_acpi_id != *acpi_id)
413 *acpi_id = pcpu_data->pc_acpi_id;
414 *cpu_id = pcpu_data->pc_cpuid;
422 static struct resource_list *
423 acpi_cpu_get_rlist(device_t dev, device_t child)
425 struct acpi_cpu_device *ad;
427 ad = device_get_ivars(child);
434 acpi_cpu_add_child(device_t dev, int order, const char *name, int unit)
436 struct acpi_cpu_device *ad;
439 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
442 resource_list_init(&ad->ad_rl);
444 child = device_add_child_ordered(dev, order, name, unit);
446 device_set_ivars(child, ad);
453 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
455 struct acpi_cpu_softc *sc;
457 sc = device_get_softc(dev);
459 case ACPI_IVAR_HANDLE:
460 *result = (uintptr_t)sc->cpu_handle;
463 *result = (uintptr_t)sc->cpu_pcpu;
472 acpi_cpu_shutdown(device_t dev)
474 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
476 /* Allow children to shutdown first. */
477 bus_generic_shutdown(dev);
479 /* Disable any entry to the idle function. */
480 cpu_disable_idle = TRUE;
482 /* Signal and wait for all processors to exit acpi_cpu_idle(). */
483 smp_rendezvous(NULL, NULL, NULL, NULL);
489 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
491 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
493 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
494 sc->cpu_prev_sleep = 1000000;
495 sc->cpu_cx_lowest = 0;
498 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
499 * any, we'll revert to generic FADT/P_BLK Cx control method which will
500 * be handled by acpi_cpu_startup. We need to defer to after having
501 * probed all the cpus in the system before probing for generic Cx
502 * states as we may already have found cpus with valid _CST packages
504 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) {
506 * We were unable to find a _CST package for this cpu or there
507 * was an error parsing it. Switch back to generic mode.
509 cpu_cx_generic = TRUE;
511 device_printf(sc->cpu_dev, "switching to generic Cx mode\n");
515 * TODO: _CSD Package should be checked here.
520 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc)
522 ACPI_GENERIC_ADDRESS gas;
523 struct acpi_cx *cx_ptr;
525 sc->cpu_cx_count = 0;
526 cx_ptr = sc->cpu_cx_states;
528 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
529 sc->cpu_prev_sleep = 1000000;
531 /* C1 has been required since just after ACPI 1.0 */
532 cx_ptr->type = ACPI_STATE_C1;
533 cx_ptr->trans_lat = 0;
538 * The spec says P_BLK must be 6 bytes long. However, some systems
539 * use it to indicate a fractional set of features present so we
540 * take 5 as C2. Some may also have a value of 7 to indicate
541 * another C3 but most use _CST for this (as required) and having
542 * "only" C1-C3 is not a hardship.
544 if (sc->cpu_p_blk_len < 5)
547 /* Validate and allocate resources for C2 (P_LVL2). */
548 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
550 if (AcpiGbl_FADT.C2Latency <= 100) {
551 gas.Address = sc->cpu_p_blk + 4;
552 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid,
553 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
554 if (cx_ptr->p_lvlx != NULL) {
556 cx_ptr->type = ACPI_STATE_C2;
557 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
562 if (sc->cpu_p_blk_len < 6)
565 /* Validate and allocate resources for C3 (P_LVL3). */
566 if (AcpiGbl_FADT.C3Latency <= 1000) {
567 gas.Address = sc->cpu_p_blk + 5;
568 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas,
569 &cx_ptr->p_lvlx, RF_SHAREABLE);
570 if (cx_ptr->p_lvlx != NULL) {
572 cx_ptr->type = ACPI_STATE_C3;
573 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
579 /* Update the largest cx_count seen so far */
580 if (sc->cpu_cx_count > cpu_cx_count)
581 cpu_cx_count = sc->cpu_cx_count;
585 * Parse a _CST package and set up its Cx states. Since the _CST object
586 * can change dynamically, our notify handler may call this function
587 * to clean up and probe the new _CST package.
590 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
592 struct acpi_cx *cx_ptr;
600 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
603 buf.Length = ACPI_ALLOCATE_BUFFER;
604 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
605 if (ACPI_FAILURE(status))
608 /* _CST is a package with a count and at least one Cx package. */
609 top = (ACPI_OBJECT *)buf.Pointer;
610 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
611 device_printf(sc->cpu_dev, "invalid _CST package\n");
612 AcpiOsFree(buf.Pointer);
615 if (count != top->Package.Count - 1) {
616 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n",
617 count, top->Package.Count - 1);
618 count = top->Package.Count - 1;
620 if (count > MAX_CX_STATES) {
621 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
622 count = MAX_CX_STATES;
625 /* Set up all valid states. */
626 sc->cpu_cx_count = 0;
627 cx_ptr = sc->cpu_cx_states;
628 for (i = 0; i < count; i++) {
629 pkg = &top->Package.Elements[i + 1];
630 if (!ACPI_PKG_VALID(pkg, 4) ||
631 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
632 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
633 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
635 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n");
639 /* Validate the state to see if we should use it. */
640 switch (cx_ptr->type) {
647 if (cx_ptr->trans_lat > 100) {
648 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
649 "acpi_cpu%d: C2[%d] not available.\n",
650 device_get_unit(sc->cpu_dev), i));
657 if (cx_ptr->trans_lat > 1000 ||
658 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
660 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
661 "acpi_cpu%d: C3[%d] not available.\n",
662 device_get_unit(sc->cpu_dev), i));
669 /* Free up any previous register. */
670 if (cx_ptr->p_lvlx != NULL) {
671 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
672 cx_ptr->p_lvlx = NULL;
676 /* Allocate the control register for C2 or C3. */
677 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid,
678 &cx_ptr->p_lvlx, RF_SHAREABLE);
679 if (cx_ptr->p_lvlx) {
681 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
682 "acpi_cpu%d: Got C%d - %d latency\n",
683 device_get_unit(sc->cpu_dev), cx_ptr->type,
689 AcpiOsFree(buf.Pointer);
695 * Call this *after* all CPUs have been attached.
698 acpi_cpu_startup(void *arg)
700 struct acpi_cpu_softc *sc;
703 /* Get set of CPU devices */
704 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
707 * Setup any quirks that might necessary now that we have probed
713 if (cpu_cx_generic) {
715 * We are using generic Cx mode, probe for available Cx states
716 * for all processors.
718 for (i = 0; i < cpu_ndevices; i++) {
719 sc = device_get_softc(cpu_devices[i]);
720 acpi_cpu_generic_cx_probe(sc);
724 * Find the highest Cx state common to all CPUs
725 * in the system, taking quirks into account.
727 for (i = 0; i < cpu_ndevices; i++) {
728 sc = device_get_softc(cpu_devices[i]);
729 if (sc->cpu_cx_count < cpu_cx_count)
730 cpu_cx_count = sc->cpu_cx_count;
734 * We are using _CST mode, remove C3 state if necessary.
735 * Update the largest Cx state supported in the global cpu_cx_count.
736 * It will be used in the global Cx sysctl handler.
737 * As we now know for sure that we will be using _CST mode
738 * install our notify handler.
740 for (i = 0; i < cpu_ndevices; i++) {
741 sc = device_get_softc(cpu_devices[i]);
742 if (cpu_quirks && CPU_QUIRK_NO_C3) {
743 sc->cpu_cx_count = sc->cpu_non_c3 + 1;
745 if (sc->cpu_cx_count > cpu_cx_count)
746 cpu_cx_count = sc->cpu_cx_count;
747 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
748 acpi_cpu_notify, sc);
752 /* Perform Cx final initialization. */
753 for (i = 0; i < cpu_ndevices; i++) {
754 sc = device_get_softc(cpu_devices[i]);
755 acpi_cpu_startup_cx(sc);
758 /* Add a sysctl handler to handle global Cx lowest setting */
759 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree),
760 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
761 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A",
762 "Global lowest Cx sleep state to use");
764 /* Take over idling from cpu_idle_default(). */
766 cpu_disable_idle = FALSE;
767 cpu_idle_hook = acpi_cpu_idle;
771 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc)
777 * Set up the list of Cx states
780 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported),
782 for (i = 0; i < sc->cpu_cx_count; i++) {
783 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
784 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3)
790 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx,
791 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
792 OID_AUTO, "cx_supported", CTLFLAG_RD,
793 sc->cpu_cx_supported, 0,
794 "Cx/microsecond values for supported Cx states");
795 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
796 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
797 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
798 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A",
799 "lowest Cx sleep state to use");
800 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
801 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
802 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
803 (void *)sc, 0, acpi_cpu_usage_sysctl, "A",
804 "percent usage for each Cx state");
807 /* Signal platform that we can handle _CST notification. */
808 if (!cpu_cx_generic && cpu_cst_cnt != 0) {
810 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
817 * Idle the CPU in the lowest state possible. This function is called with
818 * interrupts disabled. Note that once it re-enables interrupts, a task
819 * switch can occur so do not access shared data (i.e. the softc) after
820 * interrupts are re-enabled.
825 struct acpi_cpu_softc *sc;
826 struct acpi_cx *cx_next;
827 uint32_t start_time, end_time;
828 int bm_active, cx_next_idx, i;
830 /* If disabled, return immediately. */
831 if (cpu_disable_idle) {
837 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
838 * since there is no ACPI processor object for this CPU. This occurs
839 * for logical CPUs in the HTT case.
841 sc = cpu_softc[PCPU_GET(cpuid)];
848 * If we slept 100 us or more, use the lowest Cx state. Otherwise,
849 * find the lowest state that has a latency less than or equal to
850 * the length of our last sleep.
852 cx_next_idx = sc->cpu_cx_lowest;
853 if (sc->cpu_prev_sleep < 100) {
855 * If we sleep too short all the time, this system may not implement
856 * C2/3 correctly (i.e. reads return immediately). In this case,
857 * back off and use the next higher level.
858 * It seems that when you have a dual core cpu (like the Intel Core Duo)
859 * that both cores will get out of C3 state as soon as one of them
860 * requires it. This breaks the sleep detection logic as the sleep
861 * counter is local to each cpu. Disable the sleep logic for now as a
862 * workaround if there's more than one CPU. The right fix would probably
863 * be to add quirks for system that don't really support C3 state.
865 if (mp_ncpus < 2 && sc->cpu_prev_sleep <= 1) {
867 if (sc->cpu_short_slp == 1000 && sc->cpu_cx_lowest != 0) {
868 if (sc->cpu_non_c3 == sc->cpu_cx_lowest && sc->cpu_non_c3 != 0)
871 sc->cpu_short_slp = 0;
872 device_printf(sc->cpu_dev,
873 "too many short sleeps, backing off to C%d\n",
874 sc->cpu_cx_lowest + 1);
877 sc->cpu_short_slp = 0;
879 for (i = sc->cpu_cx_lowest; i >= 0; i--)
880 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) {
887 * Check for bus master activity. If there was activity, clear
888 * the bit and use the lowest non-C3 state. Note that the USB
889 * driver polling for new devices keeps this bit set all the
890 * time if USB is loaded.
892 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
893 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
894 if (bm_active != 0) {
895 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
896 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3);
900 /* Select the next state and update statistics. */
901 cx_next = &sc->cpu_cx_states[cx_next_idx];
902 sc->cpu_cx_stats[cx_next_idx]++;
903 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
906 * Execute HLT (or equivalent) and wait for an interrupt. We can't
907 * calculate the time spent in C1 since the place we wake up is an
908 * ISR. Assume we slept one quantum and return.
910 if (cx_next->type == ACPI_STATE_C1) {
911 sc->cpu_prev_sleep = 1000000 / hz;
917 * For C3, disable bus master arbitration and enable bus master wake
918 * if BM control is available, otherwise flush the CPU cache.
920 if (cx_next->type == ACPI_STATE_C3) {
921 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
922 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1);
923 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
925 ACPI_FLUSH_CPU_CACHE();
929 * Read from P_LVLx to enter C2(+), checking time spent asleep.
930 * Use the ACPI timer for measuring sleep time. Since we need to
931 * get the time very close to the CPU start/stop clock logic, this
932 * is the only reliable time source.
934 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT.XPmTimerBlock);
935 CPU_GET_REG(cx_next->p_lvlx, 1);
938 * Read the end time twice. Since it may take an arbitrary time
939 * to enter the idle state, the first read may be executed before
940 * the processor has stopped. Doing it again provides enough
941 * margin that we are certain to have a correct value.
943 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
944 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
946 /* Enable bus master arbitration and disable bus master wakeup. */
947 if (cx_next->type == ACPI_STATE_C3 &&
948 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
949 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0);
950 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
954 /* Find the actual time asleep in microseconds, minus overhead. */
955 end_time = acpi_TimerDelta(end_time, start_time);
956 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat;
960 * Re-evaluate the _CST object when we are notified that it changed.
962 * XXX Re-evaluation disabled until locking is done.
965 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
967 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
969 if (notify != ACPI_NOTIFY_CX_STATES)
972 device_printf(sc->cpu_dev, "Cx states changed\n");
973 /* acpi_cpu_cx_cst(sc); */
977 acpi_cpu_quirks(void)
981 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
984 * Bus mastering arbitration control is needed to keep caches coherent
985 * while sleeping in C3. If it's not present but a working flush cache
986 * instruction is present, flush the caches before entering C3 instead.
987 * Otherwise, just disable C3 completely.
989 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
990 AcpiGbl_FADT.Pm2ControlLength == 0) {
991 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
992 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
993 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
994 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
995 "acpi_cpu: no BM control, using flush cache method\n"));
997 cpu_quirks |= CPU_QUIRK_NO_C3;
998 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
999 "acpi_cpu: no BM control, C3 not available\n"));
1004 * If we are using generic Cx mode, C3 on multiple CPUs requires using
1005 * the expensive flush cache instruction.
1007 if (cpu_cx_generic && mp_ncpus > 1) {
1008 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1009 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1010 "acpi_cpu: SMP, using flush cache mode for C3\n"));
1013 /* Look for various quirks of the PIIX4 part. */
1014 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1015 if (acpi_dev != NULL) {
1016 switch (pci_get_revid(acpi_dev)) {
1018 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1019 * do not report the BMIDE status to the BM status register and
1020 * others have a livelock bug if Type-F DMA is enabled. Linux
1021 * works around the BMIDE bug by reading the BM status directly
1022 * but we take the simpler approach of disabling C3 for these
1025 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1026 * Livelock") from the January 2002 PIIX4 specification update.
1027 * Applies to all PIIX4 models.
1029 case PCI_REVISION_4E:
1030 case PCI_REVISION_4M:
1031 cpu_quirks |= CPU_QUIRK_NO_C3;
1032 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1033 "acpi_cpu: working around PIIX4 bug, disabling C3\n"));
1044 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1046 struct acpi_cpu_softc *sc;
1050 uintmax_t fract, sum, whole;
1052 sc = (struct acpi_cpu_softc *) arg1;
1054 for (i = 0; i < sc->cpu_cx_count; i++)
1055 sum += sc->cpu_cx_stats[i];
1056 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1057 for (i = 0; i < sc->cpu_cx_count; i++) {
1059 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100;
1060 fract = (whole % sum) * 100;
1061 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1062 (u_int)(fract / sum));
1064 sbuf_printf(&sb, "0%% ");
1068 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1075 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val)
1079 ACPI_SERIAL_ASSERT(cpu);
1080 sc->cpu_cx_lowest = val;
1082 /* If not disabling, cache the new lowest non-C3 state. */
1084 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
1085 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1091 /* Reset the statistics counters. */
1092 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats));
1097 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1099 struct acpi_cpu_softc *sc;
1103 sc = (struct acpi_cpu_softc *) arg1;
1104 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1);
1105 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1106 if (error != 0 || req->newptr == NULL)
1108 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1110 val = (int) strtol(state + 1, NULL, 10) - 1;
1111 if (val < 0 || val > sc->cpu_cx_count - 1)
1114 ACPI_SERIAL_BEGIN(cpu);
1115 acpi_cpu_set_cx_lowest(sc, val);
1116 ACPI_SERIAL_END(cpu);
1122 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1124 struct acpi_cpu_softc *sc;
1128 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1129 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1130 if (error != 0 || req->newptr == NULL)
1132 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1134 val = (int) strtol(state + 1, NULL, 10) - 1;
1135 if (val < 0 || val > cpu_cx_count - 1)
1137 cpu_cx_lowest = val;
1139 /* Update the new lowest useable Cx state for all CPUs. */
1140 ACPI_SERIAL_BEGIN(cpu);
1141 for (i = 0; i < cpu_ndevices; i++) {
1142 sc = device_get_softc(cpu_devices[i]);
1143 acpi_cpu_set_cx_lowest(sc, val);
1145 ACPI_SERIAL_END(cpu);