sys/dev/advansys/advansys.c

   1 /*-
   2  * Generic driver for the Advanced Systems Inc. SCSI controllers
   3  * Product specific probe and attach routines can be found in:
   4  *
   5  * i386/isa/adv_isa.c   ABP5140, ABP542, ABP5150, ABP842, ABP852
   6  * i386/eisa/adv_eisa.c ABP742, ABP752
   7  * pci/adv_pci.c        ABP920, ABP930, ABP930U, ABP930UA, ABP940, ABP940U,
   8  *                      ABP940UA, ABP950, ABP960, ABP960U, ABP960UA,
   9  *                      ABP970, ABP970U
  10  *
  11  * Copyright (c) 1996-2000 Justin Gibbs.
  12  * All rights reserved.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions
  16  * are met:
  17  * 1. Redistributions of source code must retain the above copyright
  18  *    notice, this list of conditions, and the following disclaimer,
  19  *    without modification, immediately at the beginning of the file.
  20  * 2. The name of the author may not be used to endorse or promote products
  21  *    derived from this software without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  26  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  27  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  33  * SUCH DAMAGE.
  34  */
  35 /*-
  36  * Ported from:
  37  * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
  38  *
  39  * Copyright (c) 1995-1997 Advanced System Products, Inc.
  40  * All Rights Reserved.
  41  *
  42  * Redistribution and use in source and binary forms, with or without
  43  * modification, are permitted provided that redistributions of source
  44  * code retain the above copyright notice and this comment without
  45  * modification.
  46  */
  47
  48 #include <sys/cdefs.h>
  49 __FBSDID("$FreeBSD$");
  50
  51 #include <sys/param.h>
  52 #include <sys/conf.h>
  53 #include <sys/systm.h>
  54 #include <sys/malloc.h>
  55 #include <sys/kernel.h>
  56 #include <sys/lock.h>
  57 #include <sys/module.h>
  58 #include <sys/mutex.h>
  59
  60 #include <machine/bus.h>
  61 #include <machine/resource.h>
  62 #include <sys/bus.h>
  63 #include <sys/rman.h>
  64
  65 #include <cam/cam.h>
  66 #include <cam/cam_ccb.h>
  67 #include <cam/cam_sim.h>
  68 #include <cam/cam_xpt_sim.h>
  69 #include <cam/cam_debug.h>
  70
  71 #include <cam/scsi/scsi_all.h>
  72 #include <cam/scsi/scsi_message.h>
  73
  74 #include <vm/vm.h>
  75 #include <vm/vm_param.h>
  76 #include <vm/pmap.h>
  77
  78 #include <dev/advansys/advansys.h>
  79
  80 static void     adv_action(struct cam_sim *sim, union ccb *ccb);
  81 static void     adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
  82                                 int nsegments, int error);
  83 static void     adv_intr_locked(struct adv_softc *adv);
  84 static void     adv_poll(struct cam_sim *sim);
  85 static void     adv_run_doneq(struct adv_softc *adv);
  86 static struct adv_ccb_info *
  87                 adv_alloc_ccb_info(struct adv_softc *adv);
  88 static void     adv_destroy_ccb_info(struct adv_softc *adv,
  89                                      struct adv_ccb_info *cinfo);
  90 static __inline struct adv_ccb_info *
  91                 adv_get_ccb_info(struct adv_softc *adv);
  92 static __inline void adv_free_ccb_info(struct adv_softc *adv,
  93                                        struct adv_ccb_info *cinfo);
  94 static __inline void adv_set_state(struct adv_softc *adv, adv_state state);
  95 static __inline void adv_clear_state(struct adv_softc *adv, union ccb* ccb);
  96 static void adv_clear_state_really(struct adv_softc *adv, union ccb* ccb);
  97
  98 static __inline struct adv_ccb_info *
  99 adv_get_ccb_info(struct adv_softc *adv)
 100 {
 101         struct adv_ccb_info *cinfo;
 102
 103         if (!dumping)
 104                 mtx_assert(&adv->lock, MA_OWNED);
 105         if ((cinfo = SLIST_FIRST(&adv->free_ccb_infos)) != NULL) {
 106                 SLIST_REMOVE_HEAD(&adv->free_ccb_infos, links);
 107         } else {
 108                 cinfo = adv_alloc_ccb_info(adv);
 109         }
 110
 111         return (cinfo);
 112 }
 113
 114 static __inline void
 115 adv_free_ccb_info(struct adv_softc *adv, struct adv_ccb_info *cinfo)
 116 {
 117
 118         if (!dumping)
 119                 mtx_assert(&adv->lock, MA_OWNED);
 120         cinfo->state = ACCB_FREE;
 121         SLIST_INSERT_HEAD(&adv->free_ccb_infos, cinfo, links);
 122 }
 123
 124 static __inline void
 125 adv_set_state(struct adv_softc *adv, adv_state state)
 126 {
 127         if (adv->state == 0)
 128                 xpt_freeze_simq(adv->sim, /*count*/1);
 129         adv->state |= state;
 130 }
 131
 132 static __inline void
 133 adv_clear_state(struct adv_softc *adv, union ccb* ccb)
 134 {
 135         if (adv->state != 0)
 136                 adv_clear_state_really(adv, ccb);
 137 }
 138
 139 static void
 140 adv_clear_state_really(struct adv_softc *adv, union ccb* ccb)
 141 {
 142
 143         if (!dumping)
 144                 mtx_assert(&adv->lock, MA_OWNED);
 145         if ((adv->state & ADV_BUSDMA_BLOCK_CLEARED) != 0)
 146                 adv->state &= ~(ADV_BUSDMA_BLOCK_CLEARED|ADV_BUSDMA_BLOCK);
 147         if ((adv->state & ADV_RESOURCE_SHORTAGE) != 0) {
 148                 int openings;
 149
 150                 openings = adv->max_openings - adv->cur_active - ADV_MIN_FREE_Q;
 151                 if (openings >= adv->openings_needed) {
 152                         adv->state &= ~ADV_RESOURCE_SHORTAGE;
 153                         adv->openings_needed = 0;
 154                 }
 155         }
 156
 157         if ((adv->state & ADV_IN_TIMEOUT) != 0) {
 158                 struct adv_ccb_info *cinfo;
 159
 160                 cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
 161                 if ((cinfo->state & ACCB_RECOVERY_CCB) != 0) {
 162                         struct ccb_hdr *ccb_h;
 163
 164                         /*
 165                          * We now traverse our list of pending CCBs
 166                          * and reinstate their timeouts.
 167                          */
 168                         ccb_h = LIST_FIRST(&adv->pending_ccbs);
 169                         while (ccb_h != NULL) {
 170                                 cinfo = ccb_h->ccb_cinfo_ptr;
 171                                 callout_reset_sbt(&cinfo->timer,
 172                                     SBT_1MS * ccb_h->timeout, 0,
 173                                     adv_timeout, ccb_h, 0);
 174                                 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
 175                         }
 176                         adv->state &= ~ADV_IN_TIMEOUT;
 177                         device_printf(adv->dev, "No longer in timeout\n");
 178                 }
 179         }
 180         if (adv->state == 0)
 181                 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
 182 }
 183
 184 void
 185 adv_map(void *arg, bus_dma_segment_t *segs, int nseg, int error)
 186 {
 187         bus_addr_t* physaddr;
 188
 189         physaddr = (bus_addr_t*)arg;
 190         *physaddr = segs->ds_addr;
 191 }
 192
 193 static void
 194 adv_action(struct cam_sim *sim, union ccb *ccb)
 195 {
 196         struct adv_softc *adv;
 197
 198         CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("adv_action\n"));
 199
 200         adv = (struct adv_softc *)cam_sim_softc(sim);
 201         mtx_assert(&adv->lock, MA_OWNED);
 202
 203         switch (ccb->ccb_h.func_code) {
 204         /* Common cases first */
 205         case XPT_SCSI_IO:       /* Execute the requested I/O operation */
 206         {
 207                 struct  ccb_hdr *ccb_h;
 208                 struct  ccb_scsiio *csio;
 209                 struct  adv_ccb_info *cinfo;
 210                 int error;
 211
 212                 ccb_h = &ccb->ccb_h;
 213                 csio = &ccb->csio;
 214                 cinfo = adv_get_ccb_info(adv);
 215                 if (cinfo == NULL)
 216                         panic("XXX Handle CCB info error!!!");
 217
 218                 ccb_h->ccb_cinfo_ptr = cinfo;
 219                 cinfo->ccb = ccb;
 220
 221                 error = bus_dmamap_load_ccb(adv->buffer_dmat,
 222                                             cinfo->dmamap,
 223                                             ccb,
 224                                             adv_execute_ccb,
 225                                             csio, /*flags*/0);
 226                 if (error == EINPROGRESS) {
 227                         /*
 228                          * So as to maintain ordering, freeze the controller
 229                          * queue until our mapping is returned.
 230                          */
 231                         adv_set_state(adv, ADV_BUSDMA_BLOCK);
 232                 }
 233                 break;
 234         }
 235         case XPT_RESET_DEV:     /* Bus Device Reset the specified SCSI device */
 236         case XPT_ABORT:                 /* Abort the specified CCB */
 237                 /* XXX Implement */
 238                 ccb->ccb_h.status = CAM_REQ_INVALID;
 239                 xpt_done(ccb);
 240                 break;
 241 #define IS_CURRENT_SETTINGS(c)  (c->type == CTS_TYPE_CURRENT_SETTINGS)
 242 #define IS_USER_SETTINGS(c)     (c->type == CTS_TYPE_USER_SETTINGS)
 243         case XPT_SET_TRAN_SETTINGS:
 244         {
 245                 struct ccb_trans_settings_scsi *scsi;
 246                 struct ccb_trans_settings_spi *spi;
 247                 struct   ccb_trans_settings *cts;
 248                 target_bit_vector targ_mask;
 249                 struct adv_transinfo *tconf;
 250                 u_int    update_type;
 251
 252                 cts = &ccb->cts;
 253                 targ_mask = ADV_TID_TO_TARGET_MASK(cts->ccb_h.target_id);
 254                 update_type = 0;
 255
 256                 /*
 257                  * The user must specify which type of settings he wishes
 258                  * to change.
 259                  */
 260                 if (IS_CURRENT_SETTINGS(cts) && !IS_USER_SETTINGS(cts)) {
 261                         tconf = &adv->tinfo[cts->ccb_h.target_id].current;
 262                         update_type |= ADV_TRANS_GOAL;
 263                 } else if (IS_USER_SETTINGS(cts) && !IS_CURRENT_SETTINGS(cts)) {
 264                         tconf = &adv->tinfo[cts->ccb_h.target_id].user;
 265                         update_type |= ADV_TRANS_USER;
 266                 } else {
 267                         ccb->ccb_h.status = CAM_REQ_INVALID;
 268                         break;
 269                 }
 270
 271                 scsi = &cts->proto_specific.scsi;
 272                 spi = &cts->xport_specific.spi;
 273                 if ((update_type & ADV_TRANS_GOAL) != 0) {
 274                         if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
 275                                 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
 276                                         adv->disc_enable |= targ_mask;
 277                                 else
 278                                         adv->disc_enable &= ~targ_mask;
 279                                 adv_write_lram_8(adv, ADVV_DISC_ENABLE_B,
 280                                                  adv->disc_enable);
 281                         }
 282
 283                         if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
 284                                 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
 285                                         adv->cmd_qng_enabled |= targ_mask;
 286                                 else
 287                                         adv->cmd_qng_enabled &= ~targ_mask;
 288                         }
 289                 }
 290
 291                 if ((update_type & ADV_TRANS_USER) != 0) {
 292                         if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
 293                                 if ((spi->flags & CTS_SPI_VALID_DISC) != 0)
 294                                         adv->user_disc_enable |= targ_mask;
 295                                 else
 296                                         adv->user_disc_enable &= ~targ_mask;
 297                         }
 298
 299                         if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
 300                                 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
 301                                         adv->user_cmd_qng_enabled |= targ_mask;
 302                                 else
 303                                         adv->user_cmd_qng_enabled &= ~targ_mask;
 304                         }
 305                 }
 306
 307                 /*
 308                  * If the user specifies either the sync rate, or offset,
 309                  * but not both, the unspecified parameter defaults to its
 310                  * current value in transfer negotiations.
 311                  */
 312                 if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
 313                  || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) {
 314                         /*
 315                          * If the user provided a sync rate but no offset,
 316                          * use the current offset.
 317                          */
 318                         if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) == 0)
 319                                 spi->sync_offset = tconf->offset;
 320
 321                         /*
 322                          * If the user provided an offset but no sync rate,
 323                          * use the current sync rate.
 324                          */
 325                         if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) == 0)
 326                                 spi->sync_period = tconf->period;
 327
 328                         adv_period_offset_to_sdtr(adv, &spi->sync_period,
 329                                                   &spi->sync_offset,
 330                                                   cts->ccb_h.target_id);
 331
 332                         adv_set_syncrate(adv, /*struct cam_path */NULL,
 333                                          cts->ccb_h.target_id, spi->sync_period,
 334                                          spi->sync_offset, update_type);
 335                 }
 336
 337                 ccb->ccb_h.status = CAM_REQ_CMP;
 338                 xpt_done(ccb);
 339                 break;
 340         }
 341         case XPT_GET_TRAN_SETTINGS:
 342         /* Get default/user set transfer settings for the target */
 343         {
 344                 struct ccb_trans_settings_scsi *scsi;
 345                 struct ccb_trans_settings_spi *spi;
 346                 struct ccb_trans_settings *cts;
 347                 struct adv_transinfo *tconf;
 348                 target_bit_vector target_mask;
 349
 350                 cts = &ccb->cts;
 351                 target_mask = ADV_TID_TO_TARGET_MASK(cts->ccb_h.target_id);
 352
 353                 scsi = &cts->proto_specific.scsi;
 354                 spi = &cts->xport_specific.spi;
 355
 356                 cts->protocol = PROTO_SCSI;
 357                 cts->protocol_version = SCSI_REV_2;
 358                 cts->transport = XPORT_SPI;
 359                 cts->transport_version = 2;
 360
 361                 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
 362                 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
 363
 364                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
 365                         tconf = &adv->tinfo[cts->ccb_h.target_id].current;
 366                         if ((adv->disc_enable & target_mask) != 0)
 367                                 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
 368                         if ((adv->cmd_qng_enabled & target_mask) != 0)
 369                                 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
 370                 } else {
 371                         tconf = &adv->tinfo[cts->ccb_h.target_id].user;
 372                         if ((adv->user_disc_enable & target_mask) != 0)
 373                                 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
 374                         if ((adv->user_cmd_qng_enabled & target_mask) != 0)
 375                                 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
 376                 }
 377                 spi->sync_period = tconf->period;
 378                 spi->sync_offset = tconf->offset;
 379                 spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
 380                 spi->valid = CTS_SPI_VALID_SYNC_RATE
 381                            | CTS_SPI_VALID_SYNC_OFFSET
 382                            | CTS_SPI_VALID_BUS_WIDTH
 383                            | CTS_SPI_VALID_DISC;
 384                 scsi->valid = CTS_SCSI_VALID_TQ;
 385                 ccb->ccb_h.status = CAM_REQ_CMP;
 386                 xpt_done(ccb);
 387                 break;
 388         }
 389         case XPT_CALC_GEOMETRY:
 390         {
 391                 int       extended;
 392
 393                 extended = (adv->control & ADV_CNTL_BIOS_GT_1GB) != 0;
 394                 cam_calc_geometry(&ccb->ccg, extended);
 395                 xpt_done(ccb);
 396                 break;
 397         }
 398         case XPT_RESET_BUS:             /* Reset the specified SCSI bus */
 399         {
 400
 401                 adv_stop_execution(adv);
 402                 adv_reset_bus(adv, /*initiate_reset*/TRUE);
 403                 adv_start_execution(adv);
 404
 405                 ccb->ccb_h.status = CAM_REQ_CMP;
 406                 xpt_done(ccb);
 407                 break;
 408         }
 409         case XPT_TERM_IO:               /* Terminate the I/O process */
 410                 /* XXX Implement */
 411                 ccb->ccb_h.status = CAM_REQ_INVALID;
 412                 xpt_done(ccb);
 413                 break;
 414         case XPT_PATH_INQ:              /* Path routing inquiry */
 415         {
 416                 struct ccb_pathinq *cpi = &ccb->cpi;
 417
 418                 cpi->version_num = 1; /* XXX??? */
 419                 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
 420                 cpi->target_sprt = 0;
 421                 cpi->hba_misc = 0;
 422                 cpi->hba_eng_cnt = 0;
 423                 cpi->max_target = 7;
 424                 cpi->max_lun = 7;
 425                 cpi->initiator_id = adv->scsi_id;
 426                 cpi->bus_id = cam_sim_bus(sim);
 427                 cpi->base_transfer_speed = 3300;
 428                 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
 429                 strlcpy(cpi->hba_vid, "Advansys", HBA_IDLEN);
 430                 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
 431                 cpi->unit_number = cam_sim_unit(sim);
 432                 cpi->ccb_h.status = CAM_REQ_CMP;
 433                 cpi->transport = XPORT_SPI;
 434                 cpi->transport_version = 2;
 435                 cpi->protocol = PROTO_SCSI;
 436                 cpi->protocol_version = SCSI_REV_2;
 437                 xpt_done(ccb);
 438                 break;
 439         }
 440         default:
 441                 ccb->ccb_h.status = CAM_REQ_INVALID;
 442                 xpt_done(ccb);
 443                 break;
 444         }
 445 }
 446
 447 /*
 448  * Currently, the output of bus_dmammap_load suits our needs just
 449  * fine, but should it change, we'd need to do something here.
 450  */
 451 #define adv_fixup_dmasegs(adv, dm_segs) (struct adv_sg_entry *)(dm_segs)
 452
 453 static void
 454 adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
 455                 int nsegments, int error)
 456 {
 457         struct  ccb_scsiio *csio;
 458         struct  ccb_hdr *ccb_h;
 459         struct  cam_sim *sim;
 460         struct  adv_softc *adv;
 461         struct  adv_ccb_info *cinfo;
 462         struct  adv_scsi_q scsiq;
 463         struct  adv_sg_head sghead;
 464
 465         csio = (struct ccb_scsiio *)arg;
 466         ccb_h = &csio->ccb_h;
 467         sim = xpt_path_sim(ccb_h->path);
 468         adv = (struct adv_softc *)cam_sim_softc(sim);
 469         cinfo = (struct adv_ccb_info *)csio->ccb_h.ccb_cinfo_ptr;
 470         if (!dumping)
 471                 mtx_assert(&adv->lock, MA_OWNED);
 472
 473         /*
 474          * Setup our done routine to release the simq on
 475          * the next ccb that completes.
 476          */
 477         if ((adv->state & ADV_BUSDMA_BLOCK) != 0)
 478                 adv->state |= ADV_BUSDMA_BLOCK_CLEARED;
 479
 480         if ((ccb_h->flags & CAM_CDB_POINTER) != 0) {
 481                 if ((ccb_h->flags & CAM_CDB_PHYS) == 0) {
 482                         /* XXX Need phystovirt!!!! */
 483                         /* How about pmap_kenter??? */
 484                         scsiq.cdbptr = csio->cdb_io.cdb_ptr;
 485                 } else {
 486                         scsiq.cdbptr = csio->cdb_io.cdb_ptr;
 487                 }
 488         } else {
 489                 scsiq.cdbptr = csio->cdb_io.cdb_bytes;
 490         }
 491         /*
 492          * Build up the request
 493          */
 494         scsiq.q1.status = 0;
 495         scsiq.q1.q_no = 0;
 496         scsiq.q1.cntl = 0;
 497         scsiq.q1.sg_queue_cnt = 0;
 498         scsiq.q1.target_id = ADV_TID_TO_TARGET_MASK(ccb_h->target_id);
 499         scsiq.q1.target_lun = ccb_h->target_lun;
 500         scsiq.q1.sense_len = csio->sense_len;
 501         scsiq.q1.extra_bytes = 0;
 502         scsiq.q2.ccb_index = cinfo - adv->ccb_infos;
 503         scsiq.q2.target_ix = ADV_TIDLUN_TO_IX(ccb_h->target_id,
 504                                               ccb_h->target_lun);
 505         scsiq.q2.flag = 0;
 506         scsiq.q2.cdb_len = csio->cdb_len;
 507         if ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0)
 508                 scsiq.q2.tag_code = csio->tag_action;
 509         else
 510                 scsiq.q2.tag_code = 0;
 511         scsiq.q2.vm_id = 0;
 512
 513         if (nsegments != 0) {
 514                 bus_dmasync_op_t op;
 515
 516                 scsiq.q1.data_addr = dm_segs->ds_addr;
 517                 scsiq.q1.data_cnt = dm_segs->ds_len;
 518                 if (nsegments > 1) {
 519                         scsiq.q1.cntl |= QC_SG_HEAD;
 520                         sghead.entry_cnt
 521                             = sghead.entry_to_copy
 522                             = nsegments;
 523                         sghead.res = 0;
 524                         sghead.sg_list = adv_fixup_dmasegs(adv, dm_segs);
 525                         scsiq.sg_head = &sghead;
 526                 } else {
 527                         scsiq.sg_head = NULL;
 528                 }
 529                 if ((ccb_h->flags & CAM_DIR_MASK) == CAM_DIR_IN)
 530                         op = BUS_DMASYNC_PREREAD;
 531                 else
 532                         op = BUS_DMASYNC_PREWRITE;
 533                 bus_dmamap_sync(adv->buffer_dmat, cinfo->dmamap, op);
 534         } else {
 535                 scsiq.q1.data_addr = 0;
 536                 scsiq.q1.data_cnt = 0;
 537                 scsiq.sg_head = NULL;
 538         }
 539
 540         /*
 541          * Last time we need to check if this SCB needs to
 542          * be aborted.
 543          */
 544         if (ccb_h->status != CAM_REQ_INPROG) {
 545                 if (nsegments != 0)
 546                         bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
 547                 adv_clear_state(adv, (union ccb *)csio);
 548                 adv_free_ccb_info(adv, cinfo);
 549                 xpt_done((union ccb *)csio);
 550                 return;
 551         }
 552
 553         if (adv_execute_scsi_queue(adv, &scsiq, csio->dxfer_len) != 0) {
 554                 /* Temporary resource shortage */
 555                 adv_set_state(adv, ADV_RESOURCE_SHORTAGE);
 556                 if (nsegments != 0)
 557                         bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
 558                 csio->ccb_h.status = CAM_REQUEUE_REQ;
 559                 adv_clear_state(adv, (union ccb *)csio);
 560                 adv_free_ccb_info(adv, cinfo);
 561                 xpt_done((union ccb *)csio);
 562                 return;
 563         }
 564         cinfo->state |= ACCB_ACTIVE;
 565         ccb_h->status |= CAM_SIM_QUEUED;
 566         LIST_INSERT_HEAD(&adv->pending_ccbs, ccb_h, sim_links.le);
 567         /* Schedule our timeout */
 568         callout_reset_sbt(&cinfo->timer, SBT_1MS * ccb_h->timeout, 0,
 569             adv_timeout, csio, 0);
 570 }
 571
 572 static struct adv_ccb_info *
 573 adv_alloc_ccb_info(struct adv_softc *adv)
 574 {
 575         int error;
 576         struct adv_ccb_info *cinfo;
 577
 578         cinfo = &adv->ccb_infos[adv->ccb_infos_allocated];
 579         cinfo->state = ACCB_FREE;
 580         callout_init_mtx(&cinfo->timer, &adv->lock, 0);
 581         error = bus_dmamap_create(adv->buffer_dmat, /*flags*/0,
 582                                   &cinfo->dmamap);
 583         if (error != 0) {
 584                 device_printf(adv->dev, "Unable to allocate CCB info "
 585                     "dmamap - error %d\n", error);
 586                 return (NULL);
 587         }
 588         adv->ccb_infos_allocated++;
 589         return (cinfo);
 590 }
 591
 592 static void
 593 adv_destroy_ccb_info(struct adv_softc *adv, struct adv_ccb_info *cinfo)
 594 {
 595
 596         callout_drain(&cinfo->timer);
 597         bus_dmamap_destroy(adv->buffer_dmat, cinfo->dmamap);
 598 }
 599
 600 void
 601 adv_timeout(void *arg)
 602 {
 603         union ccb *ccb;
 604         struct adv_softc *adv;
 605         struct adv_ccb_info *cinfo, *cinfo2;
 606
 607         ccb = (union ccb *)arg;
 608         adv = (struct adv_softc *)xpt_path_sim(ccb->ccb_h.path)->softc;
 609         cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
 610         mtx_assert(&adv->lock, MA_OWNED);
 611
 612         xpt_print_path(ccb->ccb_h.path);
 613         printf("Timed out\n");
 614
 615         /* Have we been taken care of already?? */
 616         if (cinfo == NULL || cinfo->state == ACCB_FREE) {
 617                 return;
 618         }
 619
 620         adv_stop_execution(adv);
 621
 622         if ((cinfo->state & ACCB_ABORT_QUEUED) == 0) {
 623                 struct ccb_hdr *ccb_h;
 624
 625                 /*
 626                  * In order to simplify the recovery process, we ask the XPT
 627                  * layer to halt the queue of new transactions and we traverse
 628                  * the list of pending CCBs and remove their timeouts. This
 629                  * means that the driver attempts to clear only one error
 630                  * condition at a time.  In general, timeouts that occur
 631                  * close together are related anyway, so there is no benefit
 632                  * in attempting to handle errors in parallel.  Timeouts will
 633                  * be reinstated when the recovery process ends.
 634                  */
 635                 adv_set_state(adv, ADV_IN_TIMEOUT);
 636
 637                 /* This CCB is the CCB representing our recovery actions */
 638                 cinfo->state |= ACCB_RECOVERY_CCB|ACCB_ABORT_QUEUED;
 639
 640                 ccb_h = LIST_FIRST(&adv->pending_ccbs);
 641                 while (ccb_h != NULL) {
 642                         cinfo2 = ccb_h->ccb_cinfo_ptr;
 643                         callout_stop(&cinfo2->timer);
 644                         ccb_h = LIST_NEXT(ccb_h, sim_links.le);
 645                 }
 646
 647                 /* XXX Should send a BDR */
 648                 /* Attempt an abort as our first tact */
 649                 xpt_print_path(ccb->ccb_h.path);
 650                 printf("Attempting abort\n");
 651                 adv_abort_ccb(adv, ccb->ccb_h.target_id,
 652                               ccb->ccb_h.target_lun, ccb,
 653                               CAM_CMD_TIMEOUT, /*queued_only*/FALSE);
 654                 callout_reset(&cinfo->timer, 2 * hz, adv_timeout, ccb);
 655         } else {
 656                 /* Our attempt to perform an abort failed, go for a reset */
 657                 xpt_print_path(ccb->ccb_h.path);
 658                 printf("Resetting bus\n");
 659                 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
 660                 ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
 661                 adv_reset_bus(adv, /*initiate_reset*/TRUE);
 662         }
 663         adv_start_execution(adv);
 664 }
 665
 666 struct adv_softc *
 667 adv_alloc(device_t dev, struct resource *res, long offset)
 668 {
 669         struct adv_softc *adv = device_get_softc(dev);
 670
 671         /*
 672          * Allocate a storage area for us
 673          */
 674         LIST_INIT(&adv->pending_ccbs);
 675         SLIST_INIT(&adv->free_ccb_infos);
 676         adv->dev = dev;
 677         adv->res = res;
 678         adv->reg_off = offset;
 679         mtx_init(&adv->lock, "adv", NULL, MTX_DEF);
 680
 681         return(adv);
 682 }
 683
 684 void
 685 adv_free(struct adv_softc *adv)
 686 {
 687         switch (adv->init_level) {
 688         case 6:
 689         {
 690                 struct adv_ccb_info *cinfo;
 691
 692                 while ((cinfo = SLIST_FIRST(&adv->free_ccb_infos)) != NULL) {
 693                         SLIST_REMOVE_HEAD(&adv->free_ccb_infos, links);
 694                         adv_destroy_ccb_info(adv, cinfo);
 695                 }
 696
 697                 bus_dmamap_unload(adv->sense_dmat, adv->sense_dmamap);
 698         }
 699         case 5:
 700                 bus_dmamem_free(adv->sense_dmat, adv->sense_buffers,
 701                                 adv->sense_dmamap);
 702         case 4:
 703                 bus_dma_tag_destroy(adv->sense_dmat);
 704         case 3:
 705                 bus_dma_tag_destroy(adv->buffer_dmat);
 706         case 2:
 707                 bus_dma_tag_destroy(adv->parent_dmat);
 708         case 1:
 709                 if (adv->ccb_infos != NULL)
 710                         free(adv->ccb_infos, M_DEVBUF);
 711         case 0:
 712                 mtx_destroy(&adv->lock);
 713                 break;
 714         }
 715 }
 716
 717 int
 718 adv_init(struct adv_softc *adv)
 719 {
 720         struct    adv_eeprom_config eeprom_config;
 721         int       checksum, i;
 722         int       max_sync;
 723         u_int16_t config_lsw;
 724         u_int16_t config_msw;
 725
 726         mtx_lock(&adv->lock);
 727         adv_lib_init(adv);
 728
 729         /*
 730          * Stop script execution.
 731          */
 732         adv_write_lram_16(adv, ADV_HALTCODE_W, 0x00FE);
 733         adv_stop_execution(adv);
 734         if (adv_stop_chip(adv) == 0 || adv_is_chip_halted(adv) == 0) {
 735                 mtx_unlock(&adv->lock);
 736                 device_printf(adv->dev,
 737                     "Unable to halt adapter. Initialization failed\n");
 738                 return (1);
 739         }
 740         ADV_OUTW(adv, ADV_REG_PROG_COUNTER, ADV_MCODE_START_ADDR);
 741         if (ADV_INW(adv, ADV_REG_PROG_COUNTER) != ADV_MCODE_START_ADDR) {
 742                 mtx_unlock(&adv->lock);
 743                 device_printf(adv->dev,
 744                     "Unable to set program counter. Initialization failed\n");
 745                 return (1);
 746         }
 747
 748         config_msw = ADV_INW(adv, ADV_CONFIG_MSW);
 749         config_lsw = ADV_INW(adv, ADV_CONFIG_LSW);
 750
 751         if ((config_msw & ADV_CFG_MSW_CLR_MASK) != 0) {
 752                 config_msw &= ~ADV_CFG_MSW_CLR_MASK;
 753                 /*
 754                  * XXX The Linux code flags this as an error,
 755                  * but what should we report to the user???
 756                  * It seems that clearing the config register
 757                  * makes this error recoverable.
 758                  */
 759                 ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
 760         }
 761
 762         /* Suck in the configuration from the EEProm */
 763         checksum = adv_get_eeprom_config(adv, &eeprom_config);
 764
 765         if (ADV_INW(adv, ADV_CHIP_STATUS) & ADV_CSW_AUTO_CONFIG) {
 766                 /*
 767                  * XXX The Linux code sets a warning level for this
 768                  * condition, yet nothing of meaning is printed to
 769                  * the user.  What does this mean???
 770                  */
 771                 if (adv->chip_version == 3) {
 772                         if (eeprom_config.cfg_lsw != config_lsw)
 773                                 eeprom_config.cfg_lsw = config_lsw;
 774                         if (eeprom_config.cfg_msw != config_msw) {
 775                                 eeprom_config.cfg_msw = config_msw;
 776                         }
 777                 }
 778         }
 779         if (checksum == eeprom_config.chksum) {
 780
 781                 /* Range/Sanity checking */
 782                 if (eeprom_config.max_total_qng < ADV_MIN_TOTAL_QNG) {
 783                         eeprom_config.max_total_qng = ADV_MIN_TOTAL_QNG;
 784                 }
 785                 if (eeprom_config.max_total_qng > ADV_MAX_TOTAL_QNG) {
 786                         eeprom_config.max_total_qng = ADV_MAX_TOTAL_QNG;
 787                 }
 788                 if (eeprom_config.max_tag_qng > eeprom_config.max_total_qng) {
 789                         eeprom_config.max_tag_qng = eeprom_config.max_total_qng;
 790                 }
 791                 if (eeprom_config.max_tag_qng < ADV_MIN_TAG_Q_PER_DVC) {
 792                         eeprom_config.max_tag_qng = ADV_MIN_TAG_Q_PER_DVC;
 793                 }
 794                 adv->max_openings = eeprom_config.max_total_qng;
 795                 adv->user_disc_enable = eeprom_config.disc_enable;
 796                 adv->user_cmd_qng_enabled = eeprom_config.use_cmd_qng;
 797                 adv->isa_dma_speed = EEPROM_DMA_SPEED(eeprom_config);
 798                 adv->scsi_id = EEPROM_SCSIID(eeprom_config) & ADV_MAX_TID;
 799                 EEPROM_SET_SCSIID(eeprom_config, adv->scsi_id);
 800                 adv->control = eeprom_config.cntl;
 801                 for (i = 0; i <= ADV_MAX_TID; i++) {
 802                         u_int8_t sync_data;
 803
 804                         if ((eeprom_config.init_sdtr & (0x1 << i)) == 0)
 805                                 sync_data = 0;
 806                         else
 807                                 sync_data = eeprom_config.sdtr_data[i];
 808                         adv_sdtr_to_period_offset(adv,
 809                                                   sync_data,
 810                                                   &adv->tinfo[i].user.period,
 811                                                   &adv->tinfo[i].user.offset,
 812                                                   i);
 813                 }
 814                 config_lsw = eeprom_config.cfg_lsw;
 815                 eeprom_config.cfg_msw = config_msw;
 816         } else {
 817                 u_int8_t sync_data;
 818
 819                 device_printf(adv->dev, "Warning EEPROM Checksum mismatch. "
 820                        "Using default device parameters\n");
 821
 822                 /* Set reasonable defaults since we can't read the EEPROM */
 823                 adv->isa_dma_speed = /*ADV_DEF_ISA_DMA_SPEED*/1;
 824                 adv->max_openings = ADV_DEF_MAX_TOTAL_QNG;
 825                 adv->disc_enable = TARGET_BIT_VECTOR_SET;
 826                 adv->user_disc_enable = TARGET_BIT_VECTOR_SET;
 827                 adv->cmd_qng_enabled = TARGET_BIT_VECTOR_SET;
 828                 adv->user_cmd_qng_enabled = TARGET_BIT_VECTOR_SET;
 829                 adv->scsi_id = 7;
 830                 adv->control = 0xFFFF;
 831
 832                 if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050)
 833                         /* Default to no Ultra to support the 3030 */
 834                         adv->control &= ~ADV_CNTL_SDTR_ENABLE_ULTRA;
 835                 sync_data = ADV_DEF_SDTR_OFFSET | (ADV_DEF_SDTR_INDEX << 4);
 836                 for (i = 0; i <= ADV_MAX_TID; i++) {
 837                         adv_sdtr_to_period_offset(adv, sync_data,
 838                                                   &adv->tinfo[i].user.period,
 839                                                   &adv->tinfo[i].user.offset,
 840                                                   i);
 841                 }
 842                 config_lsw |= ADV_CFG_LSW_SCSI_PARITY_ON;
 843         }
 844         config_msw &= ~ADV_CFG_MSW_CLR_MASK;
 845         config_lsw |= ADV_CFG_LSW_HOST_INT_ON;
 846         if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)
 847          && (adv->control & ADV_CNTL_SDTR_ENABLE_ULTRA) == 0)
 848                 /* 25ns or 10MHz */
 849                 max_sync = 25;
 850         else
 851                 /* Unlimited */
 852                 max_sync = 0;
 853         for (i = 0; i <= ADV_MAX_TID; i++) {
 854                 if (adv->tinfo[i].user.period < max_sync)
 855                         adv->tinfo[i].user.period = max_sync;
 856         }
 857
 858         if (adv_test_external_lram(adv) == 0) {
 859                 if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)) {
 860                         eeprom_config.max_total_qng =
 861                             ADV_MAX_PCI_ULTRA_INRAM_TOTAL_QNG;
 862                         eeprom_config.max_tag_qng =
 863                             ADV_MAX_PCI_ULTRA_INRAM_TAG_QNG;
 864                 } else {
 865                         eeprom_config.cfg_msw |= 0x0800;
 866                         config_msw |= 0x0800;
 867                         eeprom_config.max_total_qng =
 868                              ADV_MAX_PCI_INRAM_TOTAL_QNG;
 869                         eeprom_config.max_tag_qng = ADV_MAX_INRAM_TAG_QNG;
 870                 }
 871                 adv->max_openings = eeprom_config.max_total_qng;
 872         }
 873         ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
 874         ADV_OUTW(adv, ADV_CONFIG_LSW, config_lsw);
 875 #if 0
 876         /*
 877          * Don't write the eeprom data back for now.
 878          * I'd rather not mess up the user's card.  We also don't
 879          * fully sanitize the eeprom settings above for the write-back
 880          * to be 100% correct.
 881          */
 882         if (adv_set_eeprom_config(adv, &eeprom_config) != 0)
 883                 device_printf(adv->dev,
 884                     "WARNING! Failure writing to EEPROM.\n");
 885 #endif
 886
 887         adv_set_chip_scsiid(adv, adv->scsi_id);
 888         if (adv_init_lram_and_mcode(adv)) {
 889                 mtx_unlock(&adv->lock);
 890                 return (1);
 891         }
 892
 893         adv->disc_enable = adv->user_disc_enable;
 894
 895         adv_write_lram_8(adv, ADVV_DISC_ENABLE_B, adv->disc_enable);
 896         for (i = 0; i <= ADV_MAX_TID; i++) {
 897                 /*
 898                  * Start off in async mode.
 899                  */
 900                 adv_set_syncrate(adv, /*struct cam_path */NULL,
 901                                  i, /*period*/0, /*offset*/0,
 902                                  ADV_TRANS_CUR);
 903                 /*
 904                  * Enable the use of tagged commands on all targets.
 905                  * This allows the kernel driver to make up it's own mind
 906                  * as it sees fit to tag queue instead of having the
 907                  * firmware try and second guess the tag_code settins.
 908                  */
 909                 adv_write_lram_8(adv, ADVV_MAX_DVC_QNG_BEG + i,
 910                                  adv->max_openings);
 911         }
 912         adv_write_lram_8(adv, ADVV_USE_TAGGED_QNG_B, TARGET_BIT_VECTOR_SET);
 913         adv_write_lram_8(adv, ADVV_CAN_TAGGED_QNG_B, TARGET_BIT_VECTOR_SET);
 914         device_printf(adv->dev,
 915             "AdvanSys %s Host Adapter, SCSI ID %d, queue depth %d\n",
 916             (adv->type & ADV_ULTRA) && (max_sync == 0)
 917             ? "Ultra SCSI" : "SCSI",
 918             adv->scsi_id, adv->max_openings);
 919         mtx_unlock(&adv->lock);
 920         return (0);
 921 }
 922
 923 void
 924 adv_intr(void *arg)
 925 {
 926         struct    adv_softc *adv;
 927
 928         adv = arg;
 929         mtx_lock(&adv->lock);
 930         adv_intr_locked(adv);
 931         mtx_unlock(&adv->lock);
 932 }
 933
 934 void
 935 adv_intr_locked(struct adv_softc *adv)
 936 {
 937         u_int16_t chipstat;
 938         u_int16_t saved_ram_addr;
 939         u_int8_t  ctrl_reg;
 940         u_int8_t  saved_ctrl_reg;
 941         u_int8_t  host_flag;
 942
 943         if (!dumping)
 944                 mtx_assert(&adv->lock, MA_OWNED);
 945         chipstat = ADV_INW(adv, ADV_CHIP_STATUS);
 946
 947         /* Is it for us? */
 948         if ((chipstat & (ADV_CSW_INT_PENDING|ADV_CSW_SCSI_RESET_LATCH)) == 0)
 949                 return;
 950
 951         ctrl_reg = ADV_INB(adv, ADV_CHIP_CTRL);
 952         saved_ctrl_reg = ctrl_reg & (~(ADV_CC_SCSI_RESET | ADV_CC_CHIP_RESET |
 953                                        ADV_CC_SINGLE_STEP | ADV_CC_DIAG |
 954                                        ADV_CC_TEST));
 955
 956         if ((chipstat & (ADV_CSW_SCSI_RESET_LATCH|ADV_CSW_SCSI_RESET_ACTIVE))) {
 957                 device_printf(adv->dev, "Detected Bus Reset\n");
 958                 adv_reset_bus(adv, /*initiate_reset*/FALSE);
 959                 return;
 960         }
 961
 962         if ((chipstat & ADV_CSW_INT_PENDING) != 0) {
 963
 964                 saved_ram_addr = ADV_INW(adv, ADV_LRAM_ADDR);
 965                 host_flag = adv_read_lram_8(adv, ADVV_HOST_FLAG_B);
 966                 adv_write_lram_8(adv, ADVV_HOST_FLAG_B,
 967                                  host_flag | ADV_HOST_FLAG_IN_ISR);
 968
 969                 adv_ack_interrupt(adv);
 970
 971                 if ((chipstat & ADV_CSW_HALTED) != 0
 972                  && (ctrl_reg & ADV_CC_SINGLE_STEP) != 0) {
 973                         adv_isr_chip_halted(adv);
 974                         saved_ctrl_reg &= ~ADV_CC_HALT;
 975                 } else {
 976                         adv_run_doneq(adv);
 977                 }
 978                 ADV_OUTW(adv, ADV_LRAM_ADDR, saved_ram_addr);
 979 #ifdef DIAGNOSTIC
 980                 if (ADV_INW(adv, ADV_LRAM_ADDR) != saved_ram_addr)
 981                         panic("adv_intr: Unable to set LRAM addr");
 982 #endif
 983                 adv_write_lram_8(adv, ADVV_HOST_FLAG_B, host_flag);
 984         }
 985
 986         ADV_OUTB(adv, ADV_CHIP_CTRL, saved_ctrl_reg);
 987 }
 988
 989 static void
 990 adv_run_doneq(struct adv_softc *adv)
 991 {
 992         struct adv_q_done_info scsiq;
 993         u_int             doneq_head;
 994         u_int             done_qno;
 995
 996         doneq_head = adv_read_lram_16(adv, ADVV_DONE_Q_TAIL_W) & 0xFF;
 997         done_qno = adv_read_lram_8(adv, ADV_QNO_TO_QADDR(doneq_head)
 998                                    + ADV_SCSIQ_B_FWD);
 999         while (done_qno != ADV_QLINK_END) {
1000                 union ccb* ccb;
1001                 struct adv_ccb_info *cinfo;
1002                 u_int done_qaddr;
1003                 u_int sg_queue_cnt;
1004
1005                 done_qaddr = ADV_QNO_TO_QADDR(done_qno);
1006
1007                 /* Pull status from this request */
1008                 sg_queue_cnt = adv_copy_lram_doneq(adv, done_qaddr, &scsiq,
1009                                                    adv->max_dma_count);
1010
1011                 /* Mark it as free */
1012                 adv_write_lram_8(adv, done_qaddr + ADV_SCSIQ_B_STATUS,
1013                                  scsiq.q_status & ~(QS_READY|QS_ABORTED));
1014
1015                 /* Process request based on retrieved info */
1016                 if ((scsiq.cntl & QC_SG_HEAD) != 0) {
1017                         u_int i;
1018
1019                         /*
1020                          * S/G based request.  Free all of the queue
1021                          * structures that contained S/G information.
1022                          */
1023                         for (i = 0; i < sg_queue_cnt; i++) {
1024                                 done_qno = adv_read_lram_8(adv, done_qaddr
1025                                                            + ADV_SCSIQ_B_FWD);
1026
1027 #ifdef DIAGNOSTIC
1028                                 if (done_qno == ADV_QLINK_END) {
1029                                         panic("adv_qdone: Corrupted SG "
1030                                               "list encountered");
1031                                 }
1032 #endif
1033                                 done_qaddr = ADV_QNO_TO_QADDR(done_qno);
1034
1035                                 /* Mark SG queue as free */
1036                                 adv_write_lram_8(adv, done_qaddr
1037                                                  + ADV_SCSIQ_B_STATUS, QS_FREE);
1038                         }
1039                 } else
1040                         sg_queue_cnt = 0;
1041 #ifdef DIAGNOSTIC
1042                 if (adv->cur_active < (sg_queue_cnt + 1))
1043                         panic("adv_qdone: Attempting to free more "
1044                               "queues than are active");
1045 #endif
1046                 adv->cur_active -= sg_queue_cnt + 1;
1047
1048                 if ((scsiq.q_status != QS_DONE)
1049                  && (scsiq.q_status & QS_ABORTED) == 0)
1050                         panic("adv_qdone: completed scsiq with unknown status");
1051
1052                 scsiq.remain_bytes += scsiq.extra_bytes;
1053
1054                 if ((scsiq.d3.done_stat == QD_WITH_ERROR) &&
1055                     (scsiq.d3.host_stat == QHSTA_M_DATA_OVER_RUN)) {
1056                         if ((scsiq.cntl & (QC_DATA_IN|QC_DATA_OUT)) == 0) {
1057                                 scsiq.d3.done_stat = QD_NO_ERROR;
1058                                 scsiq.d3.host_stat = QHSTA_NO_ERROR;
1059                         }
1060                 }
1061
1062                 cinfo = &adv->ccb_infos[scsiq.d2.ccb_index];
1063                 ccb = cinfo->ccb;
1064                 ccb->csio.resid = scsiq.remain_bytes;
1065                 adv_done(adv, ccb,
1066                          scsiq.d3.done_stat, scsiq.d3.host_stat,
1067                          scsiq.d3.scsi_stat, scsiq.q_no);
1068
1069                 doneq_head = done_qno;
1070                 done_qno = adv_read_lram_8(adv, done_qaddr + ADV_SCSIQ_B_FWD);
1071         }
1072         adv_write_lram_16(adv, ADVV_DONE_Q_TAIL_W, doneq_head);
1073 }
1074
1075
1076 void
1077 adv_done(struct adv_softc *adv, union ccb *ccb, u_int done_stat,
1078          u_int host_stat, u_int scsi_status, u_int q_no)
1079 {
1080         struct     adv_ccb_info *cinfo;
1081
1082         if (!dumping)
1083                 mtx_assert(&adv->lock, MA_OWNED);
1084         cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
1085         LIST_REMOVE(&ccb->ccb_h, sim_links.le);
1086         callout_stop(&cinfo->timer);
1087         if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1088                 bus_dmasync_op_t op;
1089
1090                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1091                         op = BUS_DMASYNC_POSTREAD;
1092                 else
1093                         op = BUS_DMASYNC_POSTWRITE;
1094                 bus_dmamap_sync(adv->buffer_dmat, cinfo->dmamap, op);
1095                 bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
1096         }
1097
1098         switch (done_stat) {
1099         case QD_NO_ERROR:
1100                 if (host_stat == QHSTA_NO_ERROR) {
1101                         ccb->ccb_h.status = CAM_REQ_CMP;
1102                         break;
1103                 }
1104                 xpt_print_path(ccb->ccb_h.path);
1105                 printf("adv_done - queue done without error, "
1106                        "but host status non-zero(%x)\n", host_stat);
1107                 /*FALLTHROUGH*/
1108         case QD_WITH_ERROR:
1109                 switch (host_stat) {
1110                 case QHSTA_M_TARGET_STATUS_BUSY:
1111                 case QHSTA_M_BAD_QUEUE_FULL_OR_BUSY:
1112                         /*
1113                          * Assume that if we were a tagged transaction
1114                          * the target reported queue full.  Otherwise,
1115                          * report busy.  The firmware really should just
1116                          * pass the original status back up to us even
1117                          * if it thinks the target was in error for
1118                          * returning this status as no other transactions
1119                          * from this initiator are in effect, but this
1120                          * ignores multi-initiator setups and there is
1121                          * evidence that the firmware gets its per-device
1122                          * transaction counts screwed up occasionally.
1123                          */
1124                         ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1125                         if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
1126                          && host_stat != QHSTA_M_TARGET_STATUS_BUSY)
1127                                 scsi_status = SCSI_STATUS_QUEUE_FULL;
1128                         else
1129                                 scsi_status = SCSI_STATUS_BUSY;
1130                         adv_abort_ccb(adv, ccb->ccb_h.target_id,
1131                                       ccb->ccb_h.target_lun,
1132                                       /*ccb*/NULL, CAM_REQUEUE_REQ,
1133                                       /*queued_only*/TRUE);
1134                         /*FALLTHROUGH*/
1135                 case QHSTA_M_NO_AUTO_REQ_SENSE:
1136                 case QHSTA_NO_ERROR:
1137                         ccb->csio.scsi_status = scsi_status;
1138                         switch (scsi_status) {
1139                         case SCSI_STATUS_CHECK_COND:
1140                         case SCSI_STATUS_CMD_TERMINATED:
1141                                 ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
1142                                 /* Structure copy */
1143                                 ccb->csio.sense_data =
1144                                     adv->sense_buffers[q_no - 1];
1145                                 /* FALLTHROUGH */
1146                         case SCSI_STATUS_BUSY:
1147                         case SCSI_STATUS_RESERV_CONFLICT:
1148                         case SCSI_STATUS_QUEUE_FULL:
1149                         case SCSI_STATUS_COND_MET:
1150                         case SCSI_STATUS_INTERMED:
1151                         case SCSI_STATUS_INTERMED_COND_MET:
1152                                 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1153                                 break;
1154                         case SCSI_STATUS_OK:
1155                                 ccb->ccb_h.status |= CAM_REQ_CMP;
1156                                 break;
1157                         }
1158                         break;
1159                 case QHSTA_M_SEL_TIMEOUT:
1160                         ccb->ccb_h.status = CAM_SEL_TIMEOUT;
1161                         break;
1162                 case QHSTA_M_DATA_OVER_RUN:
1163                         ccb->ccb_h.status = CAM_DATA_RUN_ERR;
1164                         break;
1165                 case QHSTA_M_UNEXPECTED_BUS_FREE:
1166                         ccb->ccb_h.status = CAM_UNEXP_BUSFREE;
1167                         break;
1168                 case QHSTA_M_BAD_BUS_PHASE_SEQ:
1169                         ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
1170                         break;
1171                 case QHSTA_M_BAD_CMPL_STATUS_IN:
1172                         /* No command complete after a status message */
1173                         ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
1174                         break;
1175                 case QHSTA_D_EXE_SCSI_Q_BUSY_TIMEOUT:
1176                 case QHSTA_M_WTM_TIMEOUT:
1177                 case QHSTA_M_HUNG_REQ_SCSI_BUS_RESET:
1178                         /* The SCSI bus hung in a phase */
1179                         ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
1180                         adv_reset_bus(adv, /*initiate_reset*/TRUE);
1181                         break;
1182                 case QHSTA_M_AUTO_REQ_SENSE_FAIL:
1183                         ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
1184                         break;
1185                 case QHSTA_D_QDONE_SG_LIST_CORRUPTED:
1186                 case QHSTA_D_ASC_DVC_ERROR_CODE_SET:
1187                 case QHSTA_D_HOST_ABORT_FAILED:
1188                 case QHSTA_D_EXE_SCSI_Q_FAILED:
1189                 case QHSTA_D_ASPI_NO_BUF_POOL:
1190                 case QHSTA_M_BAD_TAG_CODE:
1191                 case QHSTA_D_LRAM_CMP_ERROR:
1192                 case QHSTA_M_MICRO_CODE_ERROR_HALT:
1193                 default:
1194                         panic("%s: Unhandled Host status error %x",
1195                             device_get_nameunit(adv->dev), host_stat);
1196                         /* NOTREACHED */
1197                 }
1198                 break;
1199
1200         case QD_ABORTED_BY_HOST:
1201                 /* Don't clobber any, more explicit, error codes we've set */
1202                 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG)
1203                         ccb->ccb_h.status = CAM_REQ_ABORTED;
1204                 break;
1205
1206         default:
1207                 xpt_print_path(ccb->ccb_h.path);
1208                 printf("adv_done - queue done with unknown status %x:%x\n",
1209                        done_stat, host_stat);
1210                 ccb->ccb_h.status = CAM_REQ_CMP_ERR;
1211                 break;
1212         }
1213         adv_clear_state(adv, ccb);
1214         if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP
1215          && (ccb->ccb_h.status & CAM_DEV_QFRZN) == 0) {
1216                 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1217                 ccb->ccb_h.status |= CAM_DEV_QFRZN;
1218         }
1219         adv_free_ccb_info(adv, cinfo);
1220         /*
1221          * Null this out so that we catch driver bugs that cause a
1222          * ccb to be completed twice.
1223          */
1224         ccb->ccb_h.ccb_cinfo_ptr = NULL;
1225         ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1226         xpt_done(ccb);
1227 }
1228
1229 /*
1230  * Function to poll for command completion when
1231  * interrupts are disabled (crash dumps)
1232  */
1233 static void
1234 adv_poll(struct cam_sim *sim)
1235 {
1236
1237         adv_intr_locked(cam_sim_softc(sim));
1238 }
1239
1240 /*
1241  * Attach all the sub-devices we can find
1242  */
1243 int
1244 adv_attach(adv)
1245         struct adv_softc *adv;
1246 {
1247         struct ccb_setasync csa;
1248         struct cam_devq *devq;
1249         int max_sg;
1250
1251         /*
1252          * Allocate an array of ccb mapping structures.  We put the
1253          * index of the ccb_info structure into the queue representing
1254          * a transaction and use it for mapping the queue to the
1255          * upper level SCSI transaction it represents.
1256          */
1257         adv->ccb_infos = malloc(sizeof(*adv->ccb_infos) * adv->max_openings,
1258                                 M_DEVBUF, M_NOWAIT);
1259
1260         if (adv->ccb_infos == NULL)
1261                 return (ENOMEM);
1262
1263         adv->init_level++;
1264
1265         /*
1266          * Create our DMA tags.  These tags define the kinds of device
1267          * accessible memory allocations and memory mappings we will
1268          * need to perform during normal operation.
1269          *
1270          * Unless we need to further restrict the allocation, we rely
1271          * on the restrictions of the parent dmat, hence the common
1272          * use of MAXADDR and MAXSIZE.
1273          *
1274          * The ASC boards use chains of "queues" (the transactional
1275          * resources on the board) to represent long S/G lists.
1276          * The first queue represents the command and holds a
1277          * single address and data pair.  The queues that follow
1278          * can each hold ADV_SG_LIST_PER_Q entries.  Given the
1279          * total number of queues, we can express the largest
1280          * transaction we can map.  We reserve a few queues for
1281          * error recovery.  Take those into account as well.
1282          *
1283          * There is a way to take an interrupt to download the
1284          * next batch of S/G entries if there are more than 255
1285          * of them (the counter in the queue structure is a u_int8_t).
1286          * We don't use this feature, so limit the S/G list size
1287          * accordingly.
1288          */
1289         max_sg = (adv->max_openings - ADV_MIN_FREE_Q - 1) * ADV_SG_LIST_PER_Q;
1290         if (max_sg > 255)
1291                 max_sg = 255;
1292
1293         /* DMA tag for mapping buffers into device visible space. */
1294         if (bus_dma_tag_create(
1295                         /* parent       */ adv->parent_dmat,
1296                         /* alignment    */ 1,
1297                         /* boundary     */ 0,
1298                         /* lowaddr      */ BUS_SPACE_MAXADDR,
1299                         /* highaddr     */ BUS_SPACE_MAXADDR,
1300                         /* filter       */ NULL,
1301                         /* filterarg    */ NULL,
1302                         /* maxsize      */ ADV_MAXPHYS,
1303                         /* nsegments    */ max_sg,
1304                         /* maxsegsz     */ BUS_SPACE_MAXSIZE_32BIT,
1305                         /* flags        */ BUS_DMA_ALLOCNOW,
1306                         /* lockfunc     */ busdma_lock_mutex,
1307                         /* lockarg      */ &adv->lock,
1308                         &adv->buffer_dmat) != 0) {
1309                 return (ENXIO);
1310         }
1311         adv->init_level++;
1312
1313         /* DMA tag for our sense buffers */
1314         if (bus_dma_tag_create(
1315                         /* parent       */ adv->parent_dmat,
1316                         /* alignment    */ 1,
1317                         /* boundary     */ 0,
1318                         /* lowaddr      */ BUS_SPACE_MAXADDR,
1319                         /* highaddr     */ BUS_SPACE_MAXADDR,
1320                         /* filter       */ NULL,
1321                         /* filterarg    */ NULL,
1322                         /* maxsize      */ sizeof(struct scsi_sense_data) *
1323                                            adv->max_openings,
1324                         /* nsegments    */ 1,
1325                         /* maxsegsz     */ BUS_SPACE_MAXSIZE_32BIT,
1326                         /* flags        */ 0,
1327                         /* lockfunc     */ busdma_lock_mutex,
1328                         /* lockarg      */ &adv->lock,
1329                         &adv->sense_dmat) != 0) {
1330                 return (ENXIO);
1331         }
1332
1333         adv->init_level++;
1334
1335         /* Allocation for our sense buffers */
1336         if (bus_dmamem_alloc(adv->sense_dmat, (void **)&adv->sense_buffers,
1337                              BUS_DMA_NOWAIT, &adv->sense_dmamap) != 0) {
1338                 return (ENOMEM);
1339         }
1340
1341         adv->init_level++;
1342
1343         /* And permanently map them */
1344         bus_dmamap_load(adv->sense_dmat, adv->sense_dmamap,
1345                         adv->sense_buffers,
1346                         sizeof(struct scsi_sense_data)*adv->max_openings,
1347                         adv_map, &adv->sense_physbase, /*flags*/0);
1348
1349         adv->init_level++;
1350
1351         /*
1352          * Fire up the chip
1353          */
1354         if (adv_start_chip(adv) != 1) {
1355                 device_printf(adv->dev,
1356                     "Unable to start on board processor. Aborting.\n");
1357                 return (ENXIO);
1358         }
1359
1360         /*
1361          * Create the device queue for our SIM.
1362          */
1363         devq = cam_simq_alloc(adv->max_openings);
1364         if (devq == NULL)
1365                 return (ENOMEM);
1366
1367         /*
1368          * Construct our SIM entry.
1369          */
1370         adv->sim = cam_sim_alloc(adv_action, adv_poll, "adv", adv,
1371             device_get_unit(adv->dev), &adv->lock, 1, adv->max_openings, devq);
1372         if (adv->sim == NULL)
1373                 return (ENOMEM);
1374
1375         /*
1376          * Register the bus.
1377          *
1378          * XXX Twin Channel EISA Cards???
1379          */
1380         mtx_lock(&adv->lock);
1381         if (xpt_bus_register(adv->sim, adv->dev, 0) != CAM_SUCCESS) {
1382                 cam_sim_free(adv->sim, /*free devq*/TRUE);
1383                 mtx_unlock(&adv->lock);
1384                 return (ENXIO);
1385         }
1386
1387         if (xpt_create_path(&adv->path, /*periph*/NULL, cam_sim_path(adv->sim),
1388                             CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD)
1389             != CAM_REQ_CMP) {
1390                 xpt_bus_deregister(cam_sim_path(adv->sim));
1391                 cam_sim_free(adv->sim, /*free devq*/TRUE);
1392                 mtx_unlock(&adv->lock);
1393                 return (ENXIO);
1394         }
1395
1396         xpt_setup_ccb(&csa.ccb_h, adv->path, /*priority*/5);
1397         csa.ccb_h.func_code = XPT_SASYNC_CB;
1398         csa.event_enable = AC_FOUND_DEVICE|AC_LOST_DEVICE;
1399         csa.callback = advasync;
1400         csa.callback_arg = adv;
1401         xpt_action((union ccb *)&csa);
1402         mtx_unlock(&adv->lock);
1403         return (0);
1404 }
1405 MODULE_DEPEND(adv, cam, 1, 1, 1);