sys/dev/advansys/advansys.c

   1 /*-
   2  * Generic driver for the Advanced Systems Inc. SCSI controllers
   3  * Product specific probe and attach routines can be found in:
   4  *
   5  * i386/isa/adv_isa.c   ABP5140, ABP542, ABP5150, ABP842, ABP852
   6  * pci/adv_pci.c        ABP920, ABP930, ABP930U, ABP930UA, ABP940, ABP940U,
   7  *                      ABP940UA, ABP950, ABP960, ABP960U, ABP960UA,
   8  *                      ABP970, ABP970U
   9  *
  10  * Copyright (c) 1996-2000 Justin Gibbs.
  11  * All rights reserved.
  12  *
  13  * Redistribution and use in source and binary forms, with or without
  14  * modification, are permitted provided that the following conditions
  15  * are met:
  16  * 1. Redistributions of source code must retain the above copyright
  17  *    notice, this list of conditions, and the following disclaimer,
  18  *    without modification, immediately at the beginning of the file.
  19  * 2. The name of the author may not be used to endorse or promote products
  20  *    derived from this software without specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  26  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  */
  34 /*-
  35  * Ported from:
  36  * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
  37  *
  38  * Copyright (c) 1995-1997 Advanced System Products, Inc.
  39  * All Rights Reserved.
  40  *
  41  * Redistribution and use in source and binary forms, with or without
  42  * modification, are permitted provided that redistributions of source
  43  * code retain the above copyright notice and this comment without
  44  * modification.
  45  */
  46
  47 #include <sys/cdefs.h>
  48 __FBSDID("$FreeBSD$");
  49
  50 #include <sys/param.h>
  51 #include <sys/conf.h>
  52 #include <sys/systm.h>
  53 #include <sys/malloc.h>
  54 #include <sys/kernel.h>
  55 #include <sys/lock.h>
  56 #include <sys/module.h>
  57 #include <sys/mutex.h>
  58
  59 #include <machine/bus.h>
  60 #include <machine/resource.h>
  61 #include <sys/bus.h>
  62 #include <sys/rman.h>
  63
  64 #include <cam/cam.h>
  65 #include <cam/cam_ccb.h>
  66 #include <cam/cam_sim.h>
  67 #include <cam/cam_xpt_sim.h>
  68 #include <cam/cam_debug.h>
  69
  70 #include <cam/scsi/scsi_all.h>
  71 #include <cam/scsi/scsi_message.h>
  72
  73 #include <vm/vm.h>
  74 #include <vm/vm_param.h>
  75 #include <vm/pmap.h>
  76
  77 #include <dev/advansys/advansys.h>
  78
  79 static void     adv_action(struct cam_sim *sim, union ccb *ccb);
  80 static void     adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
  81                                 int nsegments, int error);
  82 static void     adv_intr_locked(struct adv_softc *adv);
  83 static void     adv_poll(struct cam_sim *sim);
  84 static void     adv_run_doneq(struct adv_softc *adv);
  85 static struct adv_ccb_info *
  86                 adv_alloc_ccb_info(struct adv_softc *adv);
  87 static void     adv_destroy_ccb_info(struct adv_softc *adv,
  88                                      struct adv_ccb_info *cinfo);
  89 static __inline struct adv_ccb_info *
  90                 adv_get_ccb_info(struct adv_softc *adv);
  91 static __inline void adv_free_ccb_info(struct adv_softc *adv,
  92                                        struct adv_ccb_info *cinfo);
  93 static __inline void adv_set_state(struct adv_softc *adv, adv_state state);
  94 static __inline void adv_clear_state(struct adv_softc *adv, union ccb* ccb);
  95 static void adv_clear_state_really(struct adv_softc *adv, union ccb* ccb);
  96
  97 static __inline struct adv_ccb_info *
  98 adv_get_ccb_info(struct adv_softc *adv)
  99 {
 100         struct adv_ccb_info *cinfo;
 101
 102         if (!dumping)
 103                 mtx_assert(&adv->lock, MA_OWNED);
 104         if ((cinfo = SLIST_FIRST(&adv->free_ccb_infos)) != NULL) {
 105                 SLIST_REMOVE_HEAD(&adv->free_ccb_infos, links);
 106         } else {
 107                 cinfo = adv_alloc_ccb_info(adv);
 108         }
 109
 110         return (cinfo);
 111 }
 112
 113 static __inline void
 114 adv_free_ccb_info(struct adv_softc *adv, struct adv_ccb_info *cinfo)
 115 {
 116
 117         if (!dumping)
 118                 mtx_assert(&adv->lock, MA_OWNED);
 119         cinfo->state = ACCB_FREE;
 120         SLIST_INSERT_HEAD(&adv->free_ccb_infos, cinfo, links);
 121 }
 122
 123 static __inline void
 124 adv_set_state(struct adv_softc *adv, adv_state state)
 125 {
 126         if (adv->state == 0)
 127                 xpt_freeze_simq(adv->sim, /*count*/1);
 128         adv->state |= state;
 129 }
 130
 131 static __inline void
 132 adv_clear_state(struct adv_softc *adv, union ccb* ccb)
 133 {
 134         if (adv->state != 0)
 135                 adv_clear_state_really(adv, ccb);
 136 }
 137
 138 static void
 139 adv_clear_state_really(struct adv_softc *adv, union ccb* ccb)
 140 {
 141
 142         if (!dumping)
 143                 mtx_assert(&adv->lock, MA_OWNED);
 144         if ((adv->state & ADV_BUSDMA_BLOCK_CLEARED) != 0)
 145                 adv->state &= ~(ADV_BUSDMA_BLOCK_CLEARED|ADV_BUSDMA_BLOCK);
 146         if ((adv->state & ADV_RESOURCE_SHORTAGE) != 0) {
 147                 int openings;
 148
 149                 openings = adv->max_openings - adv->cur_active - ADV_MIN_FREE_Q;
 150                 if (openings >= adv->openings_needed) {
 151                         adv->state &= ~ADV_RESOURCE_SHORTAGE;
 152                         adv->openings_needed = 0;
 153                 }
 154         }
 155
 156         if ((adv->state & ADV_IN_TIMEOUT) != 0) {
 157                 struct adv_ccb_info *cinfo;
 158
 159                 cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
 160                 if ((cinfo->state & ACCB_RECOVERY_CCB) != 0) {
 161                         struct ccb_hdr *ccb_h;
 162
 163                         /*
 164                          * We now traverse our list of pending CCBs
 165                          * and reinstate their timeouts.
 166                          */
 167                         ccb_h = LIST_FIRST(&adv->pending_ccbs);
 168                         while (ccb_h != NULL) {
 169                                 cinfo = ccb_h->ccb_cinfo_ptr;
 170                                 callout_reset_sbt(&cinfo->timer,
 171                                     SBT_1MS * ccb_h->timeout, 0,
 172                                     adv_timeout, ccb_h, 0);
 173                                 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
 174                         }
 175                         adv->state &= ~ADV_IN_TIMEOUT;
 176                         device_printf(adv->dev, "No longer in timeout\n");
 177                 }
 178         }
 179         if (adv->state == 0)
 180                 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
 181 }
 182
 183 void
 184 adv_map(void *arg, bus_dma_segment_t *segs, int nseg, int error)
 185 {
 186         bus_addr_t* physaddr;
 187
 188         physaddr = (bus_addr_t*)arg;
 189         *physaddr = segs->ds_addr;
 190 }
 191
 192 static void
 193 adv_action(struct cam_sim *sim, union ccb *ccb)
 194 {
 195         struct adv_softc *adv;
 196
 197         CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("adv_action\n"));
 198
 199         adv = (struct adv_softc *)cam_sim_softc(sim);
 200         mtx_assert(&adv->lock, MA_OWNED);
 201
 202         switch (ccb->ccb_h.func_code) {
 203         /* Common cases first */
 204         case XPT_SCSI_IO:       /* Execute the requested I/O operation */
 205         {
 206                 struct  ccb_hdr *ccb_h;
 207                 struct  ccb_scsiio *csio;
 208                 struct  adv_ccb_info *cinfo;
 209                 int error;
 210
 211                 ccb_h = &ccb->ccb_h;
 212                 csio = &ccb->csio;
 213                 cinfo = adv_get_ccb_info(adv);
 214                 if (cinfo == NULL)
 215                         panic("XXX Handle CCB info error!!!");
 216
 217                 ccb_h->ccb_cinfo_ptr = cinfo;
 218                 cinfo->ccb = ccb;
 219
 220                 error = bus_dmamap_load_ccb(adv->buffer_dmat,
 221                                             cinfo->dmamap,
 222                                             ccb,
 223                                             adv_execute_ccb,
 224                                             csio, /*flags*/0);
 225                 if (error == EINPROGRESS) {
 226                         /*
 227                          * So as to maintain ordering, freeze the controller
 228                          * queue until our mapping is returned.
 229                          */
 230                         adv_set_state(adv, ADV_BUSDMA_BLOCK);
 231                 }
 232                 break;
 233         }
 234         case XPT_RESET_DEV:     /* Bus Device Reset the specified SCSI device */
 235         case XPT_ABORT:                 /* Abort the specified CCB */
 236                 /* XXX Implement */
 237                 ccb->ccb_h.status = CAM_REQ_INVALID;
 238                 xpt_done(ccb);
 239                 break;
 240 #define IS_CURRENT_SETTINGS(c)  (c->type == CTS_TYPE_CURRENT_SETTINGS)
 241 #define IS_USER_SETTINGS(c)     (c->type == CTS_TYPE_USER_SETTINGS)
 242         case XPT_SET_TRAN_SETTINGS:
 243         {
 244                 struct ccb_trans_settings_scsi *scsi;
 245                 struct ccb_trans_settings_spi *spi;
 246                 struct   ccb_trans_settings *cts;
 247                 target_bit_vector targ_mask;
 248                 struct adv_transinfo *tconf;
 249                 u_int    update_type;
 250
 251                 cts = &ccb->cts;
 252                 targ_mask = ADV_TID_TO_TARGET_MASK(cts->ccb_h.target_id);
 253                 update_type = 0;
 254
 255                 /*
 256                  * The user must specify which type of settings he wishes
 257                  * to change.
 258                  */
 259                 if (IS_CURRENT_SETTINGS(cts) && !IS_USER_SETTINGS(cts)) {
 260                         tconf = &adv->tinfo[cts->ccb_h.target_id].current;
 261                         update_type |= ADV_TRANS_GOAL;
 262                 } else if (IS_USER_SETTINGS(cts) && !IS_CURRENT_SETTINGS(cts)) {
 263                         tconf = &adv->tinfo[cts->ccb_h.target_id].user;
 264                         update_type |= ADV_TRANS_USER;
 265                 } else {
 266                         ccb->ccb_h.status = CAM_REQ_INVALID;
 267                         break;
 268                 }
 269
 270                 scsi = &cts->proto_specific.scsi;
 271                 spi = &cts->xport_specific.spi;
 272                 if ((update_type & ADV_TRANS_GOAL) != 0) {
 273                         if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
 274                                 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
 275                                         adv->disc_enable |= targ_mask;
 276                                 else
 277                                         adv->disc_enable &= ~targ_mask;
 278                                 adv_write_lram_8(adv, ADVV_DISC_ENABLE_B,
 279                                                  adv->disc_enable);
 280                         }
 281
 282                         if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
 283                                 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
 284                                         adv->cmd_qng_enabled |= targ_mask;
 285                                 else
 286                                         adv->cmd_qng_enabled &= ~targ_mask;
 287                         }
 288                 }
 289
 290                 if ((update_type & ADV_TRANS_USER) != 0) {
 291                         if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
 292                                 if ((spi->flags & CTS_SPI_VALID_DISC) != 0)
 293                                         adv->user_disc_enable |= targ_mask;
 294                                 else
 295                                         adv->user_disc_enable &= ~targ_mask;
 296                         }
 297
 298                         if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
 299                                 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
 300                                         adv->user_cmd_qng_enabled |= targ_mask;
 301                                 else
 302                                         adv->user_cmd_qng_enabled &= ~targ_mask;
 303                         }
 304                 }
 305
 306                 /*
 307                  * If the user specifies either the sync rate, or offset,
 308                  * but not both, the unspecified parameter defaults to its
 309                  * current value in transfer negotiations.
 310                  */
 311                 if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
 312                  || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) {
 313                         /*
 314                          * If the user provided a sync rate but no offset,
 315                          * use the current offset.
 316                          */
 317                         if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) == 0)
 318                                 spi->sync_offset = tconf->offset;
 319
 320                         /*
 321                          * If the user provided an offset but no sync rate,
 322                          * use the current sync rate.
 323                          */
 324                         if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) == 0)
 325                                 spi->sync_period = tconf->period;
 326
 327                         adv_period_offset_to_sdtr(adv, &spi->sync_period,
 328                                                   &spi->sync_offset,
 329                                                   cts->ccb_h.target_id);
 330
 331                         adv_set_syncrate(adv, /*struct cam_path */NULL,
 332                                          cts->ccb_h.target_id, spi->sync_period,
 333                                          spi->sync_offset, update_type);
 334                 }
 335
 336                 ccb->ccb_h.status = CAM_REQ_CMP;
 337                 xpt_done(ccb);
 338                 break;
 339         }
 340         case XPT_GET_TRAN_SETTINGS:
 341         /* Get default/user set transfer settings for the target */
 342         {
 343                 struct ccb_trans_settings_scsi *scsi;
 344                 struct ccb_trans_settings_spi *spi;
 345                 struct ccb_trans_settings *cts;
 346                 struct adv_transinfo *tconf;
 347                 target_bit_vector target_mask;
 348
 349                 cts = &ccb->cts;
 350                 target_mask = ADV_TID_TO_TARGET_MASK(cts->ccb_h.target_id);
 351
 352                 scsi = &cts->proto_specific.scsi;
 353                 spi = &cts->xport_specific.spi;
 354
 355                 cts->protocol = PROTO_SCSI;
 356                 cts->protocol_version = SCSI_REV_2;
 357                 cts->transport = XPORT_SPI;
 358                 cts->transport_version = 2;
 359
 360                 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
 361                 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
 362
 363                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
 364                         tconf = &adv->tinfo[cts->ccb_h.target_id].current;
 365                         if ((adv->disc_enable & target_mask) != 0)
 366                                 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
 367                         if ((adv->cmd_qng_enabled & target_mask) != 0)
 368                                 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
 369                 } else {
 370                         tconf = &adv->tinfo[cts->ccb_h.target_id].user;
 371                         if ((adv->user_disc_enable & target_mask) != 0)
 372                                 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
 373                         if ((adv->user_cmd_qng_enabled & target_mask) != 0)
 374                                 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
 375                 }
 376                 spi->sync_period = tconf->period;
 377                 spi->sync_offset = tconf->offset;
 378                 spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
 379                 spi->valid = CTS_SPI_VALID_SYNC_RATE
 380                            | CTS_SPI_VALID_SYNC_OFFSET
 381                            | CTS_SPI_VALID_BUS_WIDTH
 382                            | CTS_SPI_VALID_DISC;
 383                 scsi->valid = CTS_SCSI_VALID_TQ;
 384                 ccb->ccb_h.status = CAM_REQ_CMP;
 385                 xpt_done(ccb);
 386                 break;
 387         }
 388         case XPT_CALC_GEOMETRY:
 389         {
 390                 int       extended;
 391
 392                 extended = (adv->control & ADV_CNTL_BIOS_GT_1GB) != 0;
 393                 cam_calc_geometry(&ccb->ccg, extended);
 394                 xpt_done(ccb);
 395                 break;
 396         }
 397         case XPT_RESET_BUS:             /* Reset the specified SCSI bus */
 398         {
 399
 400                 adv_stop_execution(adv);
 401                 adv_reset_bus(adv, /*initiate_reset*/TRUE);
 402                 adv_start_execution(adv);
 403
 404                 ccb->ccb_h.status = CAM_REQ_CMP;
 405                 xpt_done(ccb);
 406                 break;
 407         }
 408         case XPT_TERM_IO:               /* Terminate the I/O process */
 409                 /* XXX Implement */
 410                 ccb->ccb_h.status = CAM_REQ_INVALID;
 411                 xpt_done(ccb);
 412                 break;
 413         case XPT_PATH_INQ:              /* Path routing inquiry */
 414         {
 415                 struct ccb_pathinq *cpi = &ccb->cpi;
 416
 417                 cpi->version_num = 1; /* XXX??? */
 418                 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
 419                 cpi->target_sprt = 0;
 420                 cpi->hba_misc = 0;
 421                 cpi->hba_eng_cnt = 0;
 422                 cpi->max_target = 7;
 423                 cpi->max_lun = 7;
 424                 cpi->initiator_id = adv->scsi_id;
 425                 cpi->bus_id = cam_sim_bus(sim);
 426                 cpi->base_transfer_speed = 3300;
 427                 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
 428                 strlcpy(cpi->hba_vid, "Advansys", HBA_IDLEN);
 429                 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
 430                 cpi->unit_number = cam_sim_unit(sim);
 431                 cpi->ccb_h.status = CAM_REQ_CMP;
 432                 cpi->transport = XPORT_SPI;
 433                 cpi->transport_version = 2;
 434                 cpi->protocol = PROTO_SCSI;
 435                 cpi->protocol_version = SCSI_REV_2;
 436                 xpt_done(ccb);
 437                 break;
 438         }
 439         default:
 440                 ccb->ccb_h.status = CAM_REQ_INVALID;
 441                 xpt_done(ccb);
 442                 break;
 443         }
 444 }
 445
 446 /*
 447  * Currently, the output of bus_dmammap_load suits our needs just
 448  * fine, but should it change, we'd need to do something here.
 449  */
 450 #define adv_fixup_dmasegs(adv, dm_segs) (struct adv_sg_entry *)(dm_segs)
 451
 452 static void
 453 adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
 454                 int nsegments, int error)
 455 {
 456         struct  ccb_scsiio *csio;
 457         struct  ccb_hdr *ccb_h;
 458         struct  cam_sim *sim;
 459         struct  adv_softc *adv;
 460         struct  adv_ccb_info *cinfo;
 461         struct  adv_scsi_q scsiq;
 462         struct  adv_sg_head sghead;
 463
 464         csio = (struct ccb_scsiio *)arg;
 465         ccb_h = &csio->ccb_h;
 466         sim = xpt_path_sim(ccb_h->path);
 467         adv = (struct adv_softc *)cam_sim_softc(sim);
 468         cinfo = (struct adv_ccb_info *)csio->ccb_h.ccb_cinfo_ptr;
 469         if (!dumping)
 470                 mtx_assert(&adv->lock, MA_OWNED);
 471
 472         /*
 473          * Setup our done routine to release the simq on
 474          * the next ccb that completes.
 475          */
 476         if ((adv->state & ADV_BUSDMA_BLOCK) != 0)
 477                 adv->state |= ADV_BUSDMA_BLOCK_CLEARED;
 478
 479         if ((ccb_h->flags & CAM_CDB_POINTER) != 0) {
 480                 if ((ccb_h->flags & CAM_CDB_PHYS) == 0) {
 481                         /* XXX Need phystovirt!!!! */
 482                         /* How about pmap_kenter??? */
 483                         scsiq.cdbptr = csio->cdb_io.cdb_ptr;
 484                 } else {
 485                         scsiq.cdbptr = csio->cdb_io.cdb_ptr;
 486                 }
 487         } else {
 488                 scsiq.cdbptr = csio->cdb_io.cdb_bytes;
 489         }
 490         /*
 491          * Build up the request
 492          */
 493         scsiq.q1.status = 0;
 494         scsiq.q1.q_no = 0;
 495         scsiq.q1.cntl = 0;
 496         scsiq.q1.sg_queue_cnt = 0;
 497         scsiq.q1.target_id = ADV_TID_TO_TARGET_MASK(ccb_h->target_id);
 498         scsiq.q1.target_lun = ccb_h->target_lun;
 499         scsiq.q1.sense_len = csio->sense_len;
 500         scsiq.q1.extra_bytes = 0;
 501         scsiq.q2.ccb_index = cinfo - adv->ccb_infos;
 502         scsiq.q2.target_ix = ADV_TIDLUN_TO_IX(ccb_h->target_id,
 503                                               ccb_h->target_lun);
 504         scsiq.q2.flag = 0;
 505         scsiq.q2.cdb_len = csio->cdb_len;
 506         if ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0)
 507                 scsiq.q2.tag_code = csio->tag_action;
 508         else
 509                 scsiq.q2.tag_code = 0;
 510         scsiq.q2.vm_id = 0;
 511
 512         if (nsegments != 0) {
 513                 bus_dmasync_op_t op;
 514
 515                 scsiq.q1.data_addr = dm_segs->ds_addr;
 516                 scsiq.q1.data_cnt = dm_segs->ds_len;
 517                 if (nsegments > 1) {
 518                         scsiq.q1.cntl |= QC_SG_HEAD;
 519                         sghead.entry_cnt
 520                             = sghead.entry_to_copy
 521                             = nsegments;
 522                         sghead.res = 0;
 523                         sghead.sg_list = adv_fixup_dmasegs(adv, dm_segs);
 524                         scsiq.sg_head = &sghead;
 525                 } else {
 526                         scsiq.sg_head = NULL;
 527                 }
 528                 if ((ccb_h->flags & CAM_DIR_MASK) == CAM_DIR_IN)
 529                         op = BUS_DMASYNC_PREREAD;
 530                 else
 531                         op = BUS_DMASYNC_PREWRITE;
 532                 bus_dmamap_sync(adv->buffer_dmat, cinfo->dmamap, op);
 533         } else {
 534                 scsiq.q1.data_addr = 0;
 535                 scsiq.q1.data_cnt = 0;
 536                 scsiq.sg_head = NULL;
 537         }
 538
 539         /*
 540          * Last time we need to check if this SCB needs to
 541          * be aborted.
 542          */
 543         if (ccb_h->status != CAM_REQ_INPROG) {
 544                 if (nsegments != 0)
 545                         bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
 546                 adv_clear_state(adv, (union ccb *)csio);
 547                 adv_free_ccb_info(adv, cinfo);
 548                 xpt_done((union ccb *)csio);
 549                 return;
 550         }
 551
 552         if (adv_execute_scsi_queue(adv, &scsiq, csio->dxfer_len) != 0) {
 553                 /* Temporary resource shortage */
 554                 adv_set_state(adv, ADV_RESOURCE_SHORTAGE);
 555                 if (nsegments != 0)
 556                         bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
 557                 csio->ccb_h.status = CAM_REQUEUE_REQ;
 558                 adv_clear_state(adv, (union ccb *)csio);
 559                 adv_free_ccb_info(adv, cinfo);
 560                 xpt_done((union ccb *)csio);
 561                 return;
 562         }
 563         cinfo->state |= ACCB_ACTIVE;
 564         ccb_h->status |= CAM_SIM_QUEUED;
 565         LIST_INSERT_HEAD(&adv->pending_ccbs, ccb_h, sim_links.le);
 566         /* Schedule our timeout */
 567         callout_reset_sbt(&cinfo->timer, SBT_1MS * ccb_h->timeout, 0,
 568             adv_timeout, csio, 0);
 569 }
 570
 571 static struct adv_ccb_info *
 572 adv_alloc_ccb_info(struct adv_softc *adv)
 573 {
 574         int error;
 575         struct adv_ccb_info *cinfo;
 576
 577         cinfo = &adv->ccb_infos[adv->ccb_infos_allocated];
 578         cinfo->state = ACCB_FREE;
 579         callout_init_mtx(&cinfo->timer, &adv->lock, 0);
 580         error = bus_dmamap_create(adv->buffer_dmat, /*flags*/0,
 581                                   &cinfo->dmamap);
 582         if (error != 0) {
 583                 device_printf(adv->dev, "Unable to allocate CCB info "
 584                     "dmamap - error %d\n", error);
 585                 return (NULL);
 586         }
 587         adv->ccb_infos_allocated++;
 588         return (cinfo);
 589 }
 590
 591 static void
 592 adv_destroy_ccb_info(struct adv_softc *adv, struct adv_ccb_info *cinfo)
 593 {
 594
 595         callout_drain(&cinfo->timer);
 596         bus_dmamap_destroy(adv->buffer_dmat, cinfo->dmamap);
 597 }
 598
 599 void
 600 adv_timeout(void *arg)
 601 {
 602         union ccb *ccb;
 603         struct adv_softc *adv;
 604         struct adv_ccb_info *cinfo, *cinfo2;
 605
 606         ccb = (union ccb *)arg;
 607         adv = (struct adv_softc *)xpt_path_sim(ccb->ccb_h.path)->softc;
 608         cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
 609         mtx_assert(&adv->lock, MA_OWNED);
 610
 611         xpt_print_path(ccb->ccb_h.path);
 612         printf("Timed out\n");
 613
 614         /* Have we been taken care of already?? */
 615         if (cinfo == NULL || cinfo->state == ACCB_FREE) {
 616                 return;
 617         }
 618
 619         adv_stop_execution(adv);
 620
 621         if ((cinfo->state & ACCB_ABORT_QUEUED) == 0) {
 622                 struct ccb_hdr *ccb_h;
 623
 624                 /*
 625                  * In order to simplify the recovery process, we ask the XPT
 626                  * layer to halt the queue of new transactions and we traverse
 627                  * the list of pending CCBs and remove their timeouts. This
 628                  * means that the driver attempts to clear only one error
 629                  * condition at a time.  In general, timeouts that occur
 630                  * close together are related anyway, so there is no benefit
 631                  * in attempting to handle errors in parallel.  Timeouts will
 632                  * be reinstated when the recovery process ends.
 633                  */
 634                 adv_set_state(adv, ADV_IN_TIMEOUT);
 635
 636                 /* This CCB is the CCB representing our recovery actions */
 637                 cinfo->state |= ACCB_RECOVERY_CCB|ACCB_ABORT_QUEUED;
 638
 639                 ccb_h = LIST_FIRST(&adv->pending_ccbs);
 640                 while (ccb_h != NULL) {
 641                         cinfo2 = ccb_h->ccb_cinfo_ptr;
 642                         callout_stop(&cinfo2->timer);
 643                         ccb_h = LIST_NEXT(ccb_h, sim_links.le);
 644                 }
 645
 646                 /* XXX Should send a BDR */
 647                 /* Attempt an abort as our first tact */
 648                 xpt_print_path(ccb->ccb_h.path);
 649                 printf("Attempting abort\n");
 650                 adv_abort_ccb(adv, ccb->ccb_h.target_id,
 651                               ccb->ccb_h.target_lun, ccb,
 652                               CAM_CMD_TIMEOUT, /*queued_only*/FALSE);
 653                 callout_reset(&cinfo->timer, 2 * hz, adv_timeout, ccb);
 654         } else {
 655                 /* Our attempt to perform an abort failed, go for a reset */
 656                 xpt_print_path(ccb->ccb_h.path);
 657                 printf("Resetting bus\n");
 658                 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
 659                 ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
 660                 adv_reset_bus(adv, /*initiate_reset*/TRUE);
 661         }
 662         adv_start_execution(adv);
 663 }
 664
 665 struct adv_softc *
 666 adv_alloc(device_t dev, struct resource *res, long offset)
 667 {
 668         struct adv_softc *adv = device_get_softc(dev);
 669
 670         /*
 671          * Allocate a storage area for us
 672          */
 673         LIST_INIT(&adv->pending_ccbs);
 674         SLIST_INIT(&adv->free_ccb_infos);
 675         adv->dev = dev;
 676         adv->res = res;
 677         adv->reg_off = offset;
 678         mtx_init(&adv->lock, "adv", NULL, MTX_DEF);
 679
 680         return(adv);
 681 }
 682
 683 void
 684 adv_free(struct adv_softc *adv)
 685 {
 686         switch (adv->init_level) {
 687         case 6:
 688         {
 689                 struct adv_ccb_info *cinfo;
 690
 691                 while ((cinfo = SLIST_FIRST(&adv->free_ccb_infos)) != NULL) {
 692                         SLIST_REMOVE_HEAD(&adv->free_ccb_infos, links);
 693                         adv_destroy_ccb_info(adv, cinfo);
 694                 }
 695
 696                 bus_dmamap_unload(adv->sense_dmat, adv->sense_dmamap);
 697         }
 698         case 5:
 699                 bus_dmamem_free(adv->sense_dmat, adv->sense_buffers,
 700                                 adv->sense_dmamap);
 701         case 4:
 702                 bus_dma_tag_destroy(adv->sense_dmat);
 703         case 3:
 704                 bus_dma_tag_destroy(adv->buffer_dmat);
 705         case 2:
 706                 bus_dma_tag_destroy(adv->parent_dmat);
 707         case 1:
 708                 if (adv->ccb_infos != NULL)
 709                         free(adv->ccb_infos, M_DEVBUF);
 710         case 0:
 711                 mtx_destroy(&adv->lock);
 712                 break;
 713         }
 714 }
 715
 716 int
 717 adv_init(struct adv_softc *adv)
 718 {
 719         struct    adv_eeprom_config eeprom_config;
 720         int       checksum, i;
 721         int       max_sync;
 722         u_int16_t config_lsw;
 723         u_int16_t config_msw;
 724
 725         mtx_lock(&adv->lock);
 726         adv_lib_init(adv);
 727
 728         /*
 729          * Stop script execution.
 730          */
 731         adv_write_lram_16(adv, ADV_HALTCODE_W, 0x00FE);
 732         adv_stop_execution(adv);
 733         if (adv_stop_chip(adv) == 0 || adv_is_chip_halted(adv) == 0) {
 734                 mtx_unlock(&adv->lock);
 735                 device_printf(adv->dev,
 736                     "Unable to halt adapter. Initialization failed\n");
 737                 return (1);
 738         }
 739         ADV_OUTW(adv, ADV_REG_PROG_COUNTER, ADV_MCODE_START_ADDR);
 740         if (ADV_INW(adv, ADV_REG_PROG_COUNTER) != ADV_MCODE_START_ADDR) {
 741                 mtx_unlock(&adv->lock);
 742                 device_printf(adv->dev,
 743                     "Unable to set program counter. Initialization failed\n");
 744                 return (1);
 745         }
 746
 747         config_msw = ADV_INW(adv, ADV_CONFIG_MSW);
 748         config_lsw = ADV_INW(adv, ADV_CONFIG_LSW);
 749
 750         if ((config_msw & ADV_CFG_MSW_CLR_MASK) != 0) {
 751                 config_msw &= ~ADV_CFG_MSW_CLR_MASK;
 752                 /*
 753                  * XXX The Linux code flags this as an error,
 754                  * but what should we report to the user???
 755                  * It seems that clearing the config register
 756                  * makes this error recoverable.
 757                  */
 758                 ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
 759         }
 760
 761         /* Suck in the configuration from the EEProm */
 762         checksum = adv_get_eeprom_config(adv, &eeprom_config);
 763
 764         if (ADV_INW(adv, ADV_CHIP_STATUS) & ADV_CSW_AUTO_CONFIG) {
 765                 /*
 766                  * XXX The Linux code sets a warning level for this
 767                  * condition, yet nothing of meaning is printed to
 768                  * the user.  What does this mean???
 769                  */
 770                 if (adv->chip_version == 3) {
 771                         if (eeprom_config.cfg_lsw != config_lsw)
 772                                 eeprom_config.cfg_lsw = config_lsw;
 773                         if (eeprom_config.cfg_msw != config_msw) {
 774                                 eeprom_config.cfg_msw = config_msw;
 775                         }
 776                 }
 777         }
 778         if (checksum == eeprom_config.chksum) {
 779
 780                 /* Range/Sanity checking */
 781                 if (eeprom_config.max_total_qng < ADV_MIN_TOTAL_QNG) {
 782                         eeprom_config.max_total_qng = ADV_MIN_TOTAL_QNG;
 783                 }
 784                 if (eeprom_config.max_total_qng > ADV_MAX_TOTAL_QNG) {
 785                         eeprom_config.max_total_qng = ADV_MAX_TOTAL_QNG;
 786                 }
 787                 if (eeprom_config.max_tag_qng > eeprom_config.max_total_qng) {
 788                         eeprom_config.max_tag_qng = eeprom_config.max_total_qng;
 789                 }
 790                 if (eeprom_config.max_tag_qng < ADV_MIN_TAG_Q_PER_DVC) {
 791                         eeprom_config.max_tag_qng = ADV_MIN_TAG_Q_PER_DVC;
 792                 }
 793                 adv->max_openings = eeprom_config.max_total_qng;
 794                 adv->user_disc_enable = eeprom_config.disc_enable;
 795                 adv->user_cmd_qng_enabled = eeprom_config.use_cmd_qng;
 796                 adv->isa_dma_speed = EEPROM_DMA_SPEED(eeprom_config);
 797                 adv->scsi_id = EEPROM_SCSIID(eeprom_config) & ADV_MAX_TID;
 798                 EEPROM_SET_SCSIID(eeprom_config, adv->scsi_id);
 799                 adv->control = eeprom_config.cntl;
 800                 for (i = 0; i <= ADV_MAX_TID; i++) {
 801                         u_int8_t sync_data;
 802
 803                         if ((eeprom_config.init_sdtr & (0x1 << i)) == 0)
 804                                 sync_data = 0;
 805                         else
 806                                 sync_data = eeprom_config.sdtr_data[i];
 807                         adv_sdtr_to_period_offset(adv,
 808                                                   sync_data,
 809                                                   &adv->tinfo[i].user.period,
 810                                                   &adv->tinfo[i].user.offset,
 811                                                   i);
 812                 }
 813                 config_lsw = eeprom_config.cfg_lsw;
 814                 eeprom_config.cfg_msw = config_msw;
 815         } else {
 816                 u_int8_t sync_data;
 817
 818                 device_printf(adv->dev, "Warning EEPROM Checksum mismatch. "
 819                        "Using default device parameters\n");
 820
 821                 /* Set reasonable defaults since we can't read the EEPROM */
 822                 adv->isa_dma_speed = /*ADV_DEF_ISA_DMA_SPEED*/1;
 823                 adv->max_openings = ADV_DEF_MAX_TOTAL_QNG;
 824                 adv->disc_enable = TARGET_BIT_VECTOR_SET;
 825                 adv->user_disc_enable = TARGET_BIT_VECTOR_SET;
 826                 adv->cmd_qng_enabled = TARGET_BIT_VECTOR_SET;
 827                 adv->user_cmd_qng_enabled = TARGET_BIT_VECTOR_SET;
 828                 adv->scsi_id = 7;
 829                 adv->control = 0xFFFF;
 830
 831                 if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050)
 832                         /* Default to no Ultra to support the 3030 */
 833                         adv->control &= ~ADV_CNTL_SDTR_ENABLE_ULTRA;
 834                 sync_data = ADV_DEF_SDTR_OFFSET | (ADV_DEF_SDTR_INDEX << 4);
 835                 for (i = 0; i <= ADV_MAX_TID; i++) {
 836                         adv_sdtr_to_period_offset(adv, sync_data,
 837                                                   &adv->tinfo[i].user.period,
 838                                                   &adv->tinfo[i].user.offset,
 839                                                   i);
 840                 }
 841                 config_lsw |= ADV_CFG_LSW_SCSI_PARITY_ON;
 842         }
 843         config_msw &= ~ADV_CFG_MSW_CLR_MASK;
 844         config_lsw |= ADV_CFG_LSW_HOST_INT_ON;
 845         if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)
 846          && (adv->control & ADV_CNTL_SDTR_ENABLE_ULTRA) == 0)
 847                 /* 25ns or 10MHz */
 848                 max_sync = 25;
 849         else
 850                 /* Unlimited */
 851                 max_sync = 0;
 852         for (i = 0; i <= ADV_MAX_TID; i++) {
 853                 if (adv->tinfo[i].user.period < max_sync)
 854                         adv->tinfo[i].user.period = max_sync;
 855         }
 856
 857         if (adv_test_external_lram(adv) == 0) {
 858                 if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)) {
 859                         eeprom_config.max_total_qng =
 860                             ADV_MAX_PCI_ULTRA_INRAM_TOTAL_QNG;
 861                         eeprom_config.max_tag_qng =
 862                             ADV_MAX_PCI_ULTRA_INRAM_TAG_QNG;
 863                 } else {
 864                         eeprom_config.cfg_msw |= 0x0800;
 865                         config_msw |= 0x0800;
 866                         eeprom_config.max_total_qng =
 867                              ADV_MAX_PCI_INRAM_TOTAL_QNG;
 868                         eeprom_config.max_tag_qng = ADV_MAX_INRAM_TAG_QNG;
 869                 }
 870                 adv->max_openings = eeprom_config.max_total_qng;
 871         }
 872         ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
 873         ADV_OUTW(adv, ADV_CONFIG_LSW, config_lsw);
 874 #if 0
 875         /*
 876          * Don't write the eeprom data back for now.
 877          * I'd rather not mess up the user's card.  We also don't
 878          * fully sanitize the eeprom settings above for the write-back
 879          * to be 100% correct.
 880          */
 881         if (adv_set_eeprom_config(adv, &eeprom_config) != 0)
 882                 device_printf(adv->dev,
 883                     "WARNING! Failure writing to EEPROM.\n");
 884 #endif
 885
 886         adv_set_chip_scsiid(adv, adv->scsi_id);
 887         if (adv_init_lram_and_mcode(adv)) {
 888                 mtx_unlock(&adv->lock);
 889                 return (1);
 890         }
 891
 892         adv->disc_enable = adv->user_disc_enable;
 893
 894         adv_write_lram_8(adv, ADVV_DISC_ENABLE_B, adv->disc_enable);
 895         for (i = 0; i <= ADV_MAX_TID; i++) {
 896                 /*
 897                  * Start off in async mode.
 898                  */
 899                 adv_set_syncrate(adv, /*struct cam_path */NULL,
 900                                  i, /*period*/0, /*offset*/0,
 901                                  ADV_TRANS_CUR);
 902                 /*
 903                  * Enable the use of tagged commands on all targets.
 904                  * This allows the kernel driver to make up it's own mind
 905                  * as it sees fit to tag queue instead of having the
 906                  * firmware try and second guess the tag_code settins.
 907                  */
 908                 adv_write_lram_8(adv, ADVV_MAX_DVC_QNG_BEG + i,
 909                                  adv->max_openings);
 910         }
 911         adv_write_lram_8(adv, ADVV_USE_TAGGED_QNG_B, TARGET_BIT_VECTOR_SET);
 912         adv_write_lram_8(adv, ADVV_CAN_TAGGED_QNG_B, TARGET_BIT_VECTOR_SET);
 913         device_printf(adv->dev,
 914             "AdvanSys %s Host Adapter, SCSI ID %d, queue depth %d\n",
 915             (adv->type & ADV_ULTRA) && (max_sync == 0)
 916             ? "Ultra SCSI" : "SCSI",
 917             adv->scsi_id, adv->max_openings);
 918         mtx_unlock(&adv->lock);
 919         return (0);
 920 }
 921
 922 void
 923 adv_intr(void *arg)
 924 {
 925         struct    adv_softc *adv;
 926
 927         adv = arg;
 928         mtx_lock(&adv->lock);
 929         adv_intr_locked(adv);
 930         mtx_unlock(&adv->lock);
 931 }
 932
 933 void
 934 adv_intr_locked(struct adv_softc *adv)
 935 {
 936         u_int16_t chipstat;
 937         u_int16_t saved_ram_addr;
 938         u_int8_t  ctrl_reg;
 939         u_int8_t  saved_ctrl_reg;
 940         u_int8_t  host_flag;
 941
 942         if (!dumping)
 943                 mtx_assert(&adv->lock, MA_OWNED);
 944         chipstat = ADV_INW(adv, ADV_CHIP_STATUS);
 945
 946         /* Is it for us? */
 947         if ((chipstat & (ADV_CSW_INT_PENDING|ADV_CSW_SCSI_RESET_LATCH)) == 0)
 948                 return;
 949
 950         ctrl_reg = ADV_INB(adv, ADV_CHIP_CTRL);
 951         saved_ctrl_reg = ctrl_reg & (~(ADV_CC_SCSI_RESET | ADV_CC_CHIP_RESET |
 952                                        ADV_CC_SINGLE_STEP | ADV_CC_DIAG |
 953                                        ADV_CC_TEST));
 954
 955         if ((chipstat & (ADV_CSW_SCSI_RESET_LATCH|ADV_CSW_SCSI_RESET_ACTIVE))) {
 956                 device_printf(adv->dev, "Detected Bus Reset\n");
 957                 adv_reset_bus(adv, /*initiate_reset*/FALSE);
 958                 return;
 959         }
 960
 961         if ((chipstat & ADV_CSW_INT_PENDING) != 0) {
 962
 963                 saved_ram_addr = ADV_INW(adv, ADV_LRAM_ADDR);
 964                 host_flag = adv_read_lram_8(adv, ADVV_HOST_FLAG_B);
 965                 adv_write_lram_8(adv, ADVV_HOST_FLAG_B,
 966                                  host_flag | ADV_HOST_FLAG_IN_ISR);
 967
 968                 adv_ack_interrupt(adv);
 969
 970                 if ((chipstat & ADV_CSW_HALTED) != 0
 971                  && (ctrl_reg & ADV_CC_SINGLE_STEP) != 0) {
 972                         adv_isr_chip_halted(adv);
 973                         saved_ctrl_reg &= ~ADV_CC_HALT;
 974                 } else {
 975                         adv_run_doneq(adv);
 976                 }
 977                 ADV_OUTW(adv, ADV_LRAM_ADDR, saved_ram_addr);
 978 #ifdef DIAGNOSTIC
 979                 if (ADV_INW(adv, ADV_LRAM_ADDR) != saved_ram_addr)
 980                         panic("adv_intr: Unable to set LRAM addr");
 981 #endif
 982                 adv_write_lram_8(adv, ADVV_HOST_FLAG_B, host_flag);
 983         }
 984
 985         ADV_OUTB(adv, ADV_CHIP_CTRL, saved_ctrl_reg);
 986 }
 987
 988 static void
 989 adv_run_doneq(struct adv_softc *adv)
 990 {
 991         struct adv_q_done_info scsiq;
 992         u_int             doneq_head;
 993         u_int             done_qno;
 994
 995         doneq_head = adv_read_lram_16(adv, ADVV_DONE_Q_TAIL_W) & 0xFF;
 996         done_qno = adv_read_lram_8(adv, ADV_QNO_TO_QADDR(doneq_head)
 997                                    + ADV_SCSIQ_B_FWD);
 998         while (done_qno != ADV_QLINK_END) {
 999                 union ccb* ccb;
1000                 struct adv_ccb_info *cinfo;
1001                 u_int done_qaddr;
1002                 u_int sg_queue_cnt;
1003
1004                 done_qaddr = ADV_QNO_TO_QADDR(done_qno);
1005
1006                 /* Pull status from this request */
1007                 sg_queue_cnt = adv_copy_lram_doneq(adv, done_qaddr, &scsiq,
1008                                                    adv->max_dma_count);
1009
1010                 /* Mark it as free */
1011                 adv_write_lram_8(adv, done_qaddr + ADV_SCSIQ_B_STATUS,
1012                                  scsiq.q_status & ~(QS_READY|QS_ABORTED));
1013
1014                 /* Process request based on retrieved info */
1015                 if ((scsiq.cntl & QC_SG_HEAD) != 0) {
1016                         u_int i;
1017
1018                         /*
1019                          * S/G based request.  Free all of the queue
1020                          * structures that contained S/G information.
1021                          */
1022                         for (i = 0; i < sg_queue_cnt; i++) {
1023                                 done_qno = adv_read_lram_8(adv, done_qaddr
1024                                                            + ADV_SCSIQ_B_FWD);
1025
1026 #ifdef DIAGNOSTIC
1027                                 if (done_qno == ADV_QLINK_END) {
1028                                         panic("adv_qdone: Corrupted SG "
1029                                               "list encountered");
1030                                 }
1031 #endif
1032                                 done_qaddr = ADV_QNO_TO_QADDR(done_qno);
1033
1034                                 /* Mark SG queue as free */
1035                                 adv_write_lram_8(adv, done_qaddr
1036                                                  + ADV_SCSIQ_B_STATUS, QS_FREE);
1037                         }
1038                 } else
1039                         sg_queue_cnt = 0;
1040 #ifdef DIAGNOSTIC
1041                 if (adv->cur_active < (sg_queue_cnt + 1))
1042                         panic("adv_qdone: Attempting to free more "
1043                               "queues than are active");
1044 #endif
1045                 adv->cur_active -= sg_queue_cnt + 1;
1046
1047                 if ((scsiq.q_status != QS_DONE)
1048                  && (scsiq.q_status & QS_ABORTED) == 0)
1049                         panic("adv_qdone: completed scsiq with unknown status");
1050
1051                 scsiq.remain_bytes += scsiq.extra_bytes;
1052
1053                 if ((scsiq.d3.done_stat == QD_WITH_ERROR) &&
1054                     (scsiq.d3.host_stat == QHSTA_M_DATA_OVER_RUN)) {
1055                         if ((scsiq.cntl & (QC_DATA_IN|QC_DATA_OUT)) == 0) {
1056                                 scsiq.d3.done_stat = QD_NO_ERROR;
1057                                 scsiq.d3.host_stat = QHSTA_NO_ERROR;
1058                         }
1059                 }
1060
1061                 cinfo = &adv->ccb_infos[scsiq.d2.ccb_index];
1062                 ccb = cinfo->ccb;
1063                 ccb->csio.resid = scsiq.remain_bytes;
1064                 adv_done(adv, ccb,
1065                          scsiq.d3.done_stat, scsiq.d3.host_stat,
1066                          scsiq.d3.scsi_stat, scsiq.q_no);
1067
1068                 doneq_head = done_qno;
1069                 done_qno = adv_read_lram_8(adv, done_qaddr + ADV_SCSIQ_B_FWD);
1070         }
1071         adv_write_lram_16(adv, ADVV_DONE_Q_TAIL_W, doneq_head);
1072 }
1073
1074
1075 void
1076 adv_done(struct adv_softc *adv, union ccb *ccb, u_int done_stat,
1077          u_int host_stat, u_int scsi_status, u_int q_no)
1078 {
1079         struct     adv_ccb_info *cinfo;
1080
1081         if (!dumping)
1082                 mtx_assert(&adv->lock, MA_OWNED);
1083         cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
1084         LIST_REMOVE(&ccb->ccb_h, sim_links.le);
1085         callout_stop(&cinfo->timer);
1086         if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1087                 bus_dmasync_op_t op;
1088
1089                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1090                         op = BUS_DMASYNC_POSTREAD;
1091                 else
1092                         op = BUS_DMASYNC_POSTWRITE;
1093                 bus_dmamap_sync(adv->buffer_dmat, cinfo->dmamap, op);
1094                 bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
1095         }
1096
1097         switch (done_stat) {
1098         case QD_NO_ERROR:
1099                 if (host_stat == QHSTA_NO_ERROR) {
1100                         ccb->ccb_h.status = CAM_REQ_CMP;
1101                         break;
1102                 }
1103                 xpt_print_path(ccb->ccb_h.path);
1104                 printf("adv_done - queue done without error, "
1105                        "but host status non-zero(%x)\n", host_stat);
1106                 /*FALLTHROUGH*/
1107         case QD_WITH_ERROR:
1108                 switch (host_stat) {
1109                 case QHSTA_M_TARGET_STATUS_BUSY:
1110                 case QHSTA_M_BAD_QUEUE_FULL_OR_BUSY:
1111                         /*
1112                          * Assume that if we were a tagged transaction
1113                          * the target reported queue full.  Otherwise,
1114                          * report busy.  The firmware really should just
1115                          * pass the original status back up to us even
1116                          * if it thinks the target was in error for
1117                          * returning this status as no other transactions
1118                          * from this initiator are in effect, but this
1119                          * ignores multi-initiator setups and there is
1120                          * evidence that the firmware gets its per-device
1121                          * transaction counts screwed up occasionally.
1122                          */
1123                         ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1124                         if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
1125                          && host_stat != QHSTA_M_TARGET_STATUS_BUSY)
1126                                 scsi_status = SCSI_STATUS_QUEUE_FULL;
1127                         else
1128                                 scsi_status = SCSI_STATUS_BUSY;
1129                         adv_abort_ccb(adv, ccb->ccb_h.target_id,
1130                                       ccb->ccb_h.target_lun,
1131                                       /*ccb*/NULL, CAM_REQUEUE_REQ,
1132                                       /*queued_only*/TRUE);
1133                         /*FALLTHROUGH*/
1134                 case QHSTA_M_NO_AUTO_REQ_SENSE:
1135                 case QHSTA_NO_ERROR:
1136                         ccb->csio.scsi_status = scsi_status;
1137                         switch (scsi_status) {
1138                         case SCSI_STATUS_CHECK_COND:
1139                         case SCSI_STATUS_CMD_TERMINATED:
1140                                 ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
1141                                 /* Structure copy */
1142                                 ccb->csio.sense_data =
1143                                     adv->sense_buffers[q_no - 1];
1144                                 /* FALLTHROUGH */
1145                         case SCSI_STATUS_BUSY:
1146                         case SCSI_STATUS_RESERV_CONFLICT:
1147                         case SCSI_STATUS_QUEUE_FULL:
1148                         case SCSI_STATUS_COND_MET:
1149                         case SCSI_STATUS_INTERMED:
1150                         case SCSI_STATUS_INTERMED_COND_MET:
1151                                 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1152                                 break;
1153                         case SCSI_STATUS_OK:
1154                                 ccb->ccb_h.status |= CAM_REQ_CMP;
1155                                 break;
1156                         }
1157                         break;
1158                 case QHSTA_M_SEL_TIMEOUT:
1159                         ccb->ccb_h.status = CAM_SEL_TIMEOUT;
1160                         break;
1161                 case QHSTA_M_DATA_OVER_RUN:
1162                         ccb->ccb_h.status = CAM_DATA_RUN_ERR;
1163                         break;
1164                 case QHSTA_M_UNEXPECTED_BUS_FREE:
1165                         ccb->ccb_h.status = CAM_UNEXP_BUSFREE;
1166                         break;
1167                 case QHSTA_M_BAD_BUS_PHASE_SEQ:
1168                         ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
1169                         break;
1170                 case QHSTA_M_BAD_CMPL_STATUS_IN:
1171                         /* No command complete after a status message */
1172                         ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
1173                         break;
1174                 case QHSTA_D_EXE_SCSI_Q_BUSY_TIMEOUT:
1175                 case QHSTA_M_WTM_TIMEOUT:
1176                 case QHSTA_M_HUNG_REQ_SCSI_BUS_RESET:
1177                         /* The SCSI bus hung in a phase */
1178                         ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
1179                         adv_reset_bus(adv, /*initiate_reset*/TRUE);
1180                         break;
1181                 case QHSTA_M_AUTO_REQ_SENSE_FAIL:
1182                         ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
1183                         break;
1184                 case QHSTA_D_QDONE_SG_LIST_CORRUPTED:
1185                 case QHSTA_D_ASC_DVC_ERROR_CODE_SET:
1186                 case QHSTA_D_HOST_ABORT_FAILED:
1187                 case QHSTA_D_EXE_SCSI_Q_FAILED:
1188                 case QHSTA_D_ASPI_NO_BUF_POOL:
1189                 case QHSTA_M_BAD_TAG_CODE:
1190                 case QHSTA_D_LRAM_CMP_ERROR:
1191                 case QHSTA_M_MICRO_CODE_ERROR_HALT:
1192                 default:
1193                         panic("%s: Unhandled Host status error %x",
1194                             device_get_nameunit(adv->dev), host_stat);
1195                         /* NOTREACHED */
1196                 }
1197                 break;
1198
1199         case QD_ABORTED_BY_HOST:
1200                 /* Don't clobber any, more explicit, error codes we've set */
1201                 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG)
1202                         ccb->ccb_h.status = CAM_REQ_ABORTED;
1203                 break;
1204
1205         default:
1206                 xpt_print_path(ccb->ccb_h.path);
1207                 printf("adv_done - queue done with unknown status %x:%x\n",
1208                        done_stat, host_stat);
1209                 ccb->ccb_h.status = CAM_REQ_CMP_ERR;
1210                 break;
1211         }
1212         adv_clear_state(adv, ccb);
1213         if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP
1214          && (ccb->ccb_h.status & CAM_DEV_QFRZN) == 0) {
1215                 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1216                 ccb->ccb_h.status |= CAM_DEV_QFRZN;
1217         }
1218         adv_free_ccb_info(adv, cinfo);
1219         /*
1220          * Null this out so that we catch driver bugs that cause a
1221          * ccb to be completed twice.
1222          */
1223         ccb->ccb_h.ccb_cinfo_ptr = NULL;
1224         ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1225         xpt_done(ccb);
1226 }
1227
1228 /*
1229  * Function to poll for command completion when
1230  * interrupts are disabled (crash dumps)
1231  */
1232 static void
1233 adv_poll(struct cam_sim *sim)
1234 {
1235
1236         adv_intr_locked(cam_sim_softc(sim));
1237 }
1238
1239 /*
1240  * Attach all the sub-devices we can find
1241  */
1242 int
1243 adv_attach(adv)
1244         struct adv_softc *adv;
1245 {
1246         struct ccb_setasync csa;
1247         struct cam_devq *devq;
1248         int max_sg;
1249
1250         /*
1251          * Allocate an array of ccb mapping structures.  We put the
1252          * index of the ccb_info structure into the queue representing
1253          * a transaction and use it for mapping the queue to the
1254          * upper level SCSI transaction it represents.
1255          */
1256         adv->ccb_infos = malloc(sizeof(*adv->ccb_infos) * adv->max_openings,
1257                                 M_DEVBUF, M_NOWAIT);
1258
1259         if (adv->ccb_infos == NULL)
1260                 return (ENOMEM);
1261
1262         adv->init_level++;
1263
1264         /*
1265          * Create our DMA tags.  These tags define the kinds of device
1266          * accessible memory allocations and memory mappings we will
1267          * need to perform during normal operation.
1268          *
1269          * Unless we need to further restrict the allocation, we rely
1270          * on the restrictions of the parent dmat, hence the common
1271          * use of MAXADDR and MAXSIZE.
1272          *
1273          * The ASC boards use chains of "queues" (the transactional
1274          * resources on the board) to represent long S/G lists.
1275          * The first queue represents the command and holds a
1276          * single address and data pair.  The queues that follow
1277          * can each hold ADV_SG_LIST_PER_Q entries.  Given the
1278          * total number of queues, we can express the largest
1279          * transaction we can map.  We reserve a few queues for
1280          * error recovery.  Take those into account as well.
1281          *
1282          * There is a way to take an interrupt to download the
1283          * next batch of S/G entries if there are more than 255
1284          * of them (the counter in the queue structure is a u_int8_t).
1285          * We don't use this feature, so limit the S/G list size
1286          * accordingly.
1287          */
1288         max_sg = (adv->max_openings - ADV_MIN_FREE_Q - 1) * ADV_SG_LIST_PER_Q;
1289         if (max_sg > 255)
1290                 max_sg = 255;
1291
1292         /* DMA tag for mapping buffers into device visible space. */
1293         if (bus_dma_tag_create(
1294                         /* parent       */ adv->parent_dmat,
1295                         /* alignment    */ 1,
1296                         /* boundary     */ 0,
1297                         /* lowaddr      */ BUS_SPACE_MAXADDR,
1298                         /* highaddr     */ BUS_SPACE_MAXADDR,
1299                         /* filter       */ NULL,
1300                         /* filterarg    */ NULL,
1301                         /* maxsize      */ ADV_MAXPHYS,
1302                         /* nsegments    */ max_sg,
1303                         /* maxsegsz     */ BUS_SPACE_MAXSIZE_32BIT,
1304                         /* flags        */ BUS_DMA_ALLOCNOW,
1305                         /* lockfunc     */ busdma_lock_mutex,
1306                         /* lockarg      */ &adv->lock,
1307                         &adv->buffer_dmat) != 0) {
1308                 return (ENXIO);
1309         }
1310         adv->init_level++;
1311
1312         /* DMA tag for our sense buffers */
1313         if (bus_dma_tag_create(
1314                         /* parent       */ adv->parent_dmat,
1315                         /* alignment    */ 1,
1316                         /* boundary     */ 0,
1317                         /* lowaddr      */ BUS_SPACE_MAXADDR,
1318                         /* highaddr     */ BUS_SPACE_MAXADDR,
1319                         /* filter       */ NULL,
1320                         /* filterarg    */ NULL,
1321                         /* maxsize      */ sizeof(struct scsi_sense_data) *
1322                                            adv->max_openings,
1323                         /* nsegments    */ 1,
1324                         /* maxsegsz     */ BUS_SPACE_MAXSIZE_32BIT,
1325                         /* flags        */ 0,
1326                         /* lockfunc     */ busdma_lock_mutex,
1327                         /* lockarg      */ &adv->lock,
1328                         &adv->sense_dmat) != 0) {
1329                 return (ENXIO);
1330         }
1331
1332         adv->init_level++;
1333
1334         /* Allocation for our sense buffers */
1335         if (bus_dmamem_alloc(adv->sense_dmat, (void **)&adv->sense_buffers,
1336                              BUS_DMA_NOWAIT, &adv->sense_dmamap) != 0) {
1337                 return (ENOMEM);
1338         }
1339
1340         adv->init_level++;
1341
1342         /* And permanently map them */
1343         bus_dmamap_load(adv->sense_dmat, adv->sense_dmamap,
1344                         adv->sense_buffers,
1345                         sizeof(struct scsi_sense_data)*adv->max_openings,
1346                         adv_map, &adv->sense_physbase, /*flags*/0);
1347
1348         adv->init_level++;
1349
1350         /*
1351          * Fire up the chip
1352          */
1353         if (adv_start_chip(adv) != 1) {
1354                 device_printf(adv->dev,
1355                     "Unable to start on board processor. Aborting.\n");
1356                 return (ENXIO);
1357         }
1358
1359         /*
1360          * Create the device queue for our SIM.
1361          */
1362         devq = cam_simq_alloc(adv->max_openings);
1363         if (devq == NULL)
1364                 return (ENOMEM);
1365
1366         /*
1367          * Construct our SIM entry.
1368          */
1369         adv->sim = cam_sim_alloc(adv_action, adv_poll, "adv", adv,
1370             device_get_unit(adv->dev), &adv->lock, 1, adv->max_openings, devq);
1371         if (adv->sim == NULL)
1372                 return (ENOMEM);
1373
1374         /*
1375          * Register the bus.
1376          */
1377         mtx_lock(&adv->lock);
1378         if (xpt_bus_register(adv->sim, adv->dev, 0) != CAM_SUCCESS) {
1379                 cam_sim_free(adv->sim, /*free devq*/TRUE);
1380                 mtx_unlock(&adv->lock);
1381                 return (ENXIO);
1382         }
1383
1384         if (xpt_create_path(&adv->path, /*periph*/NULL, cam_sim_path(adv->sim),
1385                             CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD)
1386             != CAM_REQ_CMP) {
1387                 xpt_bus_deregister(cam_sim_path(adv->sim));
1388                 cam_sim_free(adv->sim, /*free devq*/TRUE);
1389                 mtx_unlock(&adv->lock);
1390                 return (ENXIO);
1391         }
1392
1393         xpt_setup_ccb(&csa.ccb_h, adv->path, /*priority*/5);
1394         csa.ccb_h.func_code = XPT_SASYNC_CB;
1395         csa.event_enable = AC_FOUND_DEVICE|AC_LOST_DEVICE;
1396         csa.callback = advasync;
1397         csa.callback_arg = adv;
1398         xpt_action((union ccb *)&csa);
1399         mtx_unlock(&adv->lock);
1400         return (0);
1401 }
1402 MODULE_DEPEND(adv, cam, 1, 1, 1);