sys/dev/advansys/advansys.c

   1 /*-
   2  * Generic driver for the Advanced Systems Inc. SCSI controllers
   3  * Product specific probe and attach routines can be found in:
   4  *
   5  * i386/isa/adv_isa.c   ABP5140, ABP542, ABP5150, ABP842, ABP852
   6  * pci/adv_pci.c        ABP920, ABP930, ABP930U, ABP930UA, ABP940, ABP940U,
   7  *                      ABP940UA, ABP950, ABP960, ABP960U, ABP960UA,
   8  *                      ABP970, ABP970U
   9  *
  10  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
  11  *
  12  * Copyright (c) 1996-2000 Justin Gibbs.
  13  * All rights reserved.
  14  *
  15  * Redistribution and use in source and binary forms, with or without
  16  * modification, are permitted provided that the following conditions
  17  * are met:
  18  * 1. Redistributions of source code must retain the above copyright
  19  *    notice, this list of conditions, and the following disclaimer,
  20  *    without modification, immediately at the beginning of the file.
  21  * 2. The name of the author may not be used to endorse or promote products
  22  *    derived from this software without specific prior written permission.
  23  *
  24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  27  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  28  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  34  * SUCH DAMAGE.
  35  */
  36 /*-
  37  * Ported from:
  38  * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
  39  *
  40  * Copyright (c) 1995-1997 Advanced System Products, Inc.
  41  * All Rights Reserved.
  42  *
  43  * Redistribution and use in source and binary forms, with or without
  44  * modification, are permitted provided that redistributions of source
  45  * code retain the above copyright notice and this comment without
  46  * modification.
  47  */
  48
  49 #include <sys/cdefs.h>
  50 __FBSDID("$FreeBSD$");
  51
  52 #include <sys/param.h>
  53 #include <sys/conf.h>
  54 #include <sys/systm.h>
  55 #include <sys/malloc.h>
  56 #include <sys/kernel.h>
  57 #include <sys/lock.h>
  58 #include <sys/module.h>
  59 #include <sys/mutex.h>
  60
  61 #include <machine/bus.h>
  62 #include <machine/resource.h>
  63 #include <sys/bus.h>
  64 #include <sys/rman.h>
  65
  66 #include <cam/cam.h>
  67 #include <cam/cam_ccb.h>
  68 #include <cam/cam_sim.h>
  69 #include <cam/cam_xpt_sim.h>
  70 #include <cam/cam_debug.h>
  71
  72 #include <cam/scsi/scsi_all.h>
  73 #include <cam/scsi/scsi_message.h>
  74
  75 #include <vm/vm.h>
  76 #include <vm/vm_param.h>
  77 #include <vm/pmap.h>
  78
  79 #include <dev/advansys/advansys.h>
  80
  81 static void     adv_action(struct cam_sim *sim, union ccb *ccb);
  82 static void     adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
  83                                 int nsegments, int error);
  84 static void     adv_intr_locked(struct adv_softc *adv);
  85 static void     adv_poll(struct cam_sim *sim);
  86 static void     adv_run_doneq(struct adv_softc *adv);
  87 static struct adv_ccb_info *
  88                 adv_alloc_ccb_info(struct adv_softc *adv);
  89 static void     adv_destroy_ccb_info(struct adv_softc *adv,
  90                                      struct adv_ccb_info *cinfo);
  91 static __inline struct adv_ccb_info *
  92                 adv_get_ccb_info(struct adv_softc *adv);
  93 static __inline void adv_free_ccb_info(struct adv_softc *adv,
  94                                        struct adv_ccb_info *cinfo);
  95 static __inline void adv_set_state(struct adv_softc *adv, adv_state state);
  96 static __inline void adv_clear_state(struct adv_softc *adv, union ccb* ccb);
  97 static void adv_clear_state_really(struct adv_softc *adv, union ccb* ccb);
  98
  99 static __inline struct adv_ccb_info *
 100 adv_get_ccb_info(struct adv_softc *adv)
 101 {
 102         struct adv_ccb_info *cinfo;
 103
 104         if (!dumping)
 105                 mtx_assert(&adv->lock, MA_OWNED);
 106         if ((cinfo = SLIST_FIRST(&adv->free_ccb_infos)) != NULL) {
 107                 SLIST_REMOVE_HEAD(&adv->free_ccb_infos, links);
 108         } else {
 109                 cinfo = adv_alloc_ccb_info(adv);
 110         }
 111
 112         return (cinfo);
 113 }
 114
 115 static __inline void
 116 adv_free_ccb_info(struct adv_softc *adv, struct adv_ccb_info *cinfo)
 117 {
 118
 119         if (!dumping)
 120                 mtx_assert(&adv->lock, MA_OWNED);
 121         cinfo->state = ACCB_FREE;
 122         SLIST_INSERT_HEAD(&adv->free_ccb_infos, cinfo, links);
 123 }
 124
 125 static __inline void
 126 adv_set_state(struct adv_softc *adv, adv_state state)
 127 {
 128         if (adv->state == 0)
 129                 xpt_freeze_simq(adv->sim, /*count*/1);
 130         adv->state |= state;
 131 }
 132
 133 static __inline void
 134 adv_clear_state(struct adv_softc *adv, union ccb* ccb)
 135 {
 136         if (adv->state != 0)
 137                 adv_clear_state_really(adv, ccb);
 138 }
 139
 140 static void
 141 adv_clear_state_really(struct adv_softc *adv, union ccb* ccb)
 142 {
 143
 144         if (!dumping)
 145                 mtx_assert(&adv->lock, MA_OWNED);
 146         if ((adv->state & ADV_BUSDMA_BLOCK_CLEARED) != 0)
 147                 adv->state &= ~(ADV_BUSDMA_BLOCK_CLEARED|ADV_BUSDMA_BLOCK);
 148         if ((adv->state & ADV_RESOURCE_SHORTAGE) != 0) {
 149                 int openings;
 150
 151                 openings = adv->max_openings - adv->cur_active - ADV_MIN_FREE_Q;
 152                 if (openings >= adv->openings_needed) {
 153                         adv->state &= ~ADV_RESOURCE_SHORTAGE;
 154                         adv->openings_needed = 0;
 155                 }
 156         }
 157
 158         if ((adv->state & ADV_IN_TIMEOUT) != 0) {
 159                 struct adv_ccb_info *cinfo;
 160
 161                 cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
 162                 if ((cinfo->state & ACCB_RECOVERY_CCB) != 0) {
 163                         struct ccb_hdr *ccb_h;
 164
 165                         /*
 166                          * We now traverse our list of pending CCBs
 167                          * and reinstate their timeouts.
 168                          */
 169                         ccb_h = LIST_FIRST(&adv->pending_ccbs);
 170                         while (ccb_h != NULL) {
 171                                 cinfo = ccb_h->ccb_cinfo_ptr;
 172                                 callout_reset_sbt(&cinfo->timer,
 173                                     SBT_1MS * ccb_h->timeout, 0,
 174                                     adv_timeout, ccb_h, 0);
 175                                 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
 176                         }
 177                         adv->state &= ~ADV_IN_TIMEOUT;
 178                         device_printf(adv->dev, "No longer in timeout\n");
 179                 }
 180         }
 181         if (adv->state == 0)
 182                 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
 183 }
 184
 185 void
 186 adv_map(void *arg, bus_dma_segment_t *segs, int nseg, int error)
 187 {
 188         bus_addr_t* physaddr;
 189
 190         physaddr = (bus_addr_t*)arg;
 191         *physaddr = segs->ds_addr;
 192 }
 193
 194 static void
 195 adv_action(struct cam_sim *sim, union ccb *ccb)
 196 {
 197         struct adv_softc *adv;
 198
 199         CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("adv_action\n"));
 200
 201         adv = (struct adv_softc *)cam_sim_softc(sim);
 202         mtx_assert(&adv->lock, MA_OWNED);
 203
 204         switch (ccb->ccb_h.func_code) {
 205         /* Common cases first */
 206         case XPT_SCSI_IO:       /* Execute the requested I/O operation */
 207         {
 208                 struct  ccb_hdr *ccb_h;
 209                 struct  ccb_scsiio *csio;
 210                 struct  adv_ccb_info *cinfo;
 211                 int error;
 212
 213                 ccb_h = &ccb->ccb_h;
 214                 csio = &ccb->csio;
 215                 cinfo = adv_get_ccb_info(adv);
 216                 if (cinfo == NULL)
 217                         panic("XXX Handle CCB info error!!!");
 218
 219                 ccb_h->ccb_cinfo_ptr = cinfo;
 220                 cinfo->ccb = ccb;
 221
 222                 error = bus_dmamap_load_ccb(adv->buffer_dmat,
 223                                             cinfo->dmamap,
 224                                             ccb,
 225                                             adv_execute_ccb,
 226                                             csio, /*flags*/0);
 227                 if (error == EINPROGRESS) {
 228                         /*
 229                          * So as to maintain ordering, freeze the controller
 230                          * queue until our mapping is returned.
 231                          */
 232                         adv_set_state(adv, ADV_BUSDMA_BLOCK);
 233                 }
 234                 break;
 235         }
 236         case XPT_RESET_DEV:     /* Bus Device Reset the specified SCSI device */
 237         case XPT_ABORT:                 /* Abort the specified CCB */
 238                 /* XXX Implement */
 239                 ccb->ccb_h.status = CAM_REQ_INVALID;
 240                 xpt_done(ccb);
 241                 break;
 242 #define IS_CURRENT_SETTINGS(c)  (c->type == CTS_TYPE_CURRENT_SETTINGS)
 243 #define IS_USER_SETTINGS(c)     (c->type == CTS_TYPE_USER_SETTINGS)
 244         case XPT_SET_TRAN_SETTINGS:
 245         {
 246                 struct ccb_trans_settings_scsi *scsi;
 247                 struct ccb_trans_settings_spi *spi;
 248                 struct   ccb_trans_settings *cts;
 249                 target_bit_vector targ_mask;
 250                 struct adv_transinfo *tconf;
 251                 u_int    update_type;
 252
 253                 cts = &ccb->cts;
 254                 targ_mask = ADV_TID_TO_TARGET_MASK(cts->ccb_h.target_id);
 255                 update_type = 0;
 256
 257                 /*
 258                  * The user must specify which type of settings he wishes
 259                  * to change.
 260                  */
 261                 if (IS_CURRENT_SETTINGS(cts) && !IS_USER_SETTINGS(cts)) {
 262                         tconf = &adv->tinfo[cts->ccb_h.target_id].current;
 263                         update_type |= ADV_TRANS_GOAL;
 264                 } else if (IS_USER_SETTINGS(cts) && !IS_CURRENT_SETTINGS(cts)) {
 265                         tconf = &adv->tinfo[cts->ccb_h.target_id].user;
 266                         update_type |= ADV_TRANS_USER;
 267                 } else {
 268                         ccb->ccb_h.status = CAM_REQ_INVALID;
 269                         break;
 270                 }
 271
 272                 scsi = &cts->proto_specific.scsi;
 273                 spi = &cts->xport_specific.spi;
 274                 if ((update_type & ADV_TRANS_GOAL) != 0) {
 275                         if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
 276                                 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
 277                                         adv->disc_enable |= targ_mask;
 278                                 else
 279                                         adv->disc_enable &= ~targ_mask;
 280                                 adv_write_lram_8(adv, ADVV_DISC_ENABLE_B,
 281                                                  adv->disc_enable);
 282                         }
 283
 284                         if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
 285                                 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
 286                                         adv->cmd_qng_enabled |= targ_mask;
 287                                 else
 288                                         adv->cmd_qng_enabled &= ~targ_mask;
 289                         }
 290                 }
 291
 292                 if ((update_type & ADV_TRANS_USER) != 0) {
 293                         if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
 294                                 if ((spi->flags & CTS_SPI_VALID_DISC) != 0)
 295                                         adv->user_disc_enable |= targ_mask;
 296                                 else
 297                                         adv->user_disc_enable &= ~targ_mask;
 298                         }
 299
 300                         if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
 301                                 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
 302                                         adv->user_cmd_qng_enabled |= targ_mask;
 303                                 else
 304                                         adv->user_cmd_qng_enabled &= ~targ_mask;
 305                         }
 306                 }
 307
 308                 /*
 309                  * If the user specifies either the sync rate, or offset,
 310                  * but not both, the unspecified parameter defaults to its
 311                  * current value in transfer negotiations.
 312                  */
 313                 if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
 314                  || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) {
 315                         /*
 316                          * If the user provided a sync rate but no offset,
 317                          * use the current offset.
 318                          */
 319                         if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) == 0)
 320                                 spi->sync_offset = tconf->offset;
 321
 322                         /*
 323                          * If the user provided an offset but no sync rate,
 324                          * use the current sync rate.
 325                          */
 326                         if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) == 0)
 327                                 spi->sync_period = tconf->period;
 328
 329                         adv_period_offset_to_sdtr(adv, &spi->sync_period,
 330                                                   &spi->sync_offset,
 331                                                   cts->ccb_h.target_id);
 332
 333                         adv_set_syncrate(adv, /*struct cam_path */NULL,
 334                                          cts->ccb_h.target_id, spi->sync_period,
 335                                          spi->sync_offset, update_type);
 336                 }
 337
 338                 ccb->ccb_h.status = CAM_REQ_CMP;
 339                 xpt_done(ccb);
 340                 break;
 341         }
 342         case XPT_GET_TRAN_SETTINGS:
 343         /* Get default/user set transfer settings for the target */
 344         {
 345                 struct ccb_trans_settings_scsi *scsi;
 346                 struct ccb_trans_settings_spi *spi;
 347                 struct ccb_trans_settings *cts;
 348                 struct adv_transinfo *tconf;
 349                 target_bit_vector target_mask;
 350
 351                 cts = &ccb->cts;
 352                 target_mask = ADV_TID_TO_TARGET_MASK(cts->ccb_h.target_id);
 353
 354                 scsi = &cts->proto_specific.scsi;
 355                 spi = &cts->xport_specific.spi;
 356
 357                 cts->protocol = PROTO_SCSI;
 358                 cts->protocol_version = SCSI_REV_2;
 359                 cts->transport = XPORT_SPI;
 360                 cts->transport_version = 2;
 361
 362                 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
 363                 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
 364
 365                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
 366                         tconf = &adv->tinfo[cts->ccb_h.target_id].current;
 367                         if ((adv->disc_enable & target_mask) != 0)
 368                                 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
 369                         if ((adv->cmd_qng_enabled & target_mask) != 0)
 370                                 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
 371                 } else {
 372                         tconf = &adv->tinfo[cts->ccb_h.target_id].user;
 373                         if ((adv->user_disc_enable & target_mask) != 0)
 374                                 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
 375                         if ((adv->user_cmd_qng_enabled & target_mask) != 0)
 376                                 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
 377                 }
 378                 spi->sync_period = tconf->period;
 379                 spi->sync_offset = tconf->offset;
 380                 spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
 381                 spi->valid = CTS_SPI_VALID_SYNC_RATE
 382                            | CTS_SPI_VALID_SYNC_OFFSET
 383                            | CTS_SPI_VALID_BUS_WIDTH
 384                            | CTS_SPI_VALID_DISC;
 385                 scsi->valid = CTS_SCSI_VALID_TQ;
 386                 ccb->ccb_h.status = CAM_REQ_CMP;
 387                 xpt_done(ccb);
 388                 break;
 389         }
 390         case XPT_CALC_GEOMETRY:
 391         {
 392                 int       extended;
 393
 394                 extended = (adv->control & ADV_CNTL_BIOS_GT_1GB) != 0;
 395                 cam_calc_geometry(&ccb->ccg, extended);
 396                 xpt_done(ccb);
 397                 break;
 398         }
 399         case XPT_RESET_BUS:             /* Reset the specified SCSI bus */
 400         {
 401
 402                 adv_stop_execution(adv);
 403                 adv_reset_bus(adv, /*initiate_reset*/TRUE);
 404                 adv_start_execution(adv);
 405
 406                 ccb->ccb_h.status = CAM_REQ_CMP;
 407                 xpt_done(ccb);
 408                 break;
 409         }
 410         case XPT_TERM_IO:               /* Terminate the I/O process */
 411                 /* XXX Implement */
 412                 ccb->ccb_h.status = CAM_REQ_INVALID;
 413                 xpt_done(ccb);
 414                 break;
 415         case XPT_PATH_INQ:              /* Path routing inquiry */
 416         {
 417                 struct ccb_pathinq *cpi = &ccb->cpi;
 418
 419                 cpi->version_num = 1; /* XXX??? */
 420                 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
 421                 cpi->target_sprt = 0;
 422                 cpi->hba_misc = 0;
 423                 cpi->hba_eng_cnt = 0;
 424                 cpi->max_target = 7;
 425                 cpi->max_lun = 7;
 426                 cpi->initiator_id = adv->scsi_id;
 427                 cpi->bus_id = cam_sim_bus(sim);
 428                 cpi->base_transfer_speed = 3300;
 429                 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
 430                 strlcpy(cpi->hba_vid, "Advansys", HBA_IDLEN);
 431                 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
 432                 cpi->unit_number = cam_sim_unit(sim);
 433                 cpi->ccb_h.status = CAM_REQ_CMP;
 434                 cpi->transport = XPORT_SPI;
 435                 cpi->transport_version = 2;
 436                 cpi->protocol = PROTO_SCSI;
 437                 cpi->protocol_version = SCSI_REV_2;
 438                 xpt_done(ccb);
 439                 break;
 440         }
 441         default:
 442                 ccb->ccb_h.status = CAM_REQ_INVALID;
 443                 xpt_done(ccb);
 444                 break;
 445         }
 446 }
 447
 448 /*
 449  * Currently, the output of bus_dmammap_load suits our needs just
 450  * fine, but should it change, we'd need to do something here.
 451  */
 452 #define adv_fixup_dmasegs(adv, dm_segs) (struct adv_sg_entry *)(dm_segs)
 453
 454 static void
 455 adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
 456                 int nsegments, int error)
 457 {
 458         struct  ccb_scsiio *csio;
 459         struct  ccb_hdr *ccb_h;
 460         struct  cam_sim *sim;
 461         struct  adv_softc *adv;
 462         struct  adv_ccb_info *cinfo;
 463         struct  adv_scsi_q scsiq;
 464         struct  adv_sg_head sghead;
 465
 466         csio = (struct ccb_scsiio *)arg;
 467         ccb_h = &csio->ccb_h;
 468         sim = xpt_path_sim(ccb_h->path);
 469         adv = (struct adv_softc *)cam_sim_softc(sim);
 470         cinfo = (struct adv_ccb_info *)csio->ccb_h.ccb_cinfo_ptr;
 471         if (!dumping)
 472                 mtx_assert(&adv->lock, MA_OWNED);
 473
 474         /*
 475          * Setup our done routine to release the simq on
 476          * the next ccb that completes.
 477          */
 478         if ((adv->state & ADV_BUSDMA_BLOCK) != 0)
 479                 adv->state |= ADV_BUSDMA_BLOCK_CLEARED;
 480
 481         if ((ccb_h->flags & CAM_CDB_POINTER) != 0) {
 482                 if ((ccb_h->flags & CAM_CDB_PHYS) == 0) {
 483                         /* XXX Need phystovirt!!!! */
 484                         /* How about pmap_kenter??? */
 485                         scsiq.cdbptr = csio->cdb_io.cdb_ptr;
 486                 } else {
 487                         scsiq.cdbptr = csio->cdb_io.cdb_ptr;
 488                 }
 489         } else {
 490                 scsiq.cdbptr = csio->cdb_io.cdb_bytes;
 491         }
 492         /*
 493          * Build up the request
 494          */
 495         scsiq.q1.status = 0;
 496         scsiq.q1.q_no = 0;
 497         scsiq.q1.cntl = 0;
 498         scsiq.q1.sg_queue_cnt = 0;
 499         scsiq.q1.target_id = ADV_TID_TO_TARGET_MASK(ccb_h->target_id);
 500         scsiq.q1.target_lun = ccb_h->target_lun;
 501         scsiq.q1.sense_len = csio->sense_len;
 502         scsiq.q1.extra_bytes = 0;
 503         scsiq.q2.ccb_index = cinfo - adv->ccb_infos;
 504         scsiq.q2.target_ix = ADV_TIDLUN_TO_IX(ccb_h->target_id,
 505                                               ccb_h->target_lun);
 506         scsiq.q2.flag = 0;
 507         scsiq.q2.cdb_len = csio->cdb_len;
 508         if ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0)
 509                 scsiq.q2.tag_code = csio->tag_action;
 510         else
 511                 scsiq.q2.tag_code = 0;
 512         scsiq.q2.vm_id = 0;
 513
 514         if (nsegments != 0) {
 515                 bus_dmasync_op_t op;
 516
 517                 scsiq.q1.data_addr = dm_segs->ds_addr;
 518                 scsiq.q1.data_cnt = dm_segs->ds_len;
 519                 if (nsegments > 1) {
 520                         scsiq.q1.cntl |= QC_SG_HEAD;
 521                         sghead.entry_cnt
 522                             = sghead.entry_to_copy
 523                             = nsegments;
 524                         sghead.res = 0;
 525                         sghead.sg_list = adv_fixup_dmasegs(adv, dm_segs);
 526                         scsiq.sg_head = &sghead;
 527                 } else {
 528                         scsiq.sg_head = NULL;
 529                 }
 530                 if ((ccb_h->flags & CAM_DIR_MASK) == CAM_DIR_IN)
 531                         op = BUS_DMASYNC_PREREAD;
 532                 else
 533                         op = BUS_DMASYNC_PREWRITE;
 534                 bus_dmamap_sync(adv->buffer_dmat, cinfo->dmamap, op);
 535         } else {
 536                 scsiq.q1.data_addr = 0;
 537                 scsiq.q1.data_cnt = 0;
 538                 scsiq.sg_head = NULL;
 539         }
 540
 541         /*
 542          * Last time we need to check if this SCB needs to
 543          * be aborted.
 544          */
 545         if (ccb_h->status != CAM_REQ_INPROG) {
 546                 if (nsegments != 0)
 547                         bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
 548                 adv_clear_state(adv, (union ccb *)csio);
 549                 adv_free_ccb_info(adv, cinfo);
 550                 xpt_done((union ccb *)csio);
 551                 return;
 552         }
 553
 554         if (adv_execute_scsi_queue(adv, &scsiq, csio->dxfer_len) != 0) {
 555                 /* Temporary resource shortage */
 556                 adv_set_state(adv, ADV_RESOURCE_SHORTAGE);
 557                 if (nsegments != 0)
 558                         bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
 559                 csio->ccb_h.status = CAM_REQUEUE_REQ;
 560                 adv_clear_state(adv, (union ccb *)csio);
 561                 adv_free_ccb_info(adv, cinfo);
 562                 xpt_done((union ccb *)csio);
 563                 return;
 564         }
 565         cinfo->state |= ACCB_ACTIVE;
 566         ccb_h->status |= CAM_SIM_QUEUED;
 567         LIST_INSERT_HEAD(&adv->pending_ccbs, ccb_h, sim_links.le);
 568         /* Schedule our timeout */
 569         callout_reset_sbt(&cinfo->timer, SBT_1MS * ccb_h->timeout, 0,
 570             adv_timeout, csio, 0);
 571 }
 572
 573 static struct adv_ccb_info *
 574 adv_alloc_ccb_info(struct adv_softc *adv)
 575 {
 576         int error;
 577         struct adv_ccb_info *cinfo;
 578
 579         cinfo = &adv->ccb_infos[adv->ccb_infos_allocated];
 580         cinfo->state = ACCB_FREE;
 581         callout_init_mtx(&cinfo->timer, &adv->lock, 0);
 582         error = bus_dmamap_create(adv->buffer_dmat, /*flags*/0,
 583                                   &cinfo->dmamap);
 584         if (error != 0) {
 585                 device_printf(adv->dev, "Unable to allocate CCB info "
 586                     "dmamap - error %d\n", error);
 587                 return (NULL);
 588         }
 589         adv->ccb_infos_allocated++;
 590         return (cinfo);
 591 }
 592
 593 static void
 594 adv_destroy_ccb_info(struct adv_softc *adv, struct adv_ccb_info *cinfo)
 595 {
 596
 597         callout_drain(&cinfo->timer);
 598         bus_dmamap_destroy(adv->buffer_dmat, cinfo->dmamap);
 599 }
 600
 601 void
 602 adv_timeout(void *arg)
 603 {
 604         union ccb *ccb;
 605         struct adv_softc *adv;
 606         struct adv_ccb_info *cinfo, *cinfo2;
 607
 608         ccb = (union ccb *)arg;
 609         adv = (struct adv_softc *)xpt_path_sim(ccb->ccb_h.path)->softc;
 610         cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
 611         mtx_assert(&adv->lock, MA_OWNED);
 612
 613         xpt_print_path(ccb->ccb_h.path);
 614         printf("Timed out\n");
 615
 616         /* Have we been taken care of already?? */
 617         if (cinfo == NULL || cinfo->state == ACCB_FREE) {
 618                 return;
 619         }
 620
 621         adv_stop_execution(adv);
 622
 623         if ((cinfo->state & ACCB_ABORT_QUEUED) == 0) {
 624                 struct ccb_hdr *ccb_h;
 625
 626                 /*
 627                  * In order to simplify the recovery process, we ask the XPT
 628                  * layer to halt the queue of new transactions and we traverse
 629                  * the list of pending CCBs and remove their timeouts. This
 630                  * means that the driver attempts to clear only one error
 631                  * condition at a time.  In general, timeouts that occur
 632                  * close together are related anyway, so there is no benefit
 633                  * in attempting to handle errors in parallel.  Timeouts will
 634                  * be reinstated when the recovery process ends.
 635                  */
 636                 adv_set_state(adv, ADV_IN_TIMEOUT);
 637
 638                 /* This CCB is the CCB representing our recovery actions */
 639                 cinfo->state |= ACCB_RECOVERY_CCB|ACCB_ABORT_QUEUED;
 640
 641                 ccb_h = LIST_FIRST(&adv->pending_ccbs);
 642                 while (ccb_h != NULL) {
 643                         cinfo2 = ccb_h->ccb_cinfo_ptr;
 644                         callout_stop(&cinfo2->timer);
 645                         ccb_h = LIST_NEXT(ccb_h, sim_links.le);
 646                 }
 647
 648                 /* XXX Should send a BDR */
 649                 /* Attempt an abort as our first tact */
 650                 xpt_print_path(ccb->ccb_h.path);
 651                 printf("Attempting abort\n");
 652                 adv_abort_ccb(adv, ccb->ccb_h.target_id,
 653                               ccb->ccb_h.target_lun, ccb,
 654                               CAM_CMD_TIMEOUT, /*queued_only*/FALSE);
 655                 callout_reset(&cinfo->timer, 2 * hz, adv_timeout, ccb);
 656         } else {
 657                 /* Our attempt to perform an abort failed, go for a reset */
 658                 xpt_print_path(ccb->ccb_h.path);
 659                 printf("Resetting bus\n");
 660                 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
 661                 ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
 662                 adv_reset_bus(adv, /*initiate_reset*/TRUE);
 663         }
 664         adv_start_execution(adv);
 665 }
 666
 667 struct adv_softc *
 668 adv_alloc(device_t dev, struct resource *res, long offset)
 669 {
 670         struct adv_softc *adv = device_get_softc(dev);
 671
 672         /*
 673          * Allocate a storage area for us
 674          */
 675         LIST_INIT(&adv->pending_ccbs);
 676         SLIST_INIT(&adv->free_ccb_infos);
 677         adv->dev = dev;
 678         adv->res = res;
 679         adv->reg_off = offset;
 680         mtx_init(&adv->lock, "adv", NULL, MTX_DEF);
 681
 682         return(adv);
 683 }
 684
 685 void
 686 adv_free(struct adv_softc *adv)
 687 {
 688         switch (adv->init_level) {
 689         case 6:
 690         {
 691                 struct adv_ccb_info *cinfo;
 692
 693                 while ((cinfo = SLIST_FIRST(&adv->free_ccb_infos)) != NULL) {
 694                         SLIST_REMOVE_HEAD(&adv->free_ccb_infos, links);
 695                         adv_destroy_ccb_info(adv, cinfo);
 696                 }
 697
 698                 bus_dmamap_unload(adv->sense_dmat, adv->sense_dmamap);
 699         }
 700         case 5:
 701                 bus_dmamem_free(adv->sense_dmat, adv->sense_buffers,
 702                                 adv->sense_dmamap);
 703         case 4:
 704                 bus_dma_tag_destroy(adv->sense_dmat);
 705         case 3:
 706                 bus_dma_tag_destroy(adv->buffer_dmat);
 707         case 2:
 708                 bus_dma_tag_destroy(adv->parent_dmat);
 709         case 1:
 710                 if (adv->ccb_infos != NULL)
 711                         free(adv->ccb_infos, M_DEVBUF);
 712         case 0:
 713                 mtx_destroy(&adv->lock);
 714                 break;
 715         }
 716 }
 717
 718 int
 719 adv_init(struct adv_softc *adv)
 720 {
 721         struct    adv_eeprom_config eeprom_config;
 722         int       checksum, i;
 723         int       max_sync;
 724         u_int16_t config_lsw;
 725         u_int16_t config_msw;
 726
 727         mtx_lock(&adv->lock);
 728         adv_lib_init(adv);
 729
 730         /*
 731          * Stop script execution.
 732          */
 733         adv_write_lram_16(adv, ADV_HALTCODE_W, 0x00FE);
 734         adv_stop_execution(adv);
 735         if (adv_stop_chip(adv) == 0 || adv_is_chip_halted(adv) == 0) {
 736                 mtx_unlock(&adv->lock);
 737                 device_printf(adv->dev,
 738                     "Unable to halt adapter. Initialization failed\n");
 739                 return (1);
 740         }
 741         ADV_OUTW(adv, ADV_REG_PROG_COUNTER, ADV_MCODE_START_ADDR);
 742         if (ADV_INW(adv, ADV_REG_PROG_COUNTER) != ADV_MCODE_START_ADDR) {
 743                 mtx_unlock(&adv->lock);
 744                 device_printf(adv->dev,
 745                     "Unable to set program counter. Initialization failed\n");
 746                 return (1);
 747         }
 748
 749         config_msw = ADV_INW(adv, ADV_CONFIG_MSW);
 750         config_lsw = ADV_INW(adv, ADV_CONFIG_LSW);
 751
 752         if ((config_msw & ADV_CFG_MSW_CLR_MASK) != 0) {
 753                 config_msw &= ~ADV_CFG_MSW_CLR_MASK;
 754                 /*
 755                  * XXX The Linux code flags this as an error,
 756                  * but what should we report to the user???
 757                  * It seems that clearing the config register
 758                  * makes this error recoverable.
 759                  */
 760                 ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
 761         }
 762
 763         /* Suck in the configuration from the EEProm */
 764         checksum = adv_get_eeprom_config(adv, &eeprom_config);
 765
 766         if (ADV_INW(adv, ADV_CHIP_STATUS) & ADV_CSW_AUTO_CONFIG) {
 767                 /*
 768                  * XXX The Linux code sets a warning level for this
 769                  * condition, yet nothing of meaning is printed to
 770                  * the user.  What does this mean???
 771                  */
 772                 if (adv->chip_version == 3) {
 773                         if (eeprom_config.cfg_lsw != config_lsw)
 774                                 eeprom_config.cfg_lsw = config_lsw;
 775                         if (eeprom_config.cfg_msw != config_msw) {
 776                                 eeprom_config.cfg_msw = config_msw;
 777                         }
 778                 }
 779         }
 780         if (checksum == eeprom_config.chksum) {
 781
 782                 /* Range/Sanity checking */
 783                 if (eeprom_config.max_total_qng < ADV_MIN_TOTAL_QNG) {
 784                         eeprom_config.max_total_qng = ADV_MIN_TOTAL_QNG;
 785                 }
 786                 if (eeprom_config.max_total_qng > ADV_MAX_TOTAL_QNG) {
 787                         eeprom_config.max_total_qng = ADV_MAX_TOTAL_QNG;
 788                 }
 789                 if (eeprom_config.max_tag_qng > eeprom_config.max_total_qng) {
 790                         eeprom_config.max_tag_qng = eeprom_config.max_total_qng;
 791                 }
 792                 if (eeprom_config.max_tag_qng < ADV_MIN_TAG_Q_PER_DVC) {
 793                         eeprom_config.max_tag_qng = ADV_MIN_TAG_Q_PER_DVC;
 794                 }
 795                 adv->max_openings = eeprom_config.max_total_qng;
 796                 adv->user_disc_enable = eeprom_config.disc_enable;
 797                 adv->user_cmd_qng_enabled = eeprom_config.use_cmd_qng;
 798                 adv->isa_dma_speed = EEPROM_DMA_SPEED(eeprom_config);
 799                 adv->scsi_id = EEPROM_SCSIID(eeprom_config) & ADV_MAX_TID;
 800                 EEPROM_SET_SCSIID(eeprom_config, adv->scsi_id);
 801                 adv->control = eeprom_config.cntl;
 802                 for (i = 0; i <= ADV_MAX_TID; i++) {
 803                         u_int8_t sync_data;
 804
 805                         if ((eeprom_config.init_sdtr & (0x1 << i)) == 0)
 806                                 sync_data = 0;
 807                         else
 808                                 sync_data = eeprom_config.sdtr_data[i];
 809                         adv_sdtr_to_period_offset(adv,
 810                                                   sync_data,
 811                                                   &adv->tinfo[i].user.period,
 812                                                   &adv->tinfo[i].user.offset,
 813                                                   i);
 814                 }
 815                 config_lsw = eeprom_config.cfg_lsw;
 816                 eeprom_config.cfg_msw = config_msw;
 817         } else {
 818                 u_int8_t sync_data;
 819
 820                 device_printf(adv->dev, "Warning EEPROM Checksum mismatch. "
 821                        "Using default device parameters\n");
 822
 823                 /* Set reasonable defaults since we can't read the EEPROM */
 824                 adv->isa_dma_speed = /*ADV_DEF_ISA_DMA_SPEED*/1;
 825                 adv->max_openings = ADV_DEF_MAX_TOTAL_QNG;
 826                 adv->disc_enable = TARGET_BIT_VECTOR_SET;
 827                 adv->user_disc_enable = TARGET_BIT_VECTOR_SET;
 828                 adv->cmd_qng_enabled = TARGET_BIT_VECTOR_SET;
 829                 adv->user_cmd_qng_enabled = TARGET_BIT_VECTOR_SET;
 830                 adv->scsi_id = 7;
 831                 adv->control = 0xFFFF;
 832
 833                 if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050)
 834                         /* Default to no Ultra to support the 3030 */
 835                         adv->control &= ~ADV_CNTL_SDTR_ENABLE_ULTRA;
 836                 sync_data = ADV_DEF_SDTR_OFFSET | (ADV_DEF_SDTR_INDEX << 4);
 837                 for (i = 0; i <= ADV_MAX_TID; i++) {
 838                         adv_sdtr_to_period_offset(adv, sync_data,
 839                                                   &adv->tinfo[i].user.period,
 840                                                   &adv->tinfo[i].user.offset,
 841                                                   i);
 842                 }
 843                 config_lsw |= ADV_CFG_LSW_SCSI_PARITY_ON;
 844         }
 845         config_msw &= ~ADV_CFG_MSW_CLR_MASK;
 846         config_lsw |= ADV_CFG_LSW_HOST_INT_ON;
 847         if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)
 848          && (adv->control & ADV_CNTL_SDTR_ENABLE_ULTRA) == 0)
 849                 /* 25ns or 10MHz */
 850                 max_sync = 25;
 851         else
 852                 /* Unlimited */
 853                 max_sync = 0;
 854         for (i = 0; i <= ADV_MAX_TID; i++) {
 855                 if (adv->tinfo[i].user.period < max_sync)
 856                         adv->tinfo[i].user.period = max_sync;
 857         }
 858
 859         if (adv_test_external_lram(adv) == 0) {
 860                 if ((adv->type & (ADV_PCI|ADV_ULTRA)) == (ADV_PCI|ADV_ULTRA)) {
 861                         eeprom_config.max_total_qng =
 862                             ADV_MAX_PCI_ULTRA_INRAM_TOTAL_QNG;
 863                         eeprom_config.max_tag_qng =
 864                             ADV_MAX_PCI_ULTRA_INRAM_TAG_QNG;
 865                 } else {
 866                         eeprom_config.cfg_msw |= 0x0800;
 867                         config_msw |= 0x0800;
 868                         eeprom_config.max_total_qng =
 869                              ADV_MAX_PCI_INRAM_TOTAL_QNG;
 870                         eeprom_config.max_tag_qng = ADV_MAX_INRAM_TAG_QNG;
 871                 }
 872                 adv->max_openings = eeprom_config.max_total_qng;
 873         }
 874         ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
 875         ADV_OUTW(adv, ADV_CONFIG_LSW, config_lsw);
 876 #if 0
 877         /*
 878          * Don't write the eeprom data back for now.
 879          * I'd rather not mess up the user's card.  We also don't
 880          * fully sanitize the eeprom settings above for the write-back
 881          * to be 100% correct.
 882          */
 883         if (adv_set_eeprom_config(adv, &eeprom_config) != 0)
 884                 device_printf(adv->dev,
 885                     "WARNING! Failure writing to EEPROM.\n");
 886 #endif
 887
 888         adv_set_chip_scsiid(adv, adv->scsi_id);
 889         if (adv_init_lram_and_mcode(adv)) {
 890                 mtx_unlock(&adv->lock);
 891                 return (1);
 892         }
 893
 894         adv->disc_enable = adv->user_disc_enable;
 895
 896         adv_write_lram_8(adv, ADVV_DISC_ENABLE_B, adv->disc_enable);
 897         for (i = 0; i <= ADV_MAX_TID; i++) {
 898                 /*
 899                  * Start off in async mode.
 900                  */
 901                 adv_set_syncrate(adv, /*struct cam_path */NULL,
 902                                  i, /*period*/0, /*offset*/0,
 903                                  ADV_TRANS_CUR);
 904                 /*
 905                  * Enable the use of tagged commands on all targets.
 906                  * This allows the kernel driver to make up it's own mind
 907                  * as it sees fit to tag queue instead of having the
 908                  * firmware try and second guess the tag_code settins.
 909                  */
 910                 adv_write_lram_8(adv, ADVV_MAX_DVC_QNG_BEG + i,
 911                                  adv->max_openings);
 912         }
 913         adv_write_lram_8(adv, ADVV_USE_TAGGED_QNG_B, TARGET_BIT_VECTOR_SET);
 914         adv_write_lram_8(adv, ADVV_CAN_TAGGED_QNG_B, TARGET_BIT_VECTOR_SET);
 915         device_printf(adv->dev,
 916             "AdvanSys %s Host Adapter, SCSI ID %d, queue depth %d\n",
 917             (adv->type & ADV_ULTRA) && (max_sync == 0)
 918             ? "Ultra SCSI" : "SCSI",
 919             adv->scsi_id, adv->max_openings);
 920         mtx_unlock(&adv->lock);
 921         return (0);
 922 }
 923
 924 void
 925 adv_intr(void *arg)
 926 {
 927         struct    adv_softc *adv;
 928
 929         adv = arg;
 930         mtx_lock(&adv->lock);
 931         adv_intr_locked(adv);
 932         mtx_unlock(&adv->lock);
 933 }
 934
 935 void
 936 adv_intr_locked(struct adv_softc *adv)
 937 {
 938         u_int16_t chipstat;
 939         u_int16_t saved_ram_addr;
 940         u_int8_t  ctrl_reg;
 941         u_int8_t  saved_ctrl_reg;
 942         u_int8_t  host_flag;
 943
 944         if (!dumping)
 945                 mtx_assert(&adv->lock, MA_OWNED);
 946         chipstat = ADV_INW(adv, ADV_CHIP_STATUS);
 947
 948         /* Is it for us? */
 949         if ((chipstat & (ADV_CSW_INT_PENDING|ADV_CSW_SCSI_RESET_LATCH)) == 0)
 950                 return;
 951
 952         ctrl_reg = ADV_INB(adv, ADV_CHIP_CTRL);
 953         saved_ctrl_reg = ctrl_reg & (~(ADV_CC_SCSI_RESET | ADV_CC_CHIP_RESET |
 954                                        ADV_CC_SINGLE_STEP | ADV_CC_DIAG |
 955                                        ADV_CC_TEST));
 956
 957         if ((chipstat & (ADV_CSW_SCSI_RESET_LATCH|ADV_CSW_SCSI_RESET_ACTIVE))) {
 958                 device_printf(adv->dev, "Detected Bus Reset\n");
 959                 adv_reset_bus(adv, /*initiate_reset*/FALSE);
 960                 return;
 961         }
 962
 963         if ((chipstat & ADV_CSW_INT_PENDING) != 0) {
 964
 965                 saved_ram_addr = ADV_INW(adv, ADV_LRAM_ADDR);
 966                 host_flag = adv_read_lram_8(adv, ADVV_HOST_FLAG_B);
 967                 adv_write_lram_8(adv, ADVV_HOST_FLAG_B,
 968                                  host_flag | ADV_HOST_FLAG_IN_ISR);
 969
 970                 adv_ack_interrupt(adv);
 971
 972                 if ((chipstat & ADV_CSW_HALTED) != 0
 973                  && (ctrl_reg & ADV_CC_SINGLE_STEP) != 0) {
 974                         adv_isr_chip_halted(adv);
 975                         saved_ctrl_reg &= ~ADV_CC_HALT;
 976                 } else {
 977                         adv_run_doneq(adv);
 978                 }
 979                 ADV_OUTW(adv, ADV_LRAM_ADDR, saved_ram_addr);
 980 #ifdef DIAGNOSTIC
 981                 if (ADV_INW(adv, ADV_LRAM_ADDR) != saved_ram_addr)
 982                         panic("adv_intr: Unable to set LRAM addr");
 983 #endif
 984                 adv_write_lram_8(adv, ADVV_HOST_FLAG_B, host_flag);
 985         }
 986
 987         ADV_OUTB(adv, ADV_CHIP_CTRL, saved_ctrl_reg);
 988 }
 989
 990 static void
 991 adv_run_doneq(struct adv_softc *adv)
 992 {
 993         struct adv_q_done_info scsiq;
 994         u_int             doneq_head;
 995         u_int             done_qno;
 996
 997         doneq_head = adv_read_lram_16(adv, ADVV_DONE_Q_TAIL_W) & 0xFF;
 998         done_qno = adv_read_lram_8(adv, ADV_QNO_TO_QADDR(doneq_head)
 999                                    + ADV_SCSIQ_B_FWD);
1000         while (done_qno != ADV_QLINK_END) {
1001                 union ccb* ccb;
1002                 struct adv_ccb_info *cinfo;
1003                 u_int done_qaddr;
1004                 u_int sg_queue_cnt;
1005
1006                 done_qaddr = ADV_QNO_TO_QADDR(done_qno);
1007
1008                 /* Pull status from this request */
1009                 sg_queue_cnt = adv_copy_lram_doneq(adv, done_qaddr, &scsiq,
1010                                                    adv->max_dma_count);
1011
1012                 /* Mark it as free */
1013                 adv_write_lram_8(adv, done_qaddr + ADV_SCSIQ_B_STATUS,
1014                                  scsiq.q_status & ~(QS_READY|QS_ABORTED));
1015
1016                 /* Process request based on retrieved info */
1017                 if ((scsiq.cntl & QC_SG_HEAD) != 0) {
1018                         u_int i;
1019
1020                         /*
1021                          * S/G based request.  Free all of the queue
1022                          * structures that contained S/G information.
1023                          */
1024                         for (i = 0; i < sg_queue_cnt; i++) {
1025                                 done_qno = adv_read_lram_8(adv, done_qaddr
1026                                                            + ADV_SCSIQ_B_FWD);
1027
1028 #ifdef DIAGNOSTIC
1029                                 if (done_qno == ADV_QLINK_END) {
1030                                         panic("adv_qdone: Corrupted SG "
1031                                               "list encountered");
1032                                 }
1033 #endif
1034                                 done_qaddr = ADV_QNO_TO_QADDR(done_qno);
1035
1036                                 /* Mark SG queue as free */
1037                                 adv_write_lram_8(adv, done_qaddr
1038                                                  + ADV_SCSIQ_B_STATUS, QS_FREE);
1039                         }
1040                 } else
1041                         sg_queue_cnt = 0;
1042 #ifdef DIAGNOSTIC
1043                 if (adv->cur_active < (sg_queue_cnt + 1))
1044                         panic("adv_qdone: Attempting to free more "
1045                               "queues than are active");
1046 #endif
1047                 adv->cur_active -= sg_queue_cnt + 1;
1048
1049                 if ((scsiq.q_status != QS_DONE)
1050                  && (scsiq.q_status & QS_ABORTED) == 0)
1051                         panic("adv_qdone: completed scsiq with unknown status");
1052
1053                 scsiq.remain_bytes += scsiq.extra_bytes;
1054
1055                 if ((scsiq.d3.done_stat == QD_WITH_ERROR) &&
1056                     (scsiq.d3.host_stat == QHSTA_M_DATA_OVER_RUN)) {
1057                         if ((scsiq.cntl & (QC_DATA_IN|QC_DATA_OUT)) == 0) {
1058                                 scsiq.d3.done_stat = QD_NO_ERROR;
1059                                 scsiq.d3.host_stat = QHSTA_NO_ERROR;
1060                         }
1061                 }
1062
1063                 cinfo = &adv->ccb_infos[scsiq.d2.ccb_index];
1064                 ccb = cinfo->ccb;
1065                 ccb->csio.resid = scsiq.remain_bytes;
1066                 adv_done(adv, ccb,
1067                          scsiq.d3.done_stat, scsiq.d3.host_stat,
1068                          scsiq.d3.scsi_stat, scsiq.q_no);
1069
1070                 doneq_head = done_qno;
1071                 done_qno = adv_read_lram_8(adv, done_qaddr + ADV_SCSIQ_B_FWD);
1072         }
1073         adv_write_lram_16(adv, ADVV_DONE_Q_TAIL_W, doneq_head);
1074 }
1075
1076
1077 void
1078 adv_done(struct adv_softc *adv, union ccb *ccb, u_int done_stat,
1079          u_int host_stat, u_int scsi_status, u_int q_no)
1080 {
1081         struct     adv_ccb_info *cinfo;
1082
1083         if (!dumping)
1084                 mtx_assert(&adv->lock, MA_OWNED);
1085         cinfo = (struct adv_ccb_info *)ccb->ccb_h.ccb_cinfo_ptr;
1086         LIST_REMOVE(&ccb->ccb_h, sim_links.le);
1087         callout_stop(&cinfo->timer);
1088         if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1089                 bus_dmasync_op_t op;
1090
1091                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1092                         op = BUS_DMASYNC_POSTREAD;
1093                 else
1094                         op = BUS_DMASYNC_POSTWRITE;
1095                 bus_dmamap_sync(adv->buffer_dmat, cinfo->dmamap, op);
1096                 bus_dmamap_unload(adv->buffer_dmat, cinfo->dmamap);
1097         }
1098
1099         switch (done_stat) {
1100         case QD_NO_ERROR:
1101                 if (host_stat == QHSTA_NO_ERROR) {
1102                         ccb->ccb_h.status = CAM_REQ_CMP;
1103                         break;
1104                 }
1105                 xpt_print_path(ccb->ccb_h.path);
1106                 printf("adv_done - queue done without error, "
1107                        "but host status non-zero(%x)\n", host_stat);
1108                 /*FALLTHROUGH*/
1109         case QD_WITH_ERROR:
1110                 switch (host_stat) {
1111                 case QHSTA_M_TARGET_STATUS_BUSY:
1112                 case QHSTA_M_BAD_QUEUE_FULL_OR_BUSY:
1113                         /*
1114                          * Assume that if we were a tagged transaction
1115                          * the target reported queue full.  Otherwise,
1116                          * report busy.  The firmware really should just
1117                          * pass the original status back up to us even
1118                          * if it thinks the target was in error for
1119                          * returning this status as no other transactions
1120                          * from this initiator are in effect, but this
1121                          * ignores multi-initiator setups and there is
1122                          * evidence that the firmware gets its per-device
1123                          * transaction counts screwed up occasionally.
1124                          */
1125                         ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1126                         if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
1127                          && host_stat != QHSTA_M_TARGET_STATUS_BUSY)
1128                                 scsi_status = SCSI_STATUS_QUEUE_FULL;
1129                         else
1130                                 scsi_status = SCSI_STATUS_BUSY;
1131                         adv_abort_ccb(adv, ccb->ccb_h.target_id,
1132                                       ccb->ccb_h.target_lun,
1133                                       /*ccb*/NULL, CAM_REQUEUE_REQ,
1134                                       /*queued_only*/TRUE);
1135                         /*FALLTHROUGH*/
1136                 case QHSTA_M_NO_AUTO_REQ_SENSE:
1137                 case QHSTA_NO_ERROR:
1138                         ccb->csio.scsi_status = scsi_status;
1139                         switch (scsi_status) {
1140                         case SCSI_STATUS_CHECK_COND:
1141                         case SCSI_STATUS_CMD_TERMINATED:
1142                                 ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
1143                                 /* Structure copy */
1144                                 ccb->csio.sense_data =
1145                                     adv->sense_buffers[q_no - 1];
1146                                 /* FALLTHROUGH */
1147                         case SCSI_STATUS_BUSY:
1148                         case SCSI_STATUS_RESERV_CONFLICT:
1149                         case SCSI_STATUS_QUEUE_FULL:
1150                         case SCSI_STATUS_COND_MET:
1151                         case SCSI_STATUS_INTERMED:
1152                         case SCSI_STATUS_INTERMED_COND_MET:
1153                                 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1154                                 break;
1155                         case SCSI_STATUS_OK:
1156                                 ccb->ccb_h.status |= CAM_REQ_CMP;
1157                                 break;
1158                         }
1159                         break;
1160                 case QHSTA_M_SEL_TIMEOUT:
1161                         ccb->ccb_h.status = CAM_SEL_TIMEOUT;
1162                         break;
1163                 case QHSTA_M_DATA_OVER_RUN:
1164                         ccb->ccb_h.status = CAM_DATA_RUN_ERR;
1165                         break;
1166                 case QHSTA_M_UNEXPECTED_BUS_FREE:
1167                         ccb->ccb_h.status = CAM_UNEXP_BUSFREE;
1168                         break;
1169                 case QHSTA_M_BAD_BUS_PHASE_SEQ:
1170                         ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
1171                         break;
1172                 case QHSTA_M_BAD_CMPL_STATUS_IN:
1173                         /* No command complete after a status message */
1174                         ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
1175                         break;
1176                 case QHSTA_D_EXE_SCSI_Q_BUSY_TIMEOUT:
1177                 case QHSTA_M_WTM_TIMEOUT:
1178                 case QHSTA_M_HUNG_REQ_SCSI_BUS_RESET:
1179                         /* The SCSI bus hung in a phase */
1180                         ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
1181                         adv_reset_bus(adv, /*initiate_reset*/TRUE);
1182                         break;
1183                 case QHSTA_M_AUTO_REQ_SENSE_FAIL:
1184                         ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
1185                         break;
1186                 case QHSTA_D_QDONE_SG_LIST_CORRUPTED:
1187                 case QHSTA_D_ASC_DVC_ERROR_CODE_SET:
1188                 case QHSTA_D_HOST_ABORT_FAILED:
1189                 case QHSTA_D_EXE_SCSI_Q_FAILED:
1190                 case QHSTA_D_ASPI_NO_BUF_POOL:
1191                 case QHSTA_M_BAD_TAG_CODE:
1192                 case QHSTA_D_LRAM_CMP_ERROR:
1193                 case QHSTA_M_MICRO_CODE_ERROR_HALT:
1194                 default:
1195                         panic("%s: Unhandled Host status error %x",
1196                             device_get_nameunit(adv->dev), host_stat);
1197                         /* NOTREACHED */
1198                 }
1199                 break;
1200
1201         case QD_ABORTED_BY_HOST:
1202                 /* Don't clobber any, more explicit, error codes we've set */
1203                 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG)
1204                         ccb->ccb_h.status = CAM_REQ_ABORTED;
1205                 break;
1206
1207         default:
1208                 xpt_print_path(ccb->ccb_h.path);
1209                 printf("adv_done - queue done with unknown status %x:%x\n",
1210                        done_stat, host_stat);
1211                 ccb->ccb_h.status = CAM_REQ_CMP_ERR;
1212                 break;
1213         }
1214         adv_clear_state(adv, ccb);
1215         if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP
1216          && (ccb->ccb_h.status & CAM_DEV_QFRZN) == 0) {
1217                 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1218                 ccb->ccb_h.status |= CAM_DEV_QFRZN;
1219         }
1220         adv_free_ccb_info(adv, cinfo);
1221         /*
1222          * Null this out so that we catch driver bugs that cause a
1223          * ccb to be completed twice.
1224          */
1225         ccb->ccb_h.ccb_cinfo_ptr = NULL;
1226         ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1227         xpt_done(ccb);
1228 }
1229
1230 /*
1231  * Function to poll for command completion when
1232  * interrupts are disabled (crash dumps)
1233  */
1234 static void
1235 adv_poll(struct cam_sim *sim)
1236 {
1237
1238         adv_intr_locked(cam_sim_softc(sim));
1239 }
1240
1241 /*
1242  * Attach all the sub-devices we can find
1243  */
1244 int
1245 adv_attach(adv)
1246         struct adv_softc *adv;
1247 {
1248         struct ccb_setasync csa;
1249         struct cam_devq *devq;
1250         int max_sg;
1251
1252         /*
1253          * Allocate an array of ccb mapping structures.  We put the
1254          * index of the ccb_info structure into the queue representing
1255          * a transaction and use it for mapping the queue to the
1256          * upper level SCSI transaction it represents.
1257          */
1258         adv->ccb_infos = malloc(sizeof(*adv->ccb_infos) * adv->max_openings,
1259                                 M_DEVBUF, M_NOWAIT);
1260
1261         if (adv->ccb_infos == NULL)
1262                 return (ENOMEM);
1263
1264         adv->init_level++;
1265
1266         /*
1267          * Create our DMA tags.  These tags define the kinds of device
1268          * accessible memory allocations and memory mappings we will
1269          * need to perform during normal operation.
1270          *
1271          * Unless we need to further restrict the allocation, we rely
1272          * on the restrictions of the parent dmat, hence the common
1273          * use of MAXADDR and MAXSIZE.
1274          *
1275          * The ASC boards use chains of "queues" (the transactional
1276          * resources on the board) to represent long S/G lists.
1277          * The first queue represents the command and holds a
1278          * single address and data pair.  The queues that follow
1279          * can each hold ADV_SG_LIST_PER_Q entries.  Given the
1280          * total number of queues, we can express the largest
1281          * transaction we can map.  We reserve a few queues for
1282          * error recovery.  Take those into account as well.
1283          *
1284          * There is a way to take an interrupt to download the
1285          * next batch of S/G entries if there are more than 255
1286          * of them (the counter in the queue structure is a u_int8_t).
1287          * We don't use this feature, so limit the S/G list size
1288          * accordingly.
1289          */
1290         max_sg = (adv->max_openings - ADV_MIN_FREE_Q - 1) * ADV_SG_LIST_PER_Q;
1291         if (max_sg > 255)
1292                 max_sg = 255;
1293
1294         /* DMA tag for mapping buffers into device visible space. */
1295         if (bus_dma_tag_create(
1296                         /* parent       */ adv->parent_dmat,
1297                         /* alignment    */ 1,
1298                         /* boundary     */ 0,
1299                         /* lowaddr      */ BUS_SPACE_MAXADDR,
1300                         /* highaddr     */ BUS_SPACE_MAXADDR,
1301                         /* filter       */ NULL,
1302                         /* filterarg    */ NULL,
1303                         /* maxsize      */ ADV_MAXPHYS,
1304                         /* nsegments    */ max_sg,
1305                         /* maxsegsz     */ BUS_SPACE_MAXSIZE_32BIT,
1306                         /* flags        */ BUS_DMA_ALLOCNOW,
1307                         /* lockfunc     */ busdma_lock_mutex,
1308                         /* lockarg      */ &adv->lock,
1309                         &adv->buffer_dmat) != 0) {
1310                 return (ENXIO);
1311         }
1312         adv->init_level++;
1313
1314         /* DMA tag for our sense buffers */
1315         if (bus_dma_tag_create(
1316                         /* parent       */ adv->parent_dmat,
1317                         /* alignment    */ 1,
1318                         /* boundary     */ 0,
1319                         /* lowaddr      */ BUS_SPACE_MAXADDR,
1320                         /* highaddr     */ BUS_SPACE_MAXADDR,
1321                         /* filter       */ NULL,
1322                         /* filterarg    */ NULL,
1323                         /* maxsize      */ sizeof(struct scsi_sense_data) *
1324                                            adv->max_openings,
1325                         /* nsegments    */ 1,
1326                         /* maxsegsz     */ BUS_SPACE_MAXSIZE_32BIT,
1327                         /* flags        */ 0,
1328                         /* lockfunc     */ busdma_lock_mutex,
1329                         /* lockarg      */ &adv->lock,
1330                         &adv->sense_dmat) != 0) {
1331                 return (ENXIO);
1332         }
1333
1334         adv->init_level++;
1335
1336         /* Allocation for our sense buffers */
1337         if (bus_dmamem_alloc(adv->sense_dmat, (void **)&adv->sense_buffers,
1338                              BUS_DMA_NOWAIT, &adv->sense_dmamap) != 0) {
1339                 return (ENOMEM);
1340         }
1341
1342         adv->init_level++;
1343
1344         /* And permanently map them */
1345         bus_dmamap_load(adv->sense_dmat, adv->sense_dmamap,
1346                         adv->sense_buffers,
1347                         sizeof(struct scsi_sense_data)*adv->max_openings,
1348                         adv_map, &adv->sense_physbase, /*flags*/0);
1349
1350         adv->init_level++;
1351
1352         /*
1353          * Fire up the chip
1354          */
1355         if (adv_start_chip(adv) != 1) {
1356                 device_printf(adv->dev,
1357                     "Unable to start on board processor. Aborting.\n");
1358                 return (ENXIO);
1359         }
1360
1361         /*
1362          * Create the device queue for our SIM.
1363          */
1364         devq = cam_simq_alloc(adv->max_openings);
1365         if (devq == NULL)
1366                 return (ENOMEM);
1367
1368         /*
1369          * Construct our SIM entry.
1370          */
1371         adv->sim = cam_sim_alloc(adv_action, adv_poll, "adv", adv,
1372             device_get_unit(adv->dev), &adv->lock, 1, adv->max_openings, devq);
1373         if (adv->sim == NULL)
1374                 return (ENOMEM);
1375
1376         /*
1377          * Register the bus.
1378          */
1379         mtx_lock(&adv->lock);
1380         if (xpt_bus_register(adv->sim, adv->dev, 0) != CAM_SUCCESS) {
1381                 cam_sim_free(adv->sim, /*free devq*/TRUE);
1382                 mtx_unlock(&adv->lock);
1383                 return (ENXIO);
1384         }
1385
1386         if (xpt_create_path(&adv->path, /*periph*/NULL, cam_sim_path(adv->sim),
1387                             CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD)
1388             != CAM_REQ_CMP) {
1389                 xpt_bus_deregister(cam_sim_path(adv->sim));
1390                 cam_sim_free(adv->sim, /*free devq*/TRUE);
1391                 mtx_unlock(&adv->lock);
1392                 return (ENXIO);
1393         }
1394
1395         xpt_setup_ccb(&csa.ccb_h, adv->path, /*priority*/5);
1396         csa.ccb_h.func_code = XPT_SASYNC_CB;
1397         csa.event_enable = AC_FOUND_DEVICE|AC_LOST_DEVICE;
1398         csa.callback = advasync;
1399         csa.callback_arg = adv;
1400         xpt_action((union ccb *)&csa);
1401         mtx_unlock(&adv->lock);
1402         gone_in_dev(adv->dev, 12, "adv(4) driver");
1403
1404         return (0);
1405 }
1406 MODULE_DEPEND(adv, cam, 1, 1, 1);