2 * Device probe and attach routines for the following
3 * Advanced Systems Inc. SCSI controllers:
5 * ABP[3]940UW - Bus-Master PCI Ultra-Wide (253 CDB)
6 * ABP950UW - Dual Channel Bus-Master PCI Ultra-Wide (253 CDB/Channel)
7 * ABP970UW - Bus-Master PCI Ultra-Wide (253 CDB)
8 * ABP3940U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB)
9 * ABP3950U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB)
11 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
13 * Copyright (c) 1998, 1999, 2000 Justin Gibbs.
14 * All rights reserved.
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
19 * 1. Redistributions of source code must retain the above copyright
20 * notice, this list of conditions, and the following disclaimer,
21 * without modification.
22 * 2. The name of the author may not be used to endorse or promote products
23 * derived from this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
29 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD$");
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/module.h>
46 #include <sys/mutex.h>
49 #include <machine/bus.h>
50 #include <machine/resource.h>
54 #include <dev/pci/pcireg.h>
55 #include <dev/pci/pcivar.h>
58 #include <cam/scsi/scsi_all.h>
60 #include <dev/advansys/adwvar.h>
61 #include <dev/advansys/adwlib.h>
62 #include <dev/advansys/adwmcode.h>
64 #define ADW_PCI_IOBASE PCIR_BAR(0) /* I/O Address */
65 #define ADW_PCI_MEMBASE PCIR_BAR(1) /* Mem I/O Address */
67 #define PCI_ID_ADVANSYS_3550 0x230010CD00000000ull
68 #define PCI_ID_ADVANSYS_38C0800_REV1 0x250010CD00000000ull
69 #define PCI_ID_ADVANSYS_38C1600_REV1 0x270010CD00000000ull
70 #define PCI_ID_ALL_MASK 0xFFFFFFFFFFFFFFFFull
71 #define PCI_ID_DEV_VENDOR_MASK 0xFFFFFFFF00000000ull
73 struct adw_pci_identity;
74 typedef int (adw_device_setup_t)(device_t, struct adw_pci_identity *,
75 struct adw_softc *adw);
77 struct adw_pci_identity {
81 adw_device_setup_t *setup;
82 const struct adw_mcode *mcode_data;
83 const struct adw_eeprom *default_eeprom;
86 static adw_device_setup_t adw_asc3550_setup;
87 static adw_device_setup_t adw_asc38C0800_setup;
89 static adw_device_setup_t adw_asc38C1600_setup;
92 struct adw_pci_identity adw_pci_ident_table[] =
94 /* asc3550 based controllers */
97 PCI_ID_DEV_VENDOR_MASK,
98 "AdvanSys 3550 Ultra SCSI Adapter",
100 &adw_asc3550_mcode_data,
101 &adw_asc3550_default_eeprom
103 /* asc38C0800 based controllers */
105 PCI_ID_ADVANSYS_38C0800_REV1,
106 PCI_ID_DEV_VENDOR_MASK,
107 "AdvanSys 38C0800 Ultra2 SCSI Adapter",
108 adw_asc38C0800_setup,
109 &adw_asc38C0800_mcode_data,
110 &adw_asc38C0800_default_eeprom
113 /* XXX Disabled until I have hardware to test with */
114 /* asc38C1600 based controllers */
116 PCI_ID_ADVANSYS_38C1600_REV1,
117 PCI_ID_DEV_VENDOR_MASK,
118 "AdvanSys 38C1600 Ultra160 SCSI Adapter",
119 adw_asc38C1600_setup,
120 NULL, /* None provided by vendor thus far */
121 NULL /* None provided by vendor thus far */
126 #define ADW_PCI_MAX_DMA_ADDR (0xFFFFFFFFUL)
127 #define ADW_PCI_MAX_DMA_COUNT (0xFFFFFFFFUL)
129 static int adw_pci_probe(device_t dev);
130 static int adw_pci_attach(device_t dev);
132 static device_method_t adw_pci_methods[] = {
133 /* Device interface */
134 DEVMETHOD(device_probe, adw_pci_probe),
135 DEVMETHOD(device_attach, adw_pci_attach),
139 static driver_t adw_pci_driver = {
142 sizeof(struct adw_softc)
145 static devclass_t adw_devclass;
147 DRIVER_MODULE(adw, pci, adw_pci_driver, adw_devclass, 0, 0);
148 MODULE_DEPEND(adw, pci, 1, 1, 1);
150 static __inline u_int64_t
151 adw_compose_id(u_int device, u_int vendor, u_int subdevice, u_int subvendor)
157 | ((u_int64_t)vendor << 32)
158 | ((u_int64_t)device << 48);
163 static struct adw_pci_identity *
164 adw_find_pci_device(device_t dev)
167 struct adw_pci_identity *entry;
170 full_id = adw_compose_id(pci_get_device(dev),
172 pci_get_subdevice(dev),
173 pci_get_subvendor(dev));
175 for (i = 0; i < nitems(adw_pci_ident_table); i++) {
176 entry = &adw_pci_ident_table[i];
177 if (entry->full_id == (full_id & entry->id_mask))
184 adw_pci_probe(device_t dev)
186 struct adw_pci_identity *entry;
188 entry = adw_find_pci_device(dev);
190 device_set_desc(dev, entry->name);
191 return (BUS_PROBE_DEFAULT);
197 adw_pci_attach(device_t dev)
199 struct adw_softc *adw;
200 struct adw_pci_identity *entry;
202 struct resource *regs;
208 entry = adw_find_pci_device(dev);
214 #ifdef ADW_ALLOW_MEMIO
215 regs_type = SYS_RES_MEMORY;
216 regs_id = ADW_PCI_MEMBASE;
217 regs = bus_alloc_resource_any(dev, regs_type, ®s_id, RF_ACTIVE);
220 regs_type = SYS_RES_IOPORT;
221 regs_id = ADW_PCI_IOBASE;
222 regs = bus_alloc_resource_any(dev, regs_type,
223 ®s_id, RF_ACTIVE);
227 device_printf(dev, "can't allocate register resources\n");
231 adw = adw_alloc(dev, regs, regs_type, regs_id);
236 * Now that we have access to our registers, just verify that
237 * this really is an AdvanSys device.
239 if (adw_find_signature(adw) == 0) {
246 error = entry->setup(dev, entry, adw);
251 /* Ensure busmastering is enabled */
252 pci_enable_busmaster(dev);
254 /* Allocate a dmatag for our transfer DMA maps */
255 error = bus_dma_tag_create(
256 /* parent */ bus_get_dma_tag(dev),
259 /* lowaddr */ ADW_PCI_MAX_DMA_ADDR,
260 /* highaddr */ BUS_SPACE_MAXADDR,
262 /* filterarg */ NULL,
263 /* maxsize */ BUS_SPACE_MAXSIZE_32BIT,
265 /* maxsegsz */ ADW_PCI_MAX_DMA_COUNT,
274 device_printf(dev, "Could not allocate DMA tag - error %d\n",
282 error = adw_init(adw);
289 * If the PCI Configuration Command Register "Parity Error Response
290 * Control" Bit was clear (0), then set the microcode variable
291 * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
292 * to ignore DMA parity errors.
294 command = pci_read_config(dev, PCIR_COMMAND, /*bytes*/2);
295 if ((command & PCIM_CMD_PERRESPEN) == 0)
296 adw_lram_write_16(adw, ADW_MC_CONTROL_FLAG,
297 adw_lram_read_16(adw, ADW_MC_CONTROL_FLAG)
298 | ADW_MC_CONTROL_IGN_PERR);
301 adw->irq_res_type = SYS_RES_IRQ;
302 adw->irq = bus_alloc_resource_any(dev, adw->irq_res_type, &zero,
303 RF_ACTIVE | RF_SHAREABLE);
304 if (adw->irq == NULL) {
309 error = adw_attach(adw);
316 adw_generic_setup(device_t dev, struct adw_pci_identity *entry,
317 struct adw_softc *adw)
319 adw->channel = pci_get_function(dev) == 1 ? 'B' : 'A';
320 adw->chip = ADW_CHIP_NONE;
321 adw->features = ADW_FENONE;
322 adw->flags = ADW_FNONE;
323 adw->mcode_data = entry->mcode_data;
324 adw->default_eeprom = entry->default_eeprom;
329 adw_asc3550_setup(device_t dev, struct adw_pci_identity *entry,
330 struct adw_softc *adw)
334 error = adw_generic_setup(dev, entry, adw);
337 adw->chip = ADW_CHIP_ASC3550;
338 adw->features = ADW_ASC3550_FE;
339 adw->memsize = ADW_3550_MEMSIZE;
341 * For ASC-3550, setting the START_CTL_EMFU [3:2] bits
342 * sets a FIFO threshold of 128 bytes. This register is
343 * only accessible to the host.
345 adw_outb(adw, ADW_DMA_CFG0,
346 ADW_DMA_CFG0_START_CTL_EM_FU|ADW_DMA_CFG0_READ_CMD_MRM);
347 adw_outb(adw, ADW_MEM_CFG,
348 adw_inb(adw, ADW_MEM_CFG) | ADW_MEM_CFG_RAM_SZ_8KB);
353 adw_asc38C0800_setup(device_t dev, struct adw_pci_identity *entry,
354 struct adw_softc *adw)
358 error = adw_generic_setup(dev, entry, adw);
362 * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and
363 * START_CTL_TH [3:2] bits for the default FIFO threshold.
365 * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes.
367 * For DMA Errata #4 set the BC_THRESH_ENB bit.
369 adw_outb(adw, ADW_DMA_CFG0,
370 ADW_DMA_CFG0_BC_THRESH_ENB|ADW_DMA_CFG0_FIFO_THRESH_80B
371 |ADW_DMA_CFG0_START_CTL_TH|ADW_DMA_CFG0_READ_CMD_MRM);
372 adw_outb(adw, ADW_MEM_CFG,
373 adw_inb(adw, ADW_MEM_CFG) | ADW_MEM_CFG_RAM_SZ_16KB);
374 adw->chip = ADW_CHIP_ASC38C0800;
375 adw->features = ADW_ASC38C0800_FE;
376 adw->memsize = ADW_38C0800_MEMSIZE;
382 adw_asc38C1600_setup(device_t dev, struct adw_pci_identity *entry,
383 struct adw_softc *adw)
387 error = adw_generic_setup(dev, entry, adw);
390 adw->chip = ADW_CHIP_ASC38C1600;
391 adw->features = ADW_ASC38C1600_FE;
392 adw->memsize = ADW_38C1600_MEMSIZE;