2 * FreeBSD, PCI product support functions
4 * Copyright (c) 1995-2001 Justin T. Gibbs
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification, immediately at the beginning of the file.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU Public License ("GPL").
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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36 #include <dev/aic7xxx/aic79xx_osm.h>
38 #define AHD_PCI_IOADDR0 PCIR_MAPS /* Primary I/O BAR */
39 #define AHD_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
40 #define AHD_PCI_IOADDR1 (PCIR_MAPS + 12)/* Secondary I/O BAR */
42 static int ahd_pci_probe(device_t dev);
43 static int ahd_pci_attach(device_t dev);
45 static device_method_t ahd_pci_device_methods[] = {
46 /* Device interface */
47 DEVMETHOD(device_probe, ahd_pci_probe),
48 DEVMETHOD(device_attach, ahd_pci_attach),
49 DEVMETHOD(device_detach, ahd_detach),
53 static driver_t ahd_pci_driver = {
55 ahd_pci_device_methods,
56 sizeof(struct ahd_softc)
59 static devclass_t ahd_devclass;
61 DRIVER_MODULE(ahd, pci, ahd_pci_driver, ahd_devclass, 0, 0);
62 DRIVER_MODULE(ahd, cardbus, ahd_pci_driver, ahd_devclass, 0, 0);
63 MODULE_DEPEND(ahd_pci, ahd, 1, 1, 1);
64 MODULE_VERSION(ahd_pci, 1);
67 ahd_pci_probe(device_t dev)
69 struct ahd_pci_identity *entry;
71 entry = ahd_find_pci_device(dev);
73 device_set_desc(dev, entry->name);
80 ahd_pci_attach(device_t dev)
82 struct ahd_pci_identity *entry;
83 struct ahd_softc *ahd;
87 entry = ahd_find_pci_device(dev);
92 * Allocate a softc for this card and
93 * set it up for attachment by our
94 * common detect routine.
96 name = malloc(strlen(device_get_nameunit(dev)) + 1, M_DEVBUF, M_NOWAIT);
99 strcpy(name, device_get_nameunit(dev));
100 ahd = ahd_alloc(dev, name);
104 ahd_set_unit(ahd, device_get_unit(dev));
107 * Should we bother disabling 39Bit addressing
108 * based on installed memory?
110 if (sizeof(bus_addr_t) > 4)
111 ahd->flags |= AHD_39BIT_ADDRESSING;
113 /* Allocate a dmatag for our SCB DMA maps */
114 /* XXX Should be a child of the PCI bus dma tag */
115 error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1,
117 (ahd->flags & AHD_39BIT_ADDRESSING)
119 : BUS_SPACE_MAXADDR_32BIT,
120 /*highaddr*/BUS_SPACE_MAXADDR,
121 /*filter*/NULL, /*filterarg*/NULL,
122 /*maxsize*/MAXBSIZE, /*nsegments*/AHD_NSEG,
123 /*maxsegsz*/AHD_MAXTRANSFER_SIZE,
124 /*flags*/BUS_DMA_ALLOCNOW,
128 printf("ahd_pci_attach: Could not allocate DMA tag "
129 "- error %d\n", error);
133 ahd->dev_softc = dev;
134 error = ahd_pci_config(ahd, entry);
145 ahd_pci_map_registers(struct ahd_softc *ahd)
147 struct resource *regs;
148 struct resource *regs2;
154 command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, /*bytes*/1);
159 if ((command & PCIM_CMD_MEMEN) != 0) {
161 regs_type = SYS_RES_MEMORY;
162 regs_id = AHD_PCI_MEMADDR;
163 regs = bus_alloc_resource(ahd->dev_softc, regs_type,
164 ®s_id, 0, ~0, 1, RF_ACTIVE);
168 ahd->tags[0] = rman_get_bustag(regs);
169 ahd->bshs[0] = rman_get_bushandle(regs);
170 ahd->tags[1] = ahd->tags[0];
171 error = bus_space_subregion(ahd->tags[0], ahd->bshs[0],
176 * Do a quick test to see if memory mapped
177 * I/O is functioning correctly.
179 if (error != 0 || ahd_inb(ahd, HCNTRL) == 0xFF) {
180 device_printf(ahd->dev_softc,
181 "PCI Device %d:%d:%d failed memory "
182 "mapped test. Using PIO.\n",
183 ahd_get_pci_bus(ahd->dev_softc),
184 ahd_get_pci_slot(ahd->dev_softc),
185 ahd_get_pci_function(ahd->dev_softc));
186 bus_release_resource(ahd->dev_softc, regs_type,
190 command &= ~PCIM_CMD_PORTEN;
191 ahd_pci_write_config(ahd->dev_softc,
193 command, /*bytes*/1);
197 if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
198 regs_type = SYS_RES_IOPORT;
199 regs_id = AHD_PCI_IOADDR0;
200 regs = bus_alloc_resource(ahd->dev_softc, regs_type,
201 ®s_id, 0, ~0, 1, RF_ACTIVE);
203 device_printf(ahd->dev_softc,
204 "can't allocate register resources\n");
207 ahd->tags[0] = rman_get_bustag(regs);
208 ahd->bshs[0] = rman_get_bushandle(regs);
210 /* And now the second BAR */
211 regs_id2 = AHD_PCI_IOADDR1;
212 regs2 = bus_alloc_resource(ahd->dev_softc, regs_type,
213 ®s_id2, 0, ~0, 1, RF_ACTIVE);
215 device_printf(ahd->dev_softc,
216 "can't allocate register resources\n");
219 ahd->tags[1] = rman_get_bustag(regs2);
220 ahd->bshs[1] = rman_get_bushandle(regs2);
221 command &= ~PCIM_CMD_MEMEN;
222 ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
223 command, /*bytes*/1);
224 ahd->platform_data->regs_res_type[1] = regs_type;
225 ahd->platform_data->regs_res_id[1] = regs_id2;
226 ahd->platform_data->regs[1] = regs2;
228 ahd->platform_data->regs_res_type[0] = regs_type;
229 ahd->platform_data->regs_res_id[0] = regs_id;
230 ahd->platform_data->regs[0] = regs;
235 ahd_pci_map_int(struct ahd_softc *ahd)
240 ahd->platform_data->irq =
241 bus_alloc_resource(ahd->dev_softc, SYS_RES_IRQ, &zero,
242 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
243 if (ahd->platform_data->irq == NULL)
245 ahd->platform_data->irq_res_type = SYS_RES_IRQ;
246 return (ahd_map_int(ahd));
250 ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
256 * Traverse the capability list looking for
257 * the power management capability.
260 cap_offset = ahd_pci_read_config(ahd->dev_softc,
261 PCIR_CAP_PTR, /*bytes*/1);
262 while (cap_offset != 0) {
264 cap = ahd_pci_read_config(ahd->dev_softc,
265 cap_offset, /*bytes*/4);
266 if ((cap & 0xFF) == 1
267 && ((cap >> 16) & 0x3) > 0) {
270 pm_control = ahd_pci_read_config(ahd->dev_softc,
274 pm_control |= new_state;
275 ahd_pci_write_config(ahd->dev_softc,
277 pm_control, /*bytes*/2);
280 cap_offset = (cap >> 8) & 0xFF;