2 * Interface for the 93C66/56/46/26/06 serial eeprom parts.
4 * Copyright (c) 1995, 1996 Daniel M. Eischen
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU Public License ("GPL").
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * $Id: //depot/src/aic7xxx/aic7xxx_93cx6.c#5 $
37 * The instruction set of the 93C66/56/46/26/06 chips are as follows:
40 * Function Bit Code Address** Data Description
41 * -------------------------------------------------------------------
42 * READ 1 10 A5 - A0 Reads data stored in memory,
43 * starting at specified address
44 * EWEN 1 00 11XXXX Write enable must preceed
45 * all programming modes
46 * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0
47 * WRITE 1 01 A5 - A0 D15 - D0 Writes register
48 * ERAL 1 00 10XXXX Erase all registers
49 * WRAL 1 00 01XXXX D15 - D0 Writes to all registers
50 * EWDS 1 00 00XXXX Disables all programming
52 * *Note: A value of X for address is a don't care condition.
53 * **Note: There are 8 address bits for the 93C56/66 chips unlike
54 * the 93C46/26/06 chips which have 6 address bits.
56 * The 93C46 has a four wire interface: clock, chip select, data in, and
57 * data out. In order to perform one of the above functions, you need
58 * to enable the chip select for a clock period (typically a minimum of
59 * 1 usec, with the clock high and low a minimum of 750 and 250 nsec
60 * respectively). While the chip select remains high, you can clock in
61 * the instructions (above) starting with the start bit, followed by the
62 * OP code, Address, and Data (if needed). For the READ instruction, the
63 * requested 16-bit register contents is read from the data out line but
64 * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
65 * first). The clock cycling from low to high initiates the next data
66 * bit to be sent from the chip.
71 #include "aic7xxx_linux.h"
72 #include "aic7xxx_inline.h"
73 #include "aic7xxx_93cx6.h"
77 #include <dev/aic7xxx/aic7xxx_freebsd.h>
78 #include <dev/aic7xxx/aic7xxx_inline.h>
79 #include <dev/aic7xxx/aic7xxx_93cx6.h>
83 * Right now, we only have to read the SEEPROM. But we make it easier to
84 * add other 93Cx6 functions.
86 static struct seeprom_cmd {
89 } seeprom_read = {3, {1, 1, 0}};
92 * Wait for the SEERDY to go high; about 800 ns.
94 #define CLOCK_PULSE(sd, rdy) \
95 while ((SEEPROM_STATUS_INB(sd) & rdy) == 0) { \
98 (void)SEEPROM_INB(sd); /* Clear clock */
101 * Read the serial EEPROM and returns 1 if successful and 0 if
105 read_seeprom(sd, buf, start_addr, count)
106 struct seeprom_descriptor *sd;
117 * Read the requested registers of the seeprom. The loop
118 * will range from 0 to count-1.
120 for (k = start_addr; k < count + start_addr; k++) {
121 /* Send chip select for one clock cycle. */
122 temp = sd->sd_MS ^ sd->sd_CS;
123 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
124 CLOCK_PULSE(sd, sd->sd_RDY);
127 * Now we're ready to send the read command followed by the
128 * address of the 16-bit register we want to read.
130 for (i = 0; i < seeprom_read.len; i++) {
131 if (seeprom_read.bits[i] != 0)
133 SEEPROM_OUTB(sd, temp);
134 CLOCK_PULSE(sd, sd->sd_RDY);
135 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
136 CLOCK_PULSE(sd, sd->sd_RDY);
137 if (seeprom_read.bits[i] != 0)
140 /* Send the 6 or 8 bit address (MSB first, LSB last). */
141 for (i = (sd->sd_chip - 1); i >= 0; i--) {
142 if ((k & (1 << i)) != 0)
144 SEEPROM_OUTB(sd, temp);
145 CLOCK_PULSE(sd, sd->sd_RDY);
146 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
147 CLOCK_PULSE(sd, sd->sd_RDY);
148 if ((k & (1 << i)) != 0)
153 * Now read the 16 bit register. An initial 0 precedes the
154 * register contents which begins with bit 15 (MSB) and ends
155 * with bit 0 (LSB). The initial 0 will be shifted off the
156 * top of our word as we let the loop run from 0 to 16.
159 for (i = 16; i >= 0; i--) {
160 SEEPROM_OUTB(sd, temp);
161 CLOCK_PULSE(sd, sd->sd_RDY);
163 if (SEEPROM_DATA_INB(sd) & sd->sd_DI)
165 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
166 CLOCK_PULSE(sd, sd->sd_RDY);
169 buf[k - start_addr] = v;
171 /* Reset the chip select for the next command cycle. */
173 SEEPROM_OUTB(sd, temp);
174 CLOCK_PULSE(sd, sd->sd_RDY);
175 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
176 CLOCK_PULSE(sd, sd->sd_RDY);
177 SEEPROM_OUTB(sd, temp);
178 CLOCK_PULSE(sd, sd->sd_RDY);
180 #ifdef AHC_DUMP_EEPROM
181 printf("\nSerial EEPROM:\n\t");
182 for (k = 0; k < count; k = k + 1) {
183 if (((k % 8) == 0) && (k != 0)) {
186 printf (" 0x%x", buf[k]);
194 verify_cksum(struct seeprom_config *sc)
201 maxaddr = (sizeof(*sc)/2) - 1;
203 scarray = (uint16_t *)sc;
205 for (i = 0; i < maxaddr; i++)
206 checksum = checksum + scarray[i];
208 || (checksum & 0xFFFF) != sc->checksum) {