sys/dev/al_eth/al_eth.c

   1 /*-
   2  * Copyright (c) 2015,2016 Annapurna Labs Ltd. and affiliates
   3  * All rights reserved.
   4  *
   5  * Developed by Semihalf.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #include <sys/param.h>
  33 #include <sys/systm.h>
  34 #include <sys/bus.h>
  35 #include <sys/kernel.h>
  36 #include <sys/kthread.h>
  37 #include <sys/lock.h>
  38 #include <sys/mbuf.h>
  39 #include <sys/malloc.h>
  40 #include <sys/module.h>
  41 #include <sys/rman.h>
  42 #include <sys/socket.h>
  43 #include <sys/sockio.h>
  44 #include <sys/sysctl.h>
  45 #include <sys/taskqueue.h>
  46
  47 #include <machine/atomic.h>
  48
  49 #include "opt_inet.h"
  50 #include "opt_inet6.h"
  51
  52 #include <net/ethernet.h>
  53 #include <net/if.h>
  54 #include <net/if_var.h>
  55 #include <net/if_arp.h>
  56 #include <net/if_dl.h>
  57 #include <net/if_media.h>
  58 #include <net/if_types.h>
  59 #include <netinet/in.h>
  60 #include <net/if_vlan_var.h>
  61 #include <netinet/tcp.h>
  62 #include <netinet/tcp_lro.h>
  63
  64 #ifdef INET
  65 #include <netinet/in.h>
  66 #include <netinet/in_systm.h>
  67 #include <netinet/in_var.h>
  68 #include <netinet/ip.h>
  69 #endif
  70
  71 #ifdef INET6
  72 #include <netinet/ip6.h>
  73 #endif
  74
  75 #include <sys/sockio.h>
  76
  77 #include <dev/pci/pcireg.h>
  78 #include <dev/pci/pcivar.h>
  79
  80 #include <dev/mii/mii.h>
  81 #include <dev/mii/miivar.h>
  82
  83 #include <al_hal_common.h>
  84 #include <al_hal_plat_services.h>
  85 #include <al_hal_udma_config.h>
  86 #include <al_hal_udma_iofic.h>
  87 #include <al_hal_udma_debug.h>
  88 #include <al_hal_eth.h>
  89
  90 #include "al_eth.h"
  91 #include "al_init_eth_lm.h"
  92 #include "arm/annapurna/alpine/alpine_serdes.h"
  93
  94 #include "miibus_if.h"
  95
  96 #define device_printf_dbg(fmt, ...) do {                                \
  97         if (AL_DBG_LEVEL >= AL_DBG_LEVEL_DBG) { AL_DBG_LOCK();          \
  98             device_printf(fmt, __VA_ARGS__); AL_DBG_UNLOCK();}          \
  99         } while (0)
 100
 101 MALLOC_DEFINE(M_IFAL, "if_al_malloc", "All allocated data for AL ETH driver");
 102
 103 /* move out to some pci header file */
 104 #define PCI_VENDOR_ID_ANNAPURNA_LABS    0x1c36
 105 #define PCI_DEVICE_ID_AL_ETH            0x0001
 106 #define PCI_DEVICE_ID_AL_ETH_ADVANCED   0x0002
 107 #define PCI_DEVICE_ID_AL_ETH_NIC        0x0003
 108 #define PCI_DEVICE_ID_AL_ETH_FPGA_NIC   0x0030
 109 #define PCI_DEVICE_ID_AL_CRYPTO         0x0011
 110 #define PCI_DEVICE_ID_AL_CRYPTO_VF      0x8011
 111 #define PCI_DEVICE_ID_AL_RAID_DMA       0x0021
 112 #define PCI_DEVICE_ID_AL_RAID_DMA_VF    0x8021
 113 #define PCI_DEVICE_ID_AL_USB            0x0041
 114
 115 #define MAC_ADDR_STR "%02x:%02x:%02x:%02x:%02x:%02x"
 116 #define MAC_ADDR(addr) addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]
 117
 118 #define AL_ETH_MAC_TABLE_UNICAST_IDX_BASE       0
 119 #define AL_ETH_MAC_TABLE_UNICAST_MAX_COUNT      4
 120 #define AL_ETH_MAC_TABLE_ALL_MULTICAST_IDX      (AL_ETH_MAC_TABLE_UNICAST_IDX_BASE + \
 121                                                  AL_ETH_MAC_TABLE_UNICAST_MAX_COUNT)
 122
 123 #define AL_ETH_MAC_TABLE_DROP_IDX               (AL_ETH_FWD_MAC_NUM - 1)
 124 #define AL_ETH_MAC_TABLE_BROADCAST_IDX          (AL_ETH_MAC_TABLE_DROP_IDX - 1)
 125
 126 #define AL_ETH_THASH_UDMA_SHIFT         0
 127 #define AL_ETH_THASH_UDMA_MASK          (0xF << AL_ETH_THASH_UDMA_SHIFT)
 128
 129 #define AL_ETH_THASH_Q_SHIFT            4
 130 #define AL_ETH_THASH_Q_MASK             (0x3 << AL_ETH_THASH_Q_SHIFT)
 131
 132 /* the following defines should be moved to hal */
 133 #define AL_ETH_FSM_ENTRY_IPV4_TCP               0
 134 #define AL_ETH_FSM_ENTRY_IPV4_UDP               1
 135 #define AL_ETH_FSM_ENTRY_IPV6_TCP               2
 136 #define AL_ETH_FSM_ENTRY_IPV6_UDP               3
 137 #define AL_ETH_FSM_ENTRY_IPV6_NO_UDP_TCP        4
 138 #define AL_ETH_FSM_ENTRY_IPV4_NO_UDP_TCP        5
 139
 140 /* FSM DATA format */
 141 #define AL_ETH_FSM_DATA_OUTER_2_TUPLE   0
 142 #define AL_ETH_FSM_DATA_OUTER_4_TUPLE   1
 143 #define AL_ETH_FSM_DATA_INNER_2_TUPLE   2
 144 #define AL_ETH_FSM_DATA_INNER_4_TUPLE   3
 145
 146 #define AL_ETH_FSM_DATA_HASH_SEL        (1 << 2)
 147
 148 #define AL_ETH_FSM_DATA_DEFAULT_Q       0
 149 #define AL_ETH_FSM_DATA_DEFAULT_UDMA    0
 150
 151 #define AL_BR_SIZE      512
 152 #define AL_TSO_SIZE     65500
 153 #define AL_DEFAULT_MTU  1500
 154
 155 #define CSUM_OFFLOAD            (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
 156
 157 #define AL_IP_ALIGNMENT_OFFSET  2
 158
 159 #define SFP_I2C_ADDR            0x50
 160
 161 #define AL_MASK_GROUP_A_INT     0x7
 162 #define AL_MASK_GROUP_B_INT     0xF
 163 #define AL_MASK_GROUP_C_INT     0xF
 164 #define AL_MASK_GROUP_D_INT     0xFFFFFFFF
 165
 166 #define AL_REG_OFFSET_FORWARD_INTR      (0x1800000 + 0x1210)
 167 #define AL_EN_FORWARD_INTR      0x1FFFF
 168 #define AL_DIS_FORWARD_INTR     0
 169
 170 #define AL_M2S_MASK_INIT        0x480
 171 #define AL_S2M_MASK_INIT        0x1E0
 172 #define AL_M2S_S2M_MASK_NOT_INT (0x3f << 25)
 173
 174 #define AL_10BASE_T_SPEED       10
 175 #define AL_100BASE_TX_SPEED     100
 176 #define AL_1000BASE_T_SPEED     1000
 177
 178 static devclass_t al_devclass;
 179
 180 #define AL_RX_LOCK_INIT(_sc)    mtx_init(&((_sc)->if_rx_lock), "ALRXL", "ALRXL", MTX_DEF)
 181 #define AL_RX_LOCK(_sc)         mtx_lock(&((_sc)->if_rx_lock))
 182 #define AL_RX_UNLOCK(_sc)       mtx_unlock(&((_sc)->if_rx_lock))
 183
 184 /* helper functions */
 185 static int al_is_device_supported(device_t);
 186
 187 static void al_eth_init_rings(struct al_eth_adapter *);
 188 static void al_eth_flow_ctrl_disable(struct al_eth_adapter *);
 189 int al_eth_fpga_read_pci_config(void *, int, uint32_t *);
 190 int al_eth_fpga_write_pci_config(void *, int, uint32_t);
 191 int al_eth_read_pci_config(void *, int, uint32_t *);
 192 int al_eth_write_pci_config(void *, int, uint32_t);
 193 void al_eth_irq_config(uint32_t *, uint32_t);
 194 void al_eth_forward_int_config(uint32_t *, uint32_t);
 195 static void al_eth_start_xmit(void *, int);
 196 static void al_eth_rx_recv_work(void *, int);
 197 static int al_eth_up(struct al_eth_adapter *);
 198 static void al_eth_down(struct al_eth_adapter *);
 199 static void al_eth_interrupts_unmask(struct al_eth_adapter *);
 200 static void al_eth_interrupts_mask(struct al_eth_adapter *);
 201 static int al_eth_check_mtu(struct al_eth_adapter *, int);
 202 static uint64_t al_get_counter(struct ifnet *, ift_counter);
 203 static void al_eth_req_rx_buff_size(struct al_eth_adapter *, int);
 204 static int al_eth_board_params_init(struct al_eth_adapter *);
 205 static int al_media_update(struct ifnet *);
 206 static void al_media_status(struct ifnet *, struct ifmediareq *);
 207 static int al_eth_function_reset(struct al_eth_adapter *);
 208 static int al_eth_hw_init_adapter(struct al_eth_adapter *);
 209 static void al_eth_serdes_init(struct al_eth_adapter *);
 210 static void al_eth_lm_config(struct al_eth_adapter *);
 211 static int al_eth_hw_init(struct al_eth_adapter *);
 212
 213 static void al_tick_stats(void *);
 214
 215 /* ifnet entry points */
 216 static void al_init(void *);
 217 static int al_mq_start(struct ifnet *, struct mbuf *);
 218 static void al_qflush(struct ifnet *);
 219 static int al_ioctl(struct ifnet * ifp, u_long, caddr_t);
 220
 221 /* bus entry points */
 222 static int al_probe(device_t);
 223 static int al_attach(device_t);
 224 static int al_detach(device_t);
 225 static int al_shutdown(device_t);
 226
 227 /* mii bus support routines */
 228 static int al_miibus_readreg(device_t, int, int);
 229 static int al_miibus_writereg(device_t, int, int, int);
 230 static void al_miibus_statchg(device_t);
 231 static void al_miibus_linkchg(device_t);
 232
 233 struct al_eth_adapter* g_adapters[16];
 234 uint32_t g_adapters_count;
 235
 236 /* flag for napi-like mbuf processing, controlled from sysctl */
 237 static int napi = 0;
 238
 239 static device_method_t al_methods[] = {
 240         /* Device interface */
 241         DEVMETHOD(device_probe,         al_probe),
 242         DEVMETHOD(device_attach,        al_attach),
 243         DEVMETHOD(device_detach,        al_detach),
 244         DEVMETHOD(device_shutdown,      al_shutdown),
 245
 246         DEVMETHOD(miibus_readreg,       al_miibus_readreg),
 247         DEVMETHOD(miibus_writereg,      al_miibus_writereg),
 248         DEVMETHOD(miibus_statchg,       al_miibus_statchg),
 249         DEVMETHOD(miibus_linkchg,       al_miibus_linkchg),
 250         { 0, 0 }
 251 };
 252
 253 static driver_t al_driver = {
 254         "al",
 255         al_methods,
 256         sizeof(struct al_eth_adapter),
 257 };
 258
 259 DRIVER_MODULE(al, pci, al_driver, al_devclass, 0, 0);
 260 DRIVER_MODULE(miibus, al, miibus_driver, miibus_devclass, 0, 0);
 261
 262 static int
 263 al_probe(device_t dev)
 264 {
 265         if ((al_is_device_supported(dev)) != 0) {
 266                 device_set_desc(dev, "al");
 267                 return (BUS_PROBE_DEFAULT);
 268         }
 269         return (ENXIO);
 270 }
 271
 272 static int
 273 al_attach(device_t dev)
 274 {
 275         struct al_eth_adapter *adapter;
 276         struct sysctl_oid_list *child;
 277         struct sysctl_ctx_list *ctx;
 278         struct sysctl_oid *tree;
 279         struct ifnet *ifp;
 280         uint32_t dev_id;
 281         uint32_t rev_id;
 282         int bar_udma;
 283         int bar_mac;
 284         int bar_ec;
 285         int err;
 286
 287         err = 0;
 288         ifp = NULL;
 289         dev_id = rev_id = 0;
 290         ctx = device_get_sysctl_ctx(dev);
 291         tree = SYSCTL_PARENT(device_get_sysctl_tree(dev));
 292         child = SYSCTL_CHILDREN(tree);
 293
 294         if (g_adapters_count == 0) {
 295                 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "napi",
 296                     CTLFLAG_RW, &napi, 0, "Use pseudo-napi mechanism");
 297         }
 298         adapter = device_get_softc(dev);
 299         adapter->dev = dev;
 300         adapter->board_type = ALPINE_INTEGRATED;
 301         snprintf(adapter->name, AL_ETH_NAME_MAX_LEN, "%s",
 302             device_get_nameunit(dev));
 303         AL_RX_LOCK_INIT(adapter);
 304
 305         g_adapters[g_adapters_count] = adapter;
 306
 307         bar_udma = PCIR_BAR(AL_ETH_UDMA_BAR);
 308         adapter->udma_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 309             &bar_udma, RF_ACTIVE);
 310         if (adapter->udma_res == NULL) {
 311                 device_printf(adapter->dev,
 312                     "could not allocate memory resources for DMA.\n");
 313                 err = ENOMEM;
 314                 goto err_res_dma;
 315         }
 316         adapter->udma_base = al_bus_dma_to_va(rman_get_bustag(adapter->udma_res),
 317             rman_get_bushandle(adapter->udma_res));
 318         bar_mac = PCIR_BAR(AL_ETH_MAC_BAR);
 319         adapter->mac_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 320             &bar_mac, RF_ACTIVE);
 321         if (adapter->mac_res == NULL) {
 322                 device_printf(adapter->dev,
 323                     "could not allocate memory resources for MAC.\n");
 324                 err = ENOMEM;
 325                 goto err_res_mac;
 326         }
 327         adapter->mac_base = al_bus_dma_to_va(rman_get_bustag(adapter->mac_res),
 328             rman_get_bushandle(adapter->mac_res));
 329
 330         bar_ec = PCIR_BAR(AL_ETH_EC_BAR);
 331         adapter->ec_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &bar_ec,
 332             RF_ACTIVE);
 333         if (adapter->ec_res == NULL) {
 334                 device_printf(adapter->dev,
 335                     "could not allocate memory resources for EC.\n");
 336                 err = ENOMEM;
 337                 goto err_res_ec;
 338         }
 339         adapter->ec_base = al_bus_dma_to_va(rman_get_bustag(adapter->ec_res),
 340             rman_get_bushandle(adapter->ec_res));
 341
 342         adapter->netdev = ifp = if_alloc(IFT_ETHER);
 343
 344         adapter->netdev->if_link_state = LINK_STATE_DOWN;
 345
 346         ifp->if_softc = adapter;
 347         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 348         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 349         ifp->if_flags = ifp->if_drv_flags;
 350         ifp->if_flags |= IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | IFF_ALLMULTI;
 351         ifp->if_transmit = al_mq_start;
 352         ifp->if_qflush = al_qflush;
 353         ifp->if_ioctl = al_ioctl;
 354         ifp->if_init = al_init;
 355         ifp->if_get_counter = al_get_counter;
 356         ifp->if_mtu = AL_DEFAULT_MTU;
 357
 358         adapter->if_flags = ifp->if_flags;
 359
 360         ifp->if_capabilities = ifp->if_capenable = 0;
 361
 362         ifp->if_capabilities |= IFCAP_HWCSUM |
 363             IFCAP_HWCSUM_IPV6 | IFCAP_TSO |
 364             IFCAP_LRO | IFCAP_JUMBO_MTU;
 365
 366         ifp->if_capenable = ifp->if_capabilities;
 367
 368         adapter->id_number = g_adapters_count;
 369
 370         if (adapter->board_type == ALPINE_INTEGRATED) {
 371                 dev_id = pci_get_device(adapter->dev);
 372                 rev_id = pci_get_revid(adapter->dev);
 373         } else {
 374                 al_eth_fpga_read_pci_config(adapter->internal_pcie_base,
 375                     PCIR_DEVICE, &dev_id);
 376                 al_eth_fpga_read_pci_config(adapter->internal_pcie_base,
 377                     PCIR_REVID, &rev_id);
 378         }
 379
 380         adapter->dev_id = dev_id;
 381         adapter->rev_id = rev_id;
 382
 383         /* set default ring sizes */
 384         adapter->tx_ring_count = AL_ETH_DEFAULT_TX_SW_DESCS;
 385         adapter->tx_descs_count = AL_ETH_DEFAULT_TX_HW_DESCS;
 386         adapter->rx_ring_count = AL_ETH_DEFAULT_RX_DESCS;
 387         adapter->rx_descs_count = AL_ETH_DEFAULT_RX_DESCS;
 388
 389         adapter->num_tx_queues = AL_ETH_NUM_QUEUES;
 390         adapter->num_rx_queues = AL_ETH_NUM_QUEUES;
 391
 392         adapter->small_copy_len = AL_ETH_DEFAULT_SMALL_PACKET_LEN;
 393         adapter->link_poll_interval = AL_ETH_DEFAULT_LINK_POLL_INTERVAL;
 394         adapter->max_rx_buff_alloc_size = AL_ETH_DEFAULT_MAX_RX_BUFF_ALLOC_SIZE;
 395
 396         al_eth_req_rx_buff_size(adapter, adapter->netdev->if_mtu);
 397
 398         adapter->link_config.force_1000_base_x = AL_ETH_DEFAULT_FORCE_1000_BASEX;
 399
 400         err = al_eth_board_params_init(adapter);
 401         if (err != 0)
 402                 goto err;
 403
 404         if (adapter->mac_mode == AL_ETH_MAC_MODE_10GbE_Serial) {
 405                 ifmedia_init(&adapter->media, IFM_IMASK,
 406                     al_media_update, al_media_status);
 407                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_LX, 0, NULL);
 408                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10G_LR, 0, NULL);
 409                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
 410                 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
 411         }
 412
 413         al_eth_function_reset(adapter);
 414
 415         err = al_eth_hw_init_adapter(adapter);
 416         if (err != 0)
 417                 goto err;
 418
 419         al_eth_init_rings(adapter);
 420         g_adapters_count++;
 421
 422         al_eth_lm_config(adapter);
 423         mtx_init(&adapter->stats_mtx, "AlStatsMtx", NULL, MTX_DEF);
 424         mtx_init(&adapter->wd_mtx, "AlWdMtx", NULL, MTX_DEF);
 425         callout_init_mtx(&adapter->stats_callout, &adapter->stats_mtx, 0);
 426         callout_init_mtx(&adapter->wd_callout, &adapter->wd_mtx, 0);
 427
 428         ether_ifattach(ifp, adapter->mac_addr);
 429         ifp->if_mtu = AL_DEFAULT_MTU;
 430
 431         if (adapter->mac_mode == AL_ETH_MAC_MODE_RGMII) {
 432                 al_eth_hw_init(adapter);
 433
 434                 /* Attach PHY(s) */
 435                 err = mii_attach(adapter->dev, &adapter->miibus, adapter->netdev,
 436                     al_media_update, al_media_status, BMSR_DEFCAPMASK, 0,
 437                     MII_OFFSET_ANY, 0);
 438                 if (err != 0) {
 439                         device_printf(adapter->dev, "attaching PHYs failed\n");
 440                         return (err);
 441                 }
 442
 443                 adapter->mii = device_get_softc(adapter->miibus);
 444         }
 445
 446         return (err);
 447
 448 err:
 449         bus_release_resource(dev, SYS_RES_MEMORY, bar_ec, adapter->ec_res);
 450 err_res_ec:
 451         bus_release_resource(dev, SYS_RES_MEMORY, bar_mac, adapter->mac_res);
 452 err_res_mac:
 453         bus_release_resource(dev, SYS_RES_MEMORY, bar_udma, adapter->udma_res);
 454 err_res_dma:
 455         return (err);
 456 }
 457
 458 static int
 459 al_detach(device_t dev)
 460 {
 461         struct al_eth_adapter *adapter;
 462
 463         adapter = device_get_softc(dev);
 464         ether_ifdetach(adapter->netdev);
 465
 466         mtx_destroy(&adapter->stats_mtx);
 467         mtx_destroy(&adapter->wd_mtx);
 468
 469         al_eth_down(adapter);
 470
 471         bus_release_resource(dev, SYS_RES_IRQ,    0, adapter->irq_res);
 472         bus_release_resource(dev, SYS_RES_MEMORY, 0, adapter->ec_res);
 473         bus_release_resource(dev, SYS_RES_MEMORY, 0, adapter->mac_res);
 474         bus_release_resource(dev, SYS_RES_MEMORY, 0, adapter->udma_res);
 475
 476         return (0);
 477 }
 478
 479 int
 480 al_eth_fpga_read_pci_config(void *handle, int where, uint32_t *val)
 481 {
 482
 483         /* handle is the base address of the adapter */
 484         *val = al_reg_read32((void*)((u_long)handle + where));
 485
 486         return (0);
 487 }
 488
 489 int
 490 al_eth_fpga_write_pci_config(void *handle, int where, uint32_t val)
 491 {
 492
 493         /* handle is the base address of the adapter */
 494         al_reg_write32((void*)((u_long)handle + where), val);
 495         return (0);
 496 }
 497
 498 int
 499 al_eth_read_pci_config(void *handle, int where, uint32_t *val)
 500 {
 501
 502         /* handle is a pci_dev */
 503         *val = pci_read_config((device_t)handle, where, sizeof(*val));
 504         return (0);
 505 }
 506
 507 int
 508 al_eth_write_pci_config(void *handle, int where, uint32_t val)
 509 {
 510
 511         /* handle is a pci_dev */
 512         pci_write_config((device_t)handle, where, val, sizeof(val));
 513         return (0);
 514 }
 515
 516 void
 517 al_eth_irq_config(uint32_t *offset, uint32_t value)
 518 {
 519
 520         al_reg_write32_relaxed(offset, value);
 521 }
 522
 523 void
 524 al_eth_forward_int_config(uint32_t *offset, uint32_t value)
 525 {
 526
 527         al_reg_write32(offset, value);
 528 }
 529
 530 static void
 531 al_eth_serdes_init(struct al_eth_adapter *adapter)
 532 {
 533         void __iomem    *serdes_base;
 534
 535         adapter->serdes_init = false;
 536
 537         serdes_base = alpine_serdes_resource_get(adapter->serdes_grp);
 538         if (serdes_base == NULL) {
 539                 device_printf(adapter->dev, "serdes_base get failed!\n");
 540                 return;
 541         }
 542
 543         serdes_base = al_bus_dma_to_va(serdes_tag, serdes_base);
 544
 545         al_serdes_handle_grp_init(serdes_base, adapter->serdes_grp,
 546             &adapter->serdes_obj);
 547
 548         adapter->serdes_init = true;
 549 }
 550
 551 static void
 552 al_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
 553 {
 554         bus_addr_t *paddr;
 555
 556         paddr = arg;
 557         *paddr = segs->ds_addr;
 558 }
 559
 560 static int
 561 al_dma_alloc_coherent(struct device *dev, bus_dma_tag_t *tag, bus_dmamap_t *map,
 562     bus_addr_t *baddr, void **vaddr, uint32_t size)
 563 {
 564         int ret;
 565         uint32_t maxsize = ((size - 1)/PAGE_SIZE + 1) * PAGE_SIZE;
 566
 567         ret = bus_dma_tag_create(bus_get_dma_tag(dev), 8, 0,
 568             BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL,
 569             maxsize, 1, maxsize, BUS_DMA_COHERENT, NULL, NULL, tag);
 570         if (ret != 0) {
 571                 device_printf(dev,
 572                     "failed to create bus tag, ret = %d\n", ret);
 573                 return (ret);
 574         }
 575
 576         ret = bus_dmamem_alloc(*tag, vaddr,
 577             BUS_DMA_COHERENT | BUS_DMA_ZERO, map);
 578         if (ret != 0) {
 579                 device_printf(dev,
 580                     "failed to allocate dmamem, ret = %d\n", ret);
 581                 return (ret);
 582         }
 583
 584         ret = bus_dmamap_load(*tag, *map, *vaddr,
 585             size, al_dma_map_addr, baddr, 0);
 586         if (ret != 0) {
 587                 device_printf(dev,
 588                     "failed to allocate bus_dmamap_load, ret = %d\n", ret);
 589                 return (ret);
 590         }
 591
 592         return (0);
 593 }
 594
 595 static void
 596 al_dma_free_coherent(bus_dma_tag_t tag, bus_dmamap_t map, void *vaddr)
 597 {
 598
 599         bus_dmamap_unload(tag, map);
 600         bus_dmamem_free(tag, vaddr, map);
 601         bus_dma_tag_destroy(tag);
 602 }
 603
 604 static void
 605 al_eth_mac_table_unicast_add(struct al_eth_adapter *adapter,
 606     uint8_t idx, uint8_t *addr, uint8_t udma_mask)
 607 {
 608         struct al_eth_fwd_mac_table_entry entry = { { 0 } };
 609
 610         memcpy(entry.addr, adapter->mac_addr, sizeof(adapter->mac_addr));
 611
 612         memset(entry.mask, 0xff, sizeof(entry.mask));
 613         entry.rx_valid = true;
 614         entry.tx_valid = false;
 615         entry.udma_mask = udma_mask;
 616         entry.filter = false;
 617
 618         device_printf_dbg(adapter->dev,
 619             "%s: [%d]: addr "MAC_ADDR_STR" mask "MAC_ADDR_STR"\n",
 620             __func__, idx, MAC_ADDR(entry.addr), MAC_ADDR(entry.mask));
 621
 622         al_eth_fwd_mac_table_set(&adapter->hal_adapter, idx, &entry);
 623 }
 624
 625 static void
 626 al_eth_mac_table_all_multicast_add(struct al_eth_adapter *adapter, uint8_t idx,
 627     uint8_t udma_mask)
 628 {
 629         struct al_eth_fwd_mac_table_entry entry = { { 0 } };
 630
 631         memset(entry.addr, 0x00, sizeof(entry.addr));
 632         memset(entry.mask, 0x00, sizeof(entry.mask));
 633         entry.mask[0] |= 1;
 634         entry.addr[0] |= 1;
 635
 636         entry.rx_valid = true;
 637         entry.tx_valid = false;
 638         entry.udma_mask = udma_mask;
 639         entry.filter = false;
 640
 641         device_printf_dbg(adapter->dev,
 642             "%s: [%d]: addr "MAC_ADDR_STR" mask "MAC_ADDR_STR"\n",
 643             __func__, idx, MAC_ADDR(entry.addr), MAC_ADDR(entry.mask));
 644
 645         al_eth_fwd_mac_table_set(&adapter->hal_adapter, idx, &entry);
 646 }
 647
 648 static void
 649 al_eth_mac_table_broadcast_add(struct al_eth_adapter *adapter,
 650     uint8_t idx, uint8_t udma_mask)
 651 {
 652         struct al_eth_fwd_mac_table_entry entry = { { 0 } };
 653
 654         memset(entry.addr, 0xff, sizeof(entry.addr));
 655         memset(entry.mask, 0xff, sizeof(entry.mask));
 656
 657         entry.rx_valid = true;
 658         entry.tx_valid = false;
 659         entry.udma_mask = udma_mask;
 660         entry.filter = false;
 661
 662         device_printf_dbg(adapter->dev,
 663             "%s: [%d]: addr "MAC_ADDR_STR" mask "MAC_ADDR_STR"\n",
 664             __func__, idx, MAC_ADDR(entry.addr), MAC_ADDR(entry.mask));
 665
 666         al_eth_fwd_mac_table_set(&adapter->hal_adapter, idx, &entry);
 667 }
 668
 669 static void
 670 al_eth_mac_table_promiscuous_set(struct al_eth_adapter *adapter,
 671     boolean_t promiscuous)
 672 {
 673         struct al_eth_fwd_mac_table_entry entry = { { 0 } };
 674
 675         memset(entry.addr, 0x00, sizeof(entry.addr));
 676         memset(entry.mask, 0x00, sizeof(entry.mask));
 677
 678         entry.rx_valid = true;
 679         entry.tx_valid = false;
 680         entry.udma_mask = (promiscuous) ? 1 : 0;
 681         entry.filter = (promiscuous) ? false : true;
 682
 683         device_printf_dbg(adapter->dev, "%s: %s promiscuous mode\n",
 684             __func__, (promiscuous) ? "enter" : "exit");
 685
 686         al_eth_fwd_mac_table_set(&adapter->hal_adapter,
 687             AL_ETH_MAC_TABLE_DROP_IDX, &entry);
 688 }
 689
 690 static void
 691 al_eth_set_thash_table_entry(struct al_eth_adapter *adapter, uint8_t idx,
 692     uint8_t udma, uint32_t queue)
 693 {
 694
 695         if (udma != 0)
 696                 panic("only UDMA0 is supporter");
 697
 698         if (queue >= AL_ETH_NUM_QUEUES)
 699                 panic("invalid queue number");
 700
 701         al_eth_thash_table_set(&adapter->hal_adapter, idx, udma, queue);
 702 }
 703
 704 /* init FSM, no tunneling supported yet, if packet is tcp/udp over ipv4/ipv6, use 4 tuple hash */
 705 static void
 706 al_eth_fsm_table_init(struct al_eth_adapter *adapter)
 707 {
 708         uint32_t val;
 709         int i;
 710
 711         for (i = 0; i < AL_ETH_RX_FSM_TABLE_SIZE; i++) {
 712                 uint8_t outer_type = AL_ETH_FSM_ENTRY_OUTER(i);
 713                 switch (outer_type) {
 714                 case AL_ETH_FSM_ENTRY_IPV4_TCP:
 715                 case AL_ETH_FSM_ENTRY_IPV4_UDP:
 716                 case AL_ETH_FSM_ENTRY_IPV6_TCP:
 717                 case AL_ETH_FSM_ENTRY_IPV6_UDP:
 718                         val = AL_ETH_FSM_DATA_OUTER_4_TUPLE |
 719                             AL_ETH_FSM_DATA_HASH_SEL;
 720                         break;
 721                 case AL_ETH_FSM_ENTRY_IPV6_NO_UDP_TCP:
 722                 case AL_ETH_FSM_ENTRY_IPV4_NO_UDP_TCP:
 723                         val = AL_ETH_FSM_DATA_OUTER_2_TUPLE |
 724                             AL_ETH_FSM_DATA_HASH_SEL;
 725                         break;
 726                 default:
 727                         val = AL_ETH_FSM_DATA_DEFAULT_Q |
 728                             AL_ETH_FSM_DATA_DEFAULT_UDMA;
 729                 }
 730                 al_eth_fsm_table_set(&adapter->hal_adapter, i, val);
 731         }
 732 }
 733
 734 static void
 735 al_eth_mac_table_entry_clear(struct al_eth_adapter *adapter,
 736     uint8_t idx)
 737 {
 738         struct al_eth_fwd_mac_table_entry entry = { { 0 } };
 739
 740         device_printf_dbg(adapter->dev, "%s: clear entry %d\n", __func__, idx);
 741
 742         al_eth_fwd_mac_table_set(&adapter->hal_adapter, idx, &entry);
 743 }
 744
 745 static int
 746 al_eth_hw_init_adapter(struct al_eth_adapter *adapter)
 747 {
 748         struct al_eth_adapter_params *params = &adapter->eth_hal_params;
 749         int rc;
 750
 751         /* params->dev_id = adapter->dev_id; */
 752         params->rev_id = adapter->rev_id;
 753         params->udma_id = 0;
 754         params->enable_rx_parser = 1; /* enable rx epe parser*/
 755         params->udma_regs_base = adapter->udma_base; /* UDMA register base address */
 756         params->ec_regs_base = adapter->ec_base; /* Ethernet controller registers base address */
 757         params->mac_regs_base = adapter->mac_base; /* Ethernet MAC registers base address */
 758         params->name = adapter->name;
 759         params->serdes_lane = adapter->serdes_lane;
 760
 761         rc = al_eth_adapter_init(&adapter->hal_adapter, params);
 762         if (rc != 0)
 763                 device_printf(adapter->dev, "%s failed at hal init!\n",
 764                     __func__);
 765
 766         if ((adapter->board_type == ALPINE_NIC) ||
 767             (adapter->board_type == ALPINE_FPGA_NIC)) {
 768                 /* in pcie NIC mode, force eth UDMA to access PCIE0 using the vmid */
 769                 struct al_udma_gen_tgtid_conf conf;
 770                 int i;
 771                 for (i = 0; i < DMA_MAX_Q; i++) {
 772                         conf.tx_q_conf[i].queue_en = AL_TRUE;
 773                         conf.tx_q_conf[i].desc_en = AL_FALSE;
 774                         conf.tx_q_conf[i].tgtid = 0x100; /* for access from PCIE0 */
 775                         conf.rx_q_conf[i].queue_en = AL_TRUE;
 776                         conf.rx_q_conf[i].desc_en = AL_FALSE;
 777                         conf.rx_q_conf[i].tgtid = 0x100; /* for access from PCIE0 */
 778                 }
 779                 al_udma_gen_tgtid_conf_set(adapter->udma_base, &conf);
 780         }
 781
 782         return (rc);
 783 }
 784
 785 static void
 786 al_eth_lm_config(struct al_eth_adapter *adapter)
 787 {
 788         struct al_eth_lm_init_params params = {0};
 789
 790         params.adapter = &adapter->hal_adapter;
 791         params.serdes_obj = &adapter->serdes_obj;
 792         params.lane = adapter->serdes_lane;
 793         params.sfp_detection = adapter->sfp_detection_needed;
 794         if (adapter->sfp_detection_needed == true) {
 795                 params.sfp_bus_id = adapter->i2c_adapter_id;
 796                 params.sfp_i2c_addr = SFP_I2C_ADDR;
 797         }
 798
 799         if (adapter->sfp_detection_needed == false) {
 800                 switch (adapter->mac_mode) {
 801                 case AL_ETH_MAC_MODE_10GbE_Serial:
 802                         if ((adapter->lt_en != 0) && (adapter->an_en != 0))
 803                                 params.default_mode = AL_ETH_LM_MODE_10G_DA;
 804                         else
 805                                 params.default_mode = AL_ETH_LM_MODE_10G_OPTIC;
 806                         break;
 807                 case AL_ETH_MAC_MODE_SGMII:
 808                         params.default_mode = AL_ETH_LM_MODE_1G;
 809                         break;
 810                 default:
 811                         params.default_mode = AL_ETH_LM_MODE_10G_DA;
 812                 }
 813         } else
 814                 params.default_mode = AL_ETH_LM_MODE_10G_DA;
 815
 816         params.link_training = adapter->lt_en;
 817         params.rx_equal = true;
 818         params.static_values = !adapter->dont_override_serdes;
 819         params.i2c_context = adapter;
 820         params.kr_fec_enable = false;
 821
 822         params.retimer_exist = adapter->retimer.exist;
 823         params.retimer_bus_id = adapter->retimer.bus_id;
 824         params.retimer_i2c_addr = adapter->retimer.i2c_addr;
 825         params.retimer_channel = adapter->retimer.channel;
 826
 827         al_eth_lm_init(&adapter->lm_context, &params);
 828 }
 829
 830 static int
 831 al_eth_board_params_init(struct al_eth_adapter *adapter)
 832 {
 833
 834         if (adapter->board_type == ALPINE_NIC) {
 835                 adapter->mac_mode = AL_ETH_MAC_MODE_10GbE_Serial;
 836                 adapter->sfp_detection_needed = false;
 837                 adapter->phy_exist = false;
 838                 adapter->an_en = false;
 839                 adapter->lt_en = false;
 840                 adapter->ref_clk_freq = AL_ETH_REF_FREQ_375_MHZ;
 841                 adapter->mdio_freq = AL_ETH_DEFAULT_MDIO_FREQ_KHZ;
 842         } else if (adapter->board_type == ALPINE_FPGA_NIC) {
 843                 adapter->mac_mode = AL_ETH_MAC_MODE_SGMII;
 844                 adapter->sfp_detection_needed = false;
 845                 adapter->phy_exist = false;
 846                 adapter->an_en = false;
 847                 adapter->lt_en = false;
 848                 adapter->ref_clk_freq = AL_ETH_REF_FREQ_375_MHZ;
 849                 adapter->mdio_freq = AL_ETH_DEFAULT_MDIO_FREQ_KHZ;
 850         } else {
 851                 struct al_eth_board_params params;
 852                 int rc;
 853
 854                 adapter->auto_speed = false;
 855
 856                 rc = al_eth_board_params_get(adapter->mac_base, &params);
 857                 if (rc != 0) {
 858                         device_printf(adapter->dev,
 859                             "board info not available\n");
 860                         return (-1);
 861                 }
 862
 863                 adapter->phy_exist = params.phy_exist == TRUE;
 864                 adapter->phy_addr = params.phy_mdio_addr;
 865                 adapter->an_en = params.autoneg_enable;
 866                 adapter->lt_en = params.kr_lt_enable;
 867                 adapter->serdes_grp = params.serdes_grp;
 868                 adapter->serdes_lane = params.serdes_lane;
 869                 adapter->sfp_detection_needed = params.sfp_plus_module_exist;
 870                 adapter->i2c_adapter_id = params.i2c_adapter_id;
 871                 adapter->ref_clk_freq = params.ref_clk_freq;
 872                 adapter->dont_override_serdes = params.dont_override_serdes;
 873                 adapter->link_config.active_duplex = !params.half_duplex;
 874                 adapter->link_config.autoneg = !params.an_disable;
 875                 adapter->link_config.force_1000_base_x = params.force_1000_base_x;
 876                 adapter->retimer.exist = params.retimer_exist;
 877                 adapter->retimer.bus_id = params.retimer_bus_id;
 878                 adapter->retimer.i2c_addr = params.retimer_i2c_addr;
 879                 adapter->retimer.channel = params.retimer_channel;
 880
 881                 switch (params.speed) {
 882                 default:
 883                         device_printf(adapter->dev,
 884                             "%s: invalid speed (%d)\n", __func__, params.speed);
 885                 case AL_ETH_BOARD_1G_SPEED_1000M:
 886                         adapter->link_config.active_speed = 1000;
 887                         break;
 888                 case AL_ETH_BOARD_1G_SPEED_100M:
 889                         adapter->link_config.active_speed = 100;
 890                         break;
 891                 case AL_ETH_BOARD_1G_SPEED_10M:
 892                         adapter->link_config.active_speed = 10;
 893                         break;
 894                 }
 895
 896                 switch (params.mdio_freq) {
 897                 default:
 898                         device_printf(adapter->dev,
 899                             "%s: invalid mdio freq (%d)\n", __func__,
 900                             params.mdio_freq);
 901                 case AL_ETH_BOARD_MDIO_FREQ_2_5_MHZ:
 902                         adapter->mdio_freq = AL_ETH_DEFAULT_MDIO_FREQ_KHZ;
 903                         break;
 904                 case AL_ETH_BOARD_MDIO_FREQ_1_MHZ:
 905                         adapter->mdio_freq = AL_ETH_MDIO_FREQ_1000_KHZ;
 906                         break;
 907                 }
 908
 909                 switch (params.media_type) {
 910                 case AL_ETH_BOARD_MEDIA_TYPE_RGMII:
 911                         if (params.sfp_plus_module_exist == TRUE)
 912                                 /* Backward compatibility */
 913                                 adapter->mac_mode = AL_ETH_MAC_MODE_SGMII;
 914                         else
 915                                 adapter->mac_mode = AL_ETH_MAC_MODE_RGMII;
 916
 917                         adapter->use_lm = false;
 918                         break;
 919                 case AL_ETH_BOARD_MEDIA_TYPE_SGMII:
 920                         adapter->mac_mode = AL_ETH_MAC_MODE_SGMII;
 921                         adapter->use_lm = true;
 922                         break;
 923                 case AL_ETH_BOARD_MEDIA_TYPE_10GBASE_SR:
 924                         adapter->mac_mode = AL_ETH_MAC_MODE_10GbE_Serial;
 925                         adapter->use_lm = true;
 926                         break;
 927                 case AL_ETH_BOARD_MEDIA_TYPE_AUTO_DETECT:
 928                         adapter->sfp_detection_needed = TRUE;
 929                         adapter->auto_speed = false;
 930                         adapter->use_lm = true;
 931                         break;
 932                 case AL_ETH_BOARD_MEDIA_TYPE_AUTO_DETECT_AUTO_SPEED:
 933                         adapter->sfp_detection_needed = TRUE;
 934                         adapter->auto_speed = true;
 935                         adapter->mac_mode_set = false;
 936                         adapter->use_lm = true;
 937
 938                         adapter->mac_mode = AL_ETH_MAC_MODE_10GbE_Serial;
 939                         break;
 940                 default:
 941                         device_printf(adapter->dev,
 942                             "%s: unsupported media type %d\n",
 943                             __func__, params.media_type);
 944                         return (-1);
 945                 }
 946
 947                 device_printf(adapter->dev,
 948                     "Board info: phy exist %s. phy addr %d. mdio freq %u Khz. "
 949                     "SFP connected %s. media %d\n",
 950                     params.phy_exist == TRUE ? "Yes" : "No",
 951                     params.phy_mdio_addr, adapter->mdio_freq,
 952                     params.sfp_plus_module_exist == TRUE ? "Yes" : "No",
 953                     params.media_type);
 954         }
 955
 956         al_eth_mac_addr_read(adapter->ec_base, 0, adapter->mac_addr);
 957
 958         return (0);
 959 }
 960
 961 static int
 962 al_eth_function_reset(struct al_eth_adapter *adapter)
 963 {
 964         struct al_eth_board_params params;
 965         int rc;
 966
 967         /* save board params so we restore it after reset */
 968         al_eth_board_params_get(adapter->mac_base, &params);
 969         al_eth_mac_addr_read(adapter->ec_base, 0, adapter->mac_addr);
 970         if (adapter->board_type == ALPINE_INTEGRATED)
 971                 rc = al_eth_flr_rmn(&al_eth_read_pci_config,
 972                     &al_eth_write_pci_config,
 973                     adapter->dev, adapter->mac_base);
 974         else
 975                 rc = al_eth_flr_rmn(&al_eth_fpga_read_pci_config,
 976                     &al_eth_fpga_write_pci_config,
 977                     adapter->internal_pcie_base, adapter->mac_base);
 978
 979         /* restore params */
 980         al_eth_board_params_set(adapter->mac_base, &params);
 981         al_eth_mac_addr_store(adapter->ec_base, 0, adapter->mac_addr);
 982
 983         return (rc);
 984 }
 985
 986 static void
 987 al_eth_init_rings(struct al_eth_adapter *adapter)
 988 {
 989         int i;
 990
 991         for (i = 0; i < adapter->num_tx_queues; i++) {
 992                 struct al_eth_ring *ring = &adapter->tx_ring[i];
 993
 994                 ring->ring_id = i;
 995                 ring->dev = adapter->dev;
 996                 ring->adapter = adapter;
 997                 ring->netdev = adapter->netdev;
 998                 al_udma_q_handle_get(&adapter->hal_adapter.tx_udma, i,
 999                     &ring->dma_q);
1000                 ring->sw_count = adapter->tx_ring_count;
1001                 ring->hw_count = adapter->tx_descs_count;
1002                 ring->unmask_reg_offset = al_udma_iofic_unmask_offset_get((struct unit_regs *)adapter->udma_base, AL_UDMA_IOFIC_LEVEL_PRIMARY, AL_INT_GROUP_C);
1003                 ring->unmask_val = ~(1 << i);
1004         }
1005
1006         for (i = 0; i < adapter->num_rx_queues; i++) {
1007                 struct al_eth_ring *ring = &adapter->rx_ring[i];
1008
1009                 ring->ring_id = i;
1010                 ring->dev = adapter->dev;
1011                 ring->adapter = adapter;
1012                 ring->netdev = adapter->netdev;
1013                 al_udma_q_handle_get(&adapter->hal_adapter.rx_udma, i, &ring->dma_q);
1014                 ring->sw_count = adapter->rx_ring_count;
1015                 ring->hw_count = adapter->rx_descs_count;
1016                 ring->unmask_reg_offset = al_udma_iofic_unmask_offset_get(
1017                     (struct unit_regs *)adapter->udma_base,
1018                     AL_UDMA_IOFIC_LEVEL_PRIMARY, AL_INT_GROUP_B);
1019                 ring->unmask_val = ~(1 << i);
1020         }
1021 }
1022
1023 static void
1024 al_init_locked(void *arg)
1025 {
1026         struct al_eth_adapter *adapter = arg;
1027         if_t ifp = adapter->netdev;
1028         int rc = 0;
1029
1030         al_eth_down(adapter);
1031         rc = al_eth_up(adapter);
1032
1033         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1034         if (rc == 0)
1035                 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1036 }
1037
1038 static void
1039 al_init(void *arg)
1040 {
1041         struct al_eth_adapter *adapter = arg;
1042
1043         al_init_locked(adapter);
1044 }
1045
1046 static inline int
1047 al_eth_alloc_rx_buf(struct al_eth_adapter *adapter,
1048     struct al_eth_ring *rx_ring,
1049     struct al_eth_rx_buffer *rx_info)
1050 {
1051         struct al_buf *al_buf;
1052         bus_dma_segment_t segs[2];
1053         int error;
1054         int nsegs;
1055
1056         if (rx_info->m != NULL)
1057                 return (0);
1058
1059         rx_info->data_size = adapter->rx_mbuf_sz;
1060
1061         AL_RX_LOCK(adapter);
1062
1063         /* Get mbuf using UMA allocator */
1064         rx_info->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1065             rx_info->data_size);
1066         AL_RX_UNLOCK(adapter);
1067
1068         if (rx_info->m == NULL)
1069                 return (ENOMEM);
1070
1071         rx_info->m->m_pkthdr.len = rx_info->m->m_len = adapter->rx_mbuf_sz;
1072
1073         /* Map packets for DMA */
1074         error = bus_dmamap_load_mbuf_sg(rx_ring->dma_buf_tag, rx_info->dma_map,
1075             rx_info->m, segs, &nsegs, BUS_DMA_NOWAIT);
1076         if (__predict_false(error)) {
1077                 device_printf(rx_ring->dev, "failed to map mbuf, error = %d\n",
1078                     error);
1079                 m_freem(rx_info->m);
1080                 rx_info->m = NULL;
1081                 return (EFAULT);
1082         }
1083
1084         al_buf = &rx_info->al_buf;
1085         al_buf->addr = segs[0].ds_addr + AL_IP_ALIGNMENT_OFFSET;
1086         al_buf->len = rx_info->data_size - AL_IP_ALIGNMENT_OFFSET;
1087
1088         return (0);
1089 }
1090
1091 static int
1092 al_eth_refill_rx_bufs(struct al_eth_adapter *adapter, unsigned int qid,
1093     unsigned int num)
1094 {
1095         struct al_eth_ring *rx_ring = &adapter->rx_ring[qid];
1096         uint16_t next_to_use;
1097         unsigned int i;
1098
1099         next_to_use = rx_ring->next_to_use;
1100
1101         for (i = 0; i < num; i++) {
1102                 int rc;
1103                 struct al_eth_rx_buffer *rx_info =
1104                     &rx_ring->rx_buffer_info[next_to_use];
1105
1106                 if (__predict_false(al_eth_alloc_rx_buf(adapter,
1107                     rx_ring, rx_info) < 0)) {
1108                         device_printf(adapter->dev,
1109                             "failed to alloc buffer for rx queue %d\n", qid);
1110                         break;
1111                 }
1112
1113                 rc = al_eth_rx_buffer_add(rx_ring->dma_q,
1114                     &rx_info->al_buf, AL_ETH_RX_FLAGS_INT, NULL);
1115                 if (__predict_false(rc)) {
1116                         device_printf(adapter->dev,
1117                             "failed to add buffer for rx queue %d\n", qid);
1118                         break;
1119                 }
1120
1121                 next_to_use = AL_ETH_RX_RING_IDX_NEXT(rx_ring, next_to_use);
1122         }
1123
1124         if (__predict_false(i < num))
1125                 device_printf(adapter->dev,
1126                     "refilled rx queue %d with %d pages only - available %d\n",
1127                     qid, i, al_udma_available_get(rx_ring->dma_q));
1128
1129         if (__predict_true(i))
1130                 al_eth_rx_buffer_action(rx_ring->dma_q, i);
1131
1132         rx_ring->next_to_use = next_to_use;
1133
1134         return (i);
1135 }
1136
1137 /*
1138  * al_eth_refill_all_rx_bufs - allocate all queues Rx buffers
1139  * @adapter: board private structure
1140  */
1141 static void
1142 al_eth_refill_all_rx_bufs(struct al_eth_adapter *adapter)
1143 {
1144         int i;
1145
1146         for (i = 0; i < adapter->num_rx_queues; i++)
1147                 al_eth_refill_rx_bufs(adapter, i, AL_ETH_DEFAULT_RX_DESCS - 1);
1148 }
1149
1150 static void
1151 al_eth_tx_do_cleanup(struct al_eth_ring *tx_ring)
1152 {
1153         unsigned int total_done;
1154         uint16_t next_to_clean;
1155         int qid = tx_ring->ring_id;
1156
1157         total_done = al_eth_comp_tx_get(tx_ring->dma_q);
1158         device_printf_dbg(tx_ring->dev,
1159             "tx_poll: q %d total completed descs %x\n", qid, total_done);
1160         next_to_clean = tx_ring->next_to_clean;
1161
1162         while (total_done != 0) {
1163                 struct al_eth_tx_buffer *tx_info;
1164                 struct mbuf *mbuf;
1165
1166                 tx_info = &tx_ring->tx_buffer_info[next_to_clean];
1167                 /* stop if not all descriptors of the packet are completed */
1168                 if (tx_info->tx_descs > total_done)
1169                         break;
1170
1171                 mbuf = tx_info->m;
1172
1173                 tx_info->m = NULL;
1174
1175                 device_printf_dbg(tx_ring->dev,
1176                     "tx_poll: q %d mbuf %p completed\n", qid, mbuf);
1177
1178                 /* map is no longer required */
1179                 bus_dmamap_unload(tx_ring->dma_buf_tag, tx_info->dma_map);
1180
1181                 m_freem(mbuf);
1182                 total_done -= tx_info->tx_descs;
1183                 next_to_clean = AL_ETH_TX_RING_IDX_NEXT(tx_ring, next_to_clean);
1184         }
1185
1186         tx_ring->next_to_clean = next_to_clean;
1187
1188         device_printf_dbg(tx_ring->dev, "tx_poll: q %d done next to clean %x\n",
1189             qid, next_to_clean);
1190
1191         /*
1192          * need to make the rings circular update visible to
1193          * al_eth_start_xmit() before checking for netif_queue_stopped().
1194          */
1195         al_smp_data_memory_barrier();
1196 }
1197
1198 static void
1199 al_eth_tx_csum(struct al_eth_ring *tx_ring, struct al_eth_tx_buffer *tx_info,
1200     struct al_eth_pkt *hal_pkt, struct mbuf *m)
1201 {
1202         uint32_t mss = m->m_pkthdr.tso_segsz;
1203         struct ether_vlan_header *eh;
1204         uint16_t etype;
1205         struct ip *ip;
1206         struct ip6_hdr *ip6;
1207         struct tcphdr *th = NULL;
1208         int     ehdrlen, ip_hlen = 0;
1209         uint8_t ipproto = 0;
1210         uint32_t offload = 0;
1211
1212         if (mss != 0)
1213                 offload = 1;
1214
1215         if ((m->m_pkthdr.csum_flags & CSUM_TSO) != 0)
1216                 offload = 1;
1217
1218         if ((m->m_pkthdr.csum_flags & CSUM_OFFLOAD) != 0)
1219                 offload = 1;
1220
1221         if (offload != 0) {
1222                 struct al_eth_meta_data *meta = &tx_ring->hal_meta;
1223
1224                 if (mss != 0)
1225                         hal_pkt->flags |= (AL_ETH_TX_FLAGS_TSO |
1226                             AL_ETH_TX_FLAGS_L4_CSUM);
1227                 else
1228                         hal_pkt->flags |= (AL_ETH_TX_FLAGS_L4_CSUM |
1229                             AL_ETH_TX_FLAGS_L4_PARTIAL_CSUM);
1230
1231                 /*
1232                  * Determine where frame payload starts.
1233                  * Jump over vlan headers if already present,
1234                  * helpful for QinQ too.
1235                  */
1236                 eh = mtod(m, struct ether_vlan_header *);
1237                 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
1238                         etype = ntohs(eh->evl_proto);
1239                         ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
1240                 } else {
1241                         etype = ntohs(eh->evl_encap_proto);
1242                         ehdrlen = ETHER_HDR_LEN;
1243                 }
1244
1245                 switch (etype) {
1246                 case ETHERTYPE_IP:
1247                         ip = (struct ip *)(m->m_data + ehdrlen);
1248                         ip_hlen = ip->ip_hl << 2;
1249                         ipproto = ip->ip_p;
1250                         hal_pkt->l3_proto_idx = AL_ETH_PROTO_ID_IPv4;
1251                         th = (struct tcphdr *)((caddr_t)ip + ip_hlen);
1252                         if (mss != 0)
1253                                 hal_pkt->flags |= AL_ETH_TX_FLAGS_IPV4_L3_CSUM;
1254                         if (ipproto == IPPROTO_TCP)
1255                                 hal_pkt->l4_proto_idx = AL_ETH_PROTO_ID_TCP;
1256                         else
1257                                 hal_pkt->l4_proto_idx = AL_ETH_PROTO_ID_UDP;
1258                         break;
1259                 case ETHERTYPE_IPV6:
1260                         ip6 = (struct ip6_hdr *)(m->m_data + ehdrlen);
1261                         hal_pkt->l3_proto_idx = AL_ETH_PROTO_ID_IPv6;
1262                         ip_hlen = sizeof(struct ip6_hdr);
1263                         th = (struct tcphdr *)((caddr_t)ip6 + ip_hlen);
1264                         ipproto = ip6->ip6_nxt;
1265                         if (ipproto == IPPROTO_TCP)
1266                                 hal_pkt->l4_proto_idx = AL_ETH_PROTO_ID_TCP;
1267                         else
1268                                 hal_pkt->l4_proto_idx = AL_ETH_PROTO_ID_UDP;
1269                         break;
1270                 default:
1271                         break;
1272                 }
1273
1274                 meta->words_valid = 4;
1275                 meta->l3_header_len = ip_hlen;
1276                 meta->l3_header_offset = ehdrlen;
1277                 if (th != NULL)
1278                         meta->l4_header_len = th->th_off; /* this param needed only for TSO */
1279                 meta->mss_idx_sel = 0;                  /* check how to select MSS */
1280                 meta->mss_val = mss;
1281                 hal_pkt->meta = meta;
1282         } else
1283                 hal_pkt->meta = NULL;
1284 }
1285
1286 #define XMIT_QUEUE_TIMEOUT      100
1287
1288 static void
1289 al_eth_xmit_mbuf(struct al_eth_ring *tx_ring, struct mbuf *m)
1290 {
1291         struct al_eth_tx_buffer *tx_info;
1292         int error;
1293         int nsegs, a;
1294         uint16_t next_to_use;
1295         bus_dma_segment_t segs[AL_ETH_PKT_MAX_BUFS + 1];
1296         struct al_eth_pkt *hal_pkt;
1297         struct al_buf *al_buf;
1298         boolean_t remap;
1299
1300         /* Check if queue is ready */
1301         if (unlikely(tx_ring->stall) != 0) {
1302                 for (a = 0; a < XMIT_QUEUE_TIMEOUT; a++) {
1303                         if (al_udma_available_get(tx_ring->dma_q) >=
1304                             (AL_ETH_DEFAULT_TX_HW_DESCS -
1305                             AL_ETH_TX_WAKEUP_THRESH)) {
1306                                 tx_ring->stall = 0;
1307                                 break;
1308                         }
1309                         pause("stall", 1);
1310                 }
1311                 if (a == XMIT_QUEUE_TIMEOUT) {
1312                         device_printf(tx_ring->dev,
1313                             "timeout waiting for queue %d ready!\n",
1314                             tx_ring->ring_id);
1315                         return;
1316                 } else {
1317                         device_printf_dbg(tx_ring->dev,
1318                             "queue %d is ready!\n", tx_ring->ring_id);
1319                 }
1320         }
1321
1322         next_to_use = tx_ring->next_to_use;
1323         tx_info = &tx_ring->tx_buffer_info[next_to_use];
1324         tx_info->m = m;
1325         hal_pkt = &tx_info->hal_pkt;
1326
1327         if (m == NULL) {
1328                 device_printf(tx_ring->dev, "mbuf is NULL\n");
1329                 return;
1330         }
1331
1332         remap = TRUE;
1333         /* Map packets for DMA */
1334 retry:
1335         error = bus_dmamap_load_mbuf_sg(tx_ring->dma_buf_tag, tx_info->dma_map,
1336             m, segs, &nsegs, BUS_DMA_NOWAIT);
1337         if (__predict_false(error)) {
1338                 struct mbuf *m_new;
1339
1340                 if (error == EFBIG) {
1341                         /* Try it again? - one try */
1342                         if (remap == TRUE) {
1343                                 remap = FALSE;
1344                                 m_new = m_defrag(m, M_NOWAIT);
1345                                 if (m_new == NULL) {
1346                                         device_printf(tx_ring->dev,
1347                                             "failed to defrag mbuf\n");
1348                                         goto exit;
1349                                 }
1350                                 m = m_new;
1351                                 goto retry;
1352                         } else {
1353                                 device_printf(tx_ring->dev,
1354                                     "failed to map mbuf, error %d\n", error);
1355                                 goto exit;
1356                         }
1357                 } else {
1358                         device_printf(tx_ring->dev,
1359                             "failed to map mbuf, error %d\n", error);
1360                         goto exit;
1361                 }
1362         }
1363
1364         /* set flags and meta data */
1365         hal_pkt->flags = AL_ETH_TX_FLAGS_INT;
1366         al_eth_tx_csum(tx_ring, tx_info, hal_pkt, m);
1367
1368         al_buf = hal_pkt->bufs;
1369         for (a = 0; a < nsegs; a++) {
1370                 al_buf->addr = segs[a].ds_addr;
1371                 al_buf->len = segs[a].ds_len;
1372
1373                 al_buf++;
1374         }
1375
1376         hal_pkt->num_of_bufs = nsegs;
1377
1378         /* prepare the packet's descriptors to dma engine */
1379         tx_info->tx_descs = al_eth_tx_pkt_prepare(tx_ring->dma_q, hal_pkt);
1380
1381         if (tx_info->tx_descs == 0)
1382                 goto exit;
1383
1384         /*
1385          * stop the queue when no more space available, the packet can have up
1386          * to AL_ETH_PKT_MAX_BUFS + 1 buffers and a meta descriptor
1387          */
1388         if (unlikely(al_udma_available_get(tx_ring->dma_q) <
1389             (AL_ETH_PKT_MAX_BUFS + 2))) {
1390                 tx_ring->stall = 1;
1391                 device_printf_dbg(tx_ring->dev, "stall, stopping queue %d...\n",
1392                     tx_ring->ring_id);
1393                 al_data_memory_barrier();
1394         }
1395
1396         tx_ring->next_to_use = AL_ETH_TX_RING_IDX_NEXT(tx_ring, next_to_use);
1397
1398         /* trigger the dma engine */
1399         al_eth_tx_dma_action(tx_ring->dma_q, tx_info->tx_descs);
1400         return;
1401
1402 exit:
1403         m_freem(m);
1404 }
1405
1406 static void
1407 al_eth_tx_cmpl_work(void *arg, int pending)
1408 {
1409         struct al_eth_ring *tx_ring = arg;
1410
1411         if (napi != 0) {
1412                 tx_ring->cmpl_is_running = 1;
1413                 al_data_memory_barrier();
1414         }
1415
1416         al_eth_tx_do_cleanup(tx_ring);
1417
1418         if (napi != 0) {
1419                 tx_ring->cmpl_is_running = 0;
1420                 al_data_memory_barrier();
1421         }
1422         /* all work done, enable IRQs */
1423         al_eth_irq_config(tx_ring->unmask_reg_offset, tx_ring->unmask_val);
1424 }
1425
1426 static int
1427 al_eth_tx_cmlp_irq_filter(void *arg)
1428 {
1429         struct al_eth_ring *tx_ring = arg;
1430
1431         /* Interrupt should be auto-masked upon arrival */
1432
1433         device_printf_dbg(tx_ring->dev, "%s for ring ID = %d\n", __func__,
1434             tx_ring->ring_id);
1435
1436         /*
1437          * For napi, if work is not running, schedule it. Always schedule
1438          * for casual (non-napi) packet handling.
1439          */
1440         if ((napi == 0) || (napi && tx_ring->cmpl_is_running == 0))
1441                 taskqueue_enqueue(tx_ring->cmpl_tq, &tx_ring->cmpl_task);
1442
1443         /* Do not run bottom half */
1444         return (FILTER_HANDLED);
1445 }
1446
1447 static int
1448 al_eth_rx_recv_irq_filter(void *arg)
1449 {
1450         struct al_eth_ring *rx_ring = arg;
1451
1452         /* Interrupt should be auto-masked upon arrival */
1453
1454         device_printf_dbg(rx_ring->dev, "%s for ring ID = %d\n", __func__,
1455             rx_ring->ring_id);
1456
1457         /*
1458          * For napi, if work is not running, schedule it. Always schedule
1459          * for casual (non-napi) packet handling.
1460          */
1461         if ((napi == 0) || (napi && rx_ring->enqueue_is_running == 0))
1462                 taskqueue_enqueue(rx_ring->enqueue_tq, &rx_ring->enqueue_task);
1463
1464         /* Do not run bottom half */
1465         return (FILTER_HANDLED);
1466 }
1467
1468 /*
1469  * al_eth_rx_checksum - indicate in mbuf if hw indicated a good cksum
1470  * @adapter: structure containing adapter specific data
1471  * @hal_pkt: HAL structure for the packet
1472  * @mbuf: mbuf currently being received and modified
1473  */
1474 static inline void
1475 al_eth_rx_checksum(struct al_eth_adapter *adapter,
1476     struct al_eth_pkt *hal_pkt, struct mbuf *mbuf)
1477 {
1478
1479         /* if IPv4 and error */
1480         if (unlikely((adapter->netdev->if_capenable & IFCAP_RXCSUM) &&
1481             (hal_pkt->l3_proto_idx == AL_ETH_PROTO_ID_IPv4) &&
1482             (hal_pkt->flags & AL_ETH_RX_FLAGS_L3_CSUM_ERR))) {
1483                 device_printf(adapter->dev,"rx ipv4 header checksum error\n");
1484                 return;
1485         }
1486
1487         /* if IPv6 and error */
1488         if (unlikely((adapter->netdev->if_capenable & IFCAP_RXCSUM_IPV6) &&
1489             (hal_pkt->l3_proto_idx == AL_ETH_PROTO_ID_IPv6) &&
1490             (hal_pkt->flags & AL_ETH_RX_FLAGS_L3_CSUM_ERR))) {
1491                 device_printf(adapter->dev,"rx ipv6 header checksum error\n");
1492                 return;
1493         }
1494
1495         /* if TCP/UDP */
1496         if (likely((hal_pkt->l4_proto_idx == AL_ETH_PROTO_ID_TCP) ||
1497            (hal_pkt->l4_proto_idx == AL_ETH_PROTO_ID_UDP))) {
1498                 if (unlikely(hal_pkt->flags & AL_ETH_RX_FLAGS_L4_CSUM_ERR)) {
1499                         device_printf_dbg(adapter->dev, "rx L4 checksum error\n");
1500
1501                         /* TCP/UDP checksum error */
1502                         mbuf->m_pkthdr.csum_flags = 0;
1503                 } else {
1504                         device_printf_dbg(adapter->dev, "rx checksum correct\n");
1505
1506                         /* IP Checksum Good */
1507                         mbuf->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
1508                         mbuf->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1509                 }
1510         }
1511 }
1512
1513 static struct mbuf*
1514 al_eth_rx_mbuf(struct al_eth_adapter *adapter,
1515     struct al_eth_ring *rx_ring, struct al_eth_pkt *hal_pkt,
1516     unsigned int descs, uint16_t *next_to_clean)
1517 {
1518         struct mbuf *mbuf;
1519         struct al_eth_rx_buffer *rx_info =
1520             &rx_ring->rx_buffer_info[*next_to_clean];
1521         unsigned int len;
1522
1523         len = hal_pkt->bufs[0].len;
1524         device_printf_dbg(adapter->dev, "rx_info %p data %p\n", rx_info,
1525            rx_info->m);
1526
1527         if (rx_info->m == NULL) {
1528                 *next_to_clean = AL_ETH_RX_RING_IDX_NEXT(rx_ring,
1529                     *next_to_clean);
1530                 return (NULL);
1531         }
1532
1533         mbuf = rx_info->m;
1534         mbuf->m_pkthdr.len = len;
1535         mbuf->m_len = len;
1536         mbuf->m_pkthdr.rcvif = rx_ring->netdev;
1537         mbuf->m_flags |= M_PKTHDR;
1538
1539         if (len <= adapter->small_copy_len) {
1540                 struct mbuf *smbuf;
1541                 device_printf_dbg(adapter->dev, "rx small packet. len %d\n", len);
1542
1543                 AL_RX_LOCK(adapter);
1544                 smbuf = m_gethdr(M_NOWAIT, MT_DATA);
1545                 AL_RX_UNLOCK(adapter);
1546                 if (__predict_false(smbuf == NULL)) {
1547                         device_printf(adapter->dev, "smbuf is NULL\n");
1548                         return (NULL);
1549                 }
1550
1551                 smbuf->m_data = smbuf->m_data + AL_IP_ALIGNMENT_OFFSET;
1552                 memcpy(smbuf->m_data, mbuf->m_data + AL_IP_ALIGNMENT_OFFSET, len);
1553
1554                 smbuf->m_len = len;
1555                 smbuf->m_pkthdr.rcvif = rx_ring->netdev;
1556
1557                 /* first desc of a non-ps chain */
1558                 smbuf->m_flags |= M_PKTHDR;
1559                 smbuf->m_pkthdr.len = smbuf->m_len;
1560
1561                 *next_to_clean = AL_ETH_RX_RING_IDX_NEXT(rx_ring,
1562                     *next_to_clean);
1563
1564                 return (smbuf);
1565         }
1566         mbuf->m_data = mbuf->m_data + AL_IP_ALIGNMENT_OFFSET;
1567
1568         /* Unmap the buffer */
1569         bus_dmamap_unload(rx_ring->dma_buf_tag, rx_info->dma_map);
1570
1571         rx_info->m = NULL;
1572         *next_to_clean = AL_ETH_RX_RING_IDX_NEXT(rx_ring, *next_to_clean);
1573
1574         return (mbuf);
1575 }
1576
1577 static void
1578 al_eth_rx_recv_work(void *arg, int pending)
1579 {
1580         struct al_eth_ring *rx_ring = arg;
1581         struct mbuf *mbuf;
1582         struct lro_entry *queued;
1583         unsigned int qid = rx_ring->ring_id;
1584         struct al_eth_pkt *hal_pkt = &rx_ring->hal_pkt;
1585         uint16_t next_to_clean = rx_ring->next_to_clean;
1586         uint32_t refill_required;
1587         uint32_t refill_actual;
1588         uint32_t do_if_input;
1589
1590         if (napi != 0) {
1591                 rx_ring->enqueue_is_running = 1;
1592                 al_data_memory_barrier();
1593         }
1594
1595         do {
1596                 unsigned int descs;
1597
1598                 descs = al_eth_pkt_rx(rx_ring->dma_q, hal_pkt);
1599                 if (unlikely(descs == 0))
1600                         break;
1601
1602                 device_printf_dbg(rx_ring->dev, "rx_poll: q %d got packet "
1603                     "from hal. descs %d\n", qid, descs);
1604                 device_printf_dbg(rx_ring->dev, "rx_poll: q %d flags %x. "
1605                     "l3 proto %d l4 proto %d\n", qid, hal_pkt->flags,
1606                     hal_pkt->l3_proto_idx, hal_pkt->l4_proto_idx);
1607
1608                 /* ignore if detected dma or eth controller errors */
1609                 if ((hal_pkt->flags & (AL_ETH_RX_ERROR |
1610                     AL_UDMA_CDESC_ERROR)) != 0) {
1611                         device_printf(rx_ring->dev, "receive packet with error. "
1612                             "flags = 0x%x\n", hal_pkt->flags);
1613                         next_to_clean = AL_ETH_RX_RING_IDX_ADD(rx_ring,
1614                             next_to_clean, descs);
1615                         continue;
1616                 }
1617
1618                 /* allocate mbuf and fill it */
1619                 mbuf = al_eth_rx_mbuf(rx_ring->adapter, rx_ring, hal_pkt, descs,
1620                     &next_to_clean);
1621
1622                 /* exit if we failed to retrieve a buffer */
1623                 if (unlikely(mbuf == NULL)) {
1624                         next_to_clean = AL_ETH_RX_RING_IDX_ADD(rx_ring,
1625                             next_to_clean, descs);
1626                         break;
1627                 }
1628
1629                 if (__predict_true(rx_ring->netdev->if_capenable & IFCAP_RXCSUM ||
1630                     rx_ring->netdev->if_capenable & IFCAP_RXCSUM_IPV6)) {
1631                         al_eth_rx_checksum(rx_ring->adapter, hal_pkt, mbuf);
1632                 }
1633
1634 #if __FreeBSD_version >= 800000
1635                 mbuf->m_pkthdr.flowid = qid;
1636                 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE);
1637 #endif
1638
1639                 /*
1640                  * LRO is only for IP/TCP packets and TCP checksum of the packet
1641                  * should be computed by hardware.
1642                  */
1643                 do_if_input = 1;
1644                 if ((rx_ring->lro_enabled != 0) &&
1645                     ((mbuf->m_pkthdr.csum_flags & CSUM_IP_VALID) != 0) &&
1646                     hal_pkt->l4_proto_idx == AL_ETH_PROTO_ID_TCP) {
1647                         /*
1648                          * Send to the stack if:
1649                          *  - LRO not enabled, or
1650                          *  - no LRO resources, or
1651                          *  - lro enqueue fails
1652                          */
1653                         if (rx_ring->lro.lro_cnt != 0) {
1654                                 if (tcp_lro_rx(&rx_ring->lro, mbuf, 0) == 0)
1655                                         do_if_input = 0;
1656                         }
1657                 }
1658
1659                 if (do_if_input)
1660                         (*rx_ring->netdev->if_input)(rx_ring->netdev, mbuf);
1661
1662         } while (1);
1663
1664         rx_ring->next_to_clean = next_to_clean;
1665
1666         refill_required = al_udma_available_get(rx_ring->dma_q);
1667         refill_actual = al_eth_refill_rx_bufs(rx_ring->adapter, qid,
1668             refill_required);
1669
1670         if (unlikely(refill_actual < refill_required)) {
1671                 device_printf_dbg(rx_ring->dev,
1672                     "%s: not filling rx queue %d\n", __func__, qid);
1673         }
1674
1675         while (((queued = LIST_FIRST(&rx_ring->lro.lro_active)) != NULL)) {
1676                 LIST_REMOVE(queued, next);
1677                 tcp_lro_flush(&rx_ring->lro, queued);
1678         }
1679
1680         if (napi != 0) {
1681                 rx_ring->enqueue_is_running = 0;
1682                 al_data_memory_barrier();
1683         }
1684         /* unmask irq */
1685         al_eth_irq_config(rx_ring->unmask_reg_offset, rx_ring->unmask_val);
1686 }
1687
1688 static void
1689 al_eth_start_xmit(void *arg, int pending)
1690 {
1691         struct al_eth_ring *tx_ring = arg;
1692         struct mbuf *mbuf;
1693
1694         if (napi != 0) {
1695                 tx_ring->enqueue_is_running = 1;
1696                 al_data_memory_barrier();
1697         }
1698
1699         while (1) {
1700                 mtx_lock(&tx_ring->br_mtx);
1701                 mbuf = drbr_dequeue(NULL, tx_ring->br);
1702                 mtx_unlock(&tx_ring->br_mtx);
1703
1704                 if (mbuf == NULL)
1705                         break;
1706
1707                 al_eth_xmit_mbuf(tx_ring, mbuf);
1708         }
1709
1710         if (napi != 0) {
1711                 tx_ring->enqueue_is_running = 0;
1712                 al_data_memory_barrier();
1713                 while (1) {
1714                         mtx_lock(&tx_ring->br_mtx);
1715                         mbuf = drbr_dequeue(NULL, tx_ring->br);
1716                         mtx_unlock(&tx_ring->br_mtx);
1717                         if (mbuf == NULL)
1718                                 break;
1719                         al_eth_xmit_mbuf(tx_ring, mbuf);
1720                 }
1721         }
1722 }
1723
1724 static int
1725 al_mq_start(struct ifnet *ifp, struct mbuf *m)
1726 {
1727         struct al_eth_adapter *adapter = ifp->if_softc;
1728         struct al_eth_ring *tx_ring;
1729         int i;
1730         int ret;
1731
1732         /* Which queue to use */
1733         if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE)
1734                 i = m->m_pkthdr.flowid % adapter->num_tx_queues;
1735         else
1736                 i = curcpu % adapter->num_tx_queues;
1737
1738         if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) !=
1739             IFF_DRV_RUNNING) {
1740                 return (EFAULT);
1741         }
1742
1743         tx_ring = &adapter->tx_ring[i];
1744
1745         device_printf_dbg(adapter->dev, "dgb start() - assuming link is active, "
1746             "sending packet to queue %d\n", i);
1747
1748         ret = drbr_enqueue(ifp, tx_ring->br, m);
1749
1750         /*
1751          * For napi, if work is not running, schedule it. Always schedule
1752          * for casual (non-napi) packet handling.
1753          */
1754         if ((napi == 0) || ((napi != 0) && (tx_ring->enqueue_is_running == 0)))
1755                 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
1756
1757         return (ret);
1758 }
1759
1760 static void
1761 al_qflush(struct ifnet * ifp)
1762 {
1763
1764         /* unused */
1765 }
1766
1767 static inline void
1768 al_eth_flow_ctrl_init(struct al_eth_adapter *adapter)
1769 {
1770         uint8_t default_flow_ctrl;
1771
1772         default_flow_ctrl = AL_ETH_FLOW_CTRL_TX_PAUSE;
1773         default_flow_ctrl |= AL_ETH_FLOW_CTRL_RX_PAUSE;
1774
1775         adapter->link_config.flow_ctrl_supported = default_flow_ctrl;
1776 }
1777
1778 static int
1779 al_eth_flow_ctrl_config(struct al_eth_adapter *adapter)
1780 {
1781         struct al_eth_flow_control_params *flow_ctrl_params;
1782         uint8_t active = adapter->link_config.flow_ctrl_active;
1783         int i;
1784
1785         flow_ctrl_params = &adapter->flow_ctrl_params;
1786
1787         flow_ctrl_params->type = AL_ETH_FLOW_CONTROL_TYPE_LINK_PAUSE;
1788         flow_ctrl_params->obay_enable =
1789             ((active & AL_ETH_FLOW_CTRL_RX_PAUSE) != 0);
1790         flow_ctrl_params->gen_enable =
1791             ((active & AL_ETH_FLOW_CTRL_TX_PAUSE) != 0);
1792
1793         flow_ctrl_params->rx_fifo_th_high = AL_ETH_FLOW_CTRL_RX_FIFO_TH_HIGH;
1794         flow_ctrl_params->rx_fifo_th_low = AL_ETH_FLOW_CTRL_RX_FIFO_TH_LOW;
1795         flow_ctrl_params->quanta = AL_ETH_FLOW_CTRL_QUANTA;
1796         flow_ctrl_params->quanta_th = AL_ETH_FLOW_CTRL_QUANTA_TH;
1797
1798         /* map priority to queue index, queue id = priority/2 */
1799         for (i = 0; i < AL_ETH_FWD_PRIO_TABLE_NUM; i++)
1800                 flow_ctrl_params->prio_q_map[0][i] =  1 << (i >> 1);
1801
1802         al_eth_flow_control_config(&adapter->hal_adapter, flow_ctrl_params);
1803
1804         return (0);
1805 }
1806
1807 static void
1808 al_eth_flow_ctrl_enable(struct al_eth_adapter *adapter)
1809 {
1810
1811         /*
1812          * change the active configuration to the default / force by ethtool
1813          * and call to configure
1814          */
1815         adapter->link_config.flow_ctrl_active =
1816             adapter->link_config.flow_ctrl_supported;
1817
1818         al_eth_flow_ctrl_config(adapter);
1819 }
1820
1821 static void
1822 al_eth_flow_ctrl_disable(struct al_eth_adapter *adapter)
1823 {
1824
1825         adapter->link_config.flow_ctrl_active = 0;
1826         al_eth_flow_ctrl_config(adapter);
1827 }
1828
1829 static int
1830 al_eth_hw_init(struct al_eth_adapter *adapter)
1831 {
1832         int rc;
1833
1834         rc = al_eth_hw_init_adapter(adapter);
1835         if (rc != 0)
1836                 return (rc);
1837
1838         rc = al_eth_mac_config(&adapter->hal_adapter, adapter->mac_mode);
1839         if (rc < 0) {
1840                 device_printf(adapter->dev, "%s failed to configure mac!\n",
1841                     __func__);
1842                 return (rc);
1843         }
1844
1845         if ((adapter->mac_mode == AL_ETH_MAC_MODE_SGMII) ||
1846             (adapter->mac_mode == AL_ETH_MAC_MODE_RGMII &&
1847              adapter->phy_exist == FALSE)) {
1848                 rc = al_eth_mac_link_config(&adapter->hal_adapter,
1849                     adapter->link_config.force_1000_base_x,
1850                     adapter->link_config.autoneg,
1851                     adapter->link_config.active_speed,
1852                     adapter->link_config.active_duplex);
1853                 if (rc != 0) {
1854                         device_printf(adapter->dev,
1855                             "%s failed to configure link parameters!\n",
1856                             __func__);
1857                         return (rc);
1858                 }
1859         }
1860
1861         rc = al_eth_mdio_config(&adapter->hal_adapter,
1862             AL_ETH_MDIO_TYPE_CLAUSE_22, TRUE /* shared_mdio_if */,
1863             adapter->ref_clk_freq, adapter->mdio_freq);
1864         if (rc != 0) {
1865                 device_printf(adapter->dev, "%s failed at mdio config!\n",
1866                     __func__);
1867                 return (rc);
1868         }
1869
1870         al_eth_flow_ctrl_init(adapter);
1871
1872         return (rc);
1873 }
1874
1875 static int
1876 al_eth_hw_stop(struct al_eth_adapter *adapter)
1877 {
1878
1879         al_eth_mac_stop(&adapter->hal_adapter);
1880
1881         /*
1882          * wait till pending rx packets written and UDMA becomes idle,
1883          * the MAC has ~10KB fifo, 10us should be enought time for the
1884          * UDMA to write to the memory
1885          */
1886         DELAY(10);
1887
1888         al_eth_adapter_stop(&adapter->hal_adapter);
1889
1890         adapter->flags |= AL_ETH_FLAG_RESET_REQUESTED;
1891
1892         /* disable flow ctrl to avoid pause packets*/
1893         al_eth_flow_ctrl_disable(adapter);
1894
1895         return (0);
1896 }
1897
1898 /*
1899  * al_eth_intr_intx_all - Legacy Interrupt Handler for all interrupts
1900  * @irq: interrupt number
1901  * @data: pointer to a network interface device structure
1902  */
1903 static int
1904 al_eth_intr_intx_all(void *data)
1905 {
1906         struct al_eth_adapter *adapter = data;
1907
1908         struct unit_regs __iomem *regs_base =
1909             (struct unit_regs __iomem *)adapter->udma_base;
1910         uint32_t reg;
1911
1912         reg = al_udma_iofic_read_cause(regs_base, AL_UDMA_IOFIC_LEVEL_PRIMARY,
1913             AL_INT_GROUP_A);
1914         if (likely(reg))
1915                 device_printf_dbg(adapter->dev, "%s group A cause %x\n",
1916                     __func__, reg);
1917
1918         if (unlikely(reg & AL_INT_GROUP_A_GROUP_D_SUM)) {
1919                 struct al_iofic_grp_ctrl __iomem *sec_ints_base;
1920                 uint32_t cause_d =  al_udma_iofic_read_cause(regs_base,
1921                     AL_UDMA_IOFIC_LEVEL_PRIMARY, AL_INT_GROUP_D);
1922
1923                 sec_ints_base =
1924                     &regs_base->gen.interrupt_regs.secondary_iofic_ctrl[0];
1925                 if (cause_d != 0) {
1926                         device_printf_dbg(adapter->dev,
1927                             "got interrupt from group D. cause %x\n", cause_d);
1928
1929                         cause_d = al_iofic_read_cause(sec_ints_base,
1930                             AL_INT_GROUP_A);
1931                         device_printf(adapter->dev,
1932                             "secondary A cause %x\n", cause_d);
1933
1934                         cause_d = al_iofic_read_cause(sec_ints_base,
1935                             AL_INT_GROUP_B);
1936
1937                         device_printf_dbg(adapter->dev,
1938                             "secondary B cause %x\n", cause_d);
1939                 }
1940         }
1941         if ((reg & AL_INT_GROUP_A_GROUP_B_SUM) != 0 ) {
1942                 uint32_t cause_b = al_udma_iofic_read_cause(regs_base,
1943                     AL_UDMA_IOFIC_LEVEL_PRIMARY, AL_INT_GROUP_B);
1944                 int qid;
1945                 device_printf_dbg(adapter->dev, "secondary B cause %x\n",
1946                     cause_b);
1947                 for (qid = 0; qid < adapter->num_rx_queues; qid++) {
1948                         if (cause_b & (1 << qid)) {
1949                                 /* mask */
1950                                 al_udma_iofic_mask(
1951                                     (struct unit_regs __iomem *)adapter->udma_base,
1952                                     AL_UDMA_IOFIC_LEVEL_PRIMARY,
1953                                     AL_INT_GROUP_B, 1 << qid);
1954                         }
1955                 }
1956         }
1957         if ((reg & AL_INT_GROUP_A_GROUP_C_SUM) != 0) {
1958                 uint32_t cause_c = al_udma_iofic_read_cause(regs_base,
1959                     AL_UDMA_IOFIC_LEVEL_PRIMARY, AL_INT_GROUP_C);
1960                 int qid;
1961                 device_printf_dbg(adapter->dev, "secondary C cause %x\n", cause_c);
1962                 for (qid = 0; qid < adapter->num_tx_queues; qid++) {
1963                         if ((cause_c & (1 << qid)) != 0) {
1964                                 al_udma_iofic_mask(
1965                                     (struct unit_regs __iomem *)adapter->udma_base,
1966                                     AL_UDMA_IOFIC_LEVEL_PRIMARY,
1967                                     AL_INT_GROUP_C, 1 << qid);
1968                         }
1969                 }
1970         }
1971
1972         al_eth_tx_cmlp_irq_filter(adapter->tx_ring);
1973
1974         return (0);
1975 }
1976
1977 static int
1978 al_eth_intr_msix_all(void *data)
1979 {
1980         struct al_eth_adapter *adapter = data;
1981
1982         device_printf_dbg(adapter->dev, "%s\n", __func__);
1983         return (0);
1984 }
1985
1986 static int
1987 al_eth_intr_msix_mgmt(void *data)
1988 {
1989         struct al_eth_adapter *adapter = data;
1990
1991         device_printf_dbg(adapter->dev, "%s\n", __func__);
1992         return (0);
1993 }
1994
1995 static int
1996 al_eth_enable_msix(struct al_eth_adapter *adapter)
1997 {
1998         int i, msix_vecs, rc, count;
1999
2000         device_printf_dbg(adapter->dev, "%s\n", __func__);
2001         msix_vecs = 1 + adapter->num_rx_queues + adapter->num_tx_queues;
2002
2003         device_printf_dbg(adapter->dev,
2004             "Try to enable MSIX, vector numbers = %d\n", msix_vecs);
2005
2006         adapter->msix_entries = malloc(msix_vecs*sizeof(*adapter->msix_entries),
2007             M_IFAL, M_ZERO | M_WAITOK);
2008
2009         if (adapter->msix_entries == NULL) {
2010                 device_printf_dbg(adapter->dev, "failed to allocate"
2011                     " msix_entries %d\n", msix_vecs);
2012                 rc = ENOMEM;
2013                 goto exit;
2014         }
2015
2016         /* management vector (GROUP_A) @2*/
2017         adapter->msix_entries[AL_ETH_MGMT_IRQ_IDX].entry = 2;
2018         adapter->msix_entries[AL_ETH_MGMT_IRQ_IDX].vector = 0;
2019
2020         /* rx queues start @3 */
2021         for (i = 0; i < adapter->num_rx_queues; i++) {
2022                 int irq_idx = AL_ETH_RXQ_IRQ_IDX(adapter, i);
2023
2024                 adapter->msix_entries[irq_idx].entry = 3 + i;
2025                 adapter->msix_entries[irq_idx].vector = 0;
2026         }
2027         /* tx queues start @7 */
2028         for (i = 0; i < adapter->num_tx_queues; i++) {
2029                 int irq_idx = AL_ETH_TXQ_IRQ_IDX(adapter, i);
2030
2031                 adapter->msix_entries[irq_idx].entry = 3 +
2032                     AL_ETH_MAX_HW_QUEUES + i;
2033                 adapter->msix_entries[irq_idx].vector = 0;
2034         }
2035
2036         count = msix_vecs + 2; /* entries start from 2 */
2037         rc = pci_alloc_msix(adapter->dev, &count);
2038
2039         if (rc != 0) {
2040                 device_printf_dbg(adapter->dev, "failed to allocate MSIX "
2041                     "vectors %d\n", msix_vecs+2);
2042                 device_printf_dbg(adapter->dev, "ret = %d\n", rc);
2043                 goto msix_entries_exit;
2044         }
2045
2046         if (count != msix_vecs + 2) {
2047                 device_printf_dbg(adapter->dev, "failed to allocate all MSIX "
2048                     "vectors %d, allocated %d\n", msix_vecs+2, count);
2049                 rc = ENOSPC;
2050                 goto msix_entries_exit;
2051         }
2052
2053         for (i = 0; i < msix_vecs; i++)
2054             adapter->msix_entries[i].vector = 2 + 1 + i;
2055
2056         device_printf_dbg(adapter->dev, "successfully enabled MSIX,"
2057             " vectors %d\n", msix_vecs);
2058
2059         adapter->msix_vecs = msix_vecs;
2060         adapter->flags |= AL_ETH_FLAG_MSIX_ENABLED;
2061         goto exit;
2062
2063 msix_entries_exit:
2064         adapter->msix_vecs = 0;
2065         free(adapter->msix_entries, M_IFAL);
2066         adapter->msix_entries = NULL;
2067
2068 exit:
2069         return (rc);
2070 }
2071
2072 static int
2073 al_eth_setup_int_mode(struct al_eth_adapter *adapter)
2074 {
2075         int i, rc;
2076
2077         rc = al_eth_enable_msix(adapter);
2078         if (rc != 0) {
2079                 device_printf(adapter->dev, "Failed to enable MSIX mode.\n");
2080                 return (rc);
2081         }
2082
2083         adapter->irq_vecs = max(1, adapter->msix_vecs);
2084         /* single INTX mode */
2085         if (adapter->msix_vecs == 0) {
2086                 snprintf(adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].name,
2087                     AL_ETH_IRQNAME_SIZE, "al-eth-intx-all@pci:%s",
2088                     device_get_name(adapter->dev));
2089                 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].handler =
2090                     al_eth_intr_intx_all;
2091                 /* IRQ vector will be resolved from device resources */
2092                 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].vector = 0;
2093                 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].data = adapter;
2094
2095                 device_printf(adapter->dev, "%s and vector %d \n", __func__,
2096                     adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].vector);
2097
2098                 return (0);
2099         }
2100         /* single MSI-X mode */
2101         if (adapter->msix_vecs == 1) {
2102                 snprintf(adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].name,
2103                     AL_ETH_IRQNAME_SIZE, "al-eth-msix-all@pci:%s",
2104                     device_get_name(adapter->dev));
2105                 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].handler =
2106                     al_eth_intr_msix_all;
2107                 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].vector =
2108                     adapter->msix_entries[AL_ETH_MGMT_IRQ_IDX].vector;
2109                 adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].data = adapter;
2110
2111                 return (0);
2112         }
2113         /* MSI-X per queue */
2114         snprintf(adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].name, AL_ETH_IRQNAME_SIZE,
2115             "al-eth-msix-mgmt@pci:%s", device_get_name(adapter->dev));
2116         adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].handler = al_eth_intr_msix_mgmt;
2117
2118         adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].data = adapter;
2119         adapter->irq_tbl[AL_ETH_MGMT_IRQ_IDX].vector =
2120             adapter->msix_entries[AL_ETH_MGMT_IRQ_IDX].vector;
2121
2122         for (i = 0; i < adapter->num_rx_queues; i++) {
2123                 int irq_idx = AL_ETH_RXQ_IRQ_IDX(adapter, i);
2124
2125                 snprintf(adapter->irq_tbl[irq_idx].name, AL_ETH_IRQNAME_SIZE,
2126                     "al-eth-rx-comp-%d@pci:%s", i,
2127                     device_get_name(adapter->dev));
2128                 adapter->irq_tbl[irq_idx].handler = al_eth_rx_recv_irq_filter;
2129                 adapter->irq_tbl[irq_idx].data = &adapter->rx_ring[i];
2130                 adapter->irq_tbl[irq_idx].vector =
2131                     adapter->msix_entries[irq_idx].vector;
2132         }
2133
2134         for (i = 0; i < adapter->num_tx_queues; i++) {
2135                 int irq_idx = AL_ETH_TXQ_IRQ_IDX(adapter, i);
2136
2137                 snprintf(adapter->irq_tbl[irq_idx].name,
2138                     AL_ETH_IRQNAME_SIZE, "al-eth-tx-comp-%d@pci:%s", i,
2139                     device_get_name(adapter->dev));
2140                 adapter->irq_tbl[irq_idx].handler = al_eth_tx_cmlp_irq_filter;
2141                 adapter->irq_tbl[irq_idx].data = &adapter->tx_ring[i];
2142                 adapter->irq_tbl[irq_idx].vector =
2143                     adapter->msix_entries[irq_idx].vector;
2144         }
2145
2146         return (0);
2147 }
2148
2149 static void
2150 __al_eth_free_irq(struct al_eth_adapter *adapter)
2151 {
2152         struct al_eth_irq *irq;
2153         int i, rc;
2154
2155         for (i = 0; i < adapter->irq_vecs; i++) {
2156                 irq = &adapter->irq_tbl[i];
2157                 if (irq->requested != 0) {
2158                         device_printf_dbg(adapter->dev, "tear down irq: %d\n",
2159                             irq->vector);
2160                         rc = bus_teardown_intr(adapter->dev, irq->res,
2161                             irq->cookie);
2162                         if (rc != 0)
2163                                 device_printf(adapter->dev, "failed to tear "
2164                                     "down irq: %d\n", irq->vector);
2165
2166                 }
2167                 irq->requested = 0;
2168         }
2169 }
2170
2171 static void
2172 al_eth_free_irq(struct al_eth_adapter *adapter)
2173 {
2174         struct al_eth_irq *irq;
2175         int i, rc;
2176 #ifdef CONFIG_RFS_ACCEL
2177         if (adapter->msix_vecs >= 1) {
2178                 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
2179                 adapter->netdev->rx_cpu_rmap = NULL;
2180         }
2181 #endif
2182
2183         __al_eth_free_irq(adapter);
2184
2185         for (i = 0; i < adapter->irq_vecs; i++) {
2186                 irq = &adapter->irq_tbl[i];
2187                 if (irq->res == NULL)
2188                         continue;
2189                 device_printf_dbg(adapter->dev, "release resource irq: %d\n",
2190                     irq->vector);
2191                 rc = bus_release_resource(adapter->dev, SYS_RES_IRQ, irq->vector,
2192                     irq->res);
2193                 irq->res = NULL;
2194                 if (rc != 0)
2195                         device_printf(adapter->dev, "dev has no parent while "
2196                             "releasing res for irq: %d\n", irq->vector);
2197         }
2198
2199         pci_release_msi(adapter->dev);
2200
2201         adapter->flags &= ~AL_ETH_FLAG_MSIX_ENABLED;
2202
2203         adapter->msix_vecs = 0;
2204         free(adapter->msix_entries, M_IFAL);
2205         adapter->msix_entries = NULL;
2206 }
2207
2208 static int
2209 al_eth_request_irq(struct al_eth_adapter *adapter)
2210 {
2211         unsigned long flags;
2212         struct al_eth_irq *irq;
2213         int rc = 0, i, v;
2214
2215         if ((adapter->flags & AL_ETH_FLAG_MSIX_ENABLED) != 0)
2216                 flags = RF_ACTIVE;
2217         else
2218                 flags = RF_ACTIVE | RF_SHAREABLE;
2219
2220         for (i = 0; i < adapter->irq_vecs; i++) {
2221                 irq = &adapter->irq_tbl[i];
2222
2223                 if (irq->requested != 0)
2224                         continue;
2225
2226                 irq->res = bus_alloc_resource_any(adapter->dev, SYS_RES_IRQ,
2227                     &irq->vector, flags);
2228                 if (irq->res == NULL) {
2229                         device_printf(adapter->dev, "could not allocate "
2230                             "irq vector=%d\n", irq->vector);
2231                         rc = ENXIO;
2232                         goto exit_res;
2233                 }
2234
2235                 if ((rc = bus_setup_intr(adapter->dev, irq->res,
2236                     INTR_TYPE_NET | INTR_MPSAFE, irq->handler,
2237                     NULL, irq->data, &irq->cookie)) != 0) {
2238                         device_printf(adapter->dev, "failed to register "
2239                             "interrupt handler for irq %ju: %d\n",
2240                             (uintmax_t)rman_get_start(irq->res), rc);
2241                         goto exit_intr;
2242                 }
2243                 irq->requested = 1;
2244         }
2245         goto exit;
2246
2247 exit_intr:
2248         v = i - 1; /* -1 because we omit the operation that failed */
2249         while (v-- >= 0) {
2250                 int bti;
2251                 irq = &adapter->irq_tbl[v];
2252                 bti = bus_teardown_intr(adapter->dev, irq->res, irq->cookie);
2253                 if (bti != 0) {
2254                         device_printf(adapter->dev, "failed to tear "
2255                             "down irq: %d\n", irq->vector);
2256                 }
2257
2258                 irq->requested = 0;
2259                 device_printf_dbg(adapter->dev, "exit_intr: releasing irq %d\n",
2260                     irq->vector);
2261         }
2262
2263 exit_res:
2264         v = i - 1; /* -1 because we omit the operation that failed */
2265         while (v-- >= 0) {
2266                 int brr;
2267                 irq = &adapter->irq_tbl[v];
2268                 device_printf_dbg(adapter->dev, "exit_res: releasing resource"
2269                     " for irq %d\n", irq->vector);
2270                 brr = bus_release_resource(adapter->dev, SYS_RES_IRQ,
2271                     irq->vector, irq->res);
2272                 if (brr != 0)
2273                         device_printf(adapter->dev, "dev has no parent while "
2274                             "releasing res for irq: %d\n", irq->vector);
2275                 irq->res = NULL;
2276         }
2277
2278 exit:
2279         return (rc);
2280 }
2281
2282 /**
2283  * al_eth_setup_tx_resources - allocate Tx resources (Descriptors)
2284  * @adapter: network interface device structure
2285  * @qid: queue index
2286  *
2287  * Return 0 on success, negative on failure
2288  **/
2289 static int
2290 al_eth_setup_tx_resources(struct al_eth_adapter *adapter, int qid)
2291 {
2292         struct al_eth_ring *tx_ring = &adapter->tx_ring[qid];
2293         struct device *dev = tx_ring->dev;
2294         struct al_udma_q_params *q_params = &tx_ring->q_params;
2295         int size;
2296         int ret;
2297
2298         if (adapter->up)
2299                 return (0);
2300
2301         size = sizeof(struct al_eth_tx_buffer) * tx_ring->sw_count;
2302
2303         tx_ring->tx_buffer_info = malloc(size, M_IFAL, M_ZERO | M_WAITOK);
2304         if (tx_ring->tx_buffer_info == NULL)
2305                 return (ENOMEM);
2306
2307         tx_ring->descs_size = tx_ring->hw_count * sizeof(union al_udma_desc);
2308         q_params->size = tx_ring->hw_count;
2309
2310         ret = al_dma_alloc_coherent(dev, &q_params->desc_phy_base_tag,
2311             (bus_dmamap_t *)&q_params->desc_phy_base_map,
2312             (bus_addr_t *)&q_params->desc_phy_base,
2313             (void**)&q_params->desc_base, tx_ring->descs_size);
2314         if (ret != 0) {
2315                 device_printf(dev, "failed to al_dma_alloc_coherent,"
2316                     " ret = %d\n", ret);
2317                 return (ENOMEM);
2318         }
2319
2320         if (q_params->desc_base == NULL)
2321                 return (ENOMEM);
2322
2323         device_printf_dbg(dev, "Initializing ring queues %d\n", qid);
2324
2325         /* Allocate Ring Queue */
2326         mtx_init(&tx_ring->br_mtx, "AlRingMtx", NULL, MTX_DEF);
2327         tx_ring->br = buf_ring_alloc(AL_BR_SIZE, M_DEVBUF, M_WAITOK,
2328             &tx_ring->br_mtx);
2329         if (tx_ring->br == NULL) {
2330                 device_printf(dev, "Critical Failure setting up buf ring\n");
2331                 return (ENOMEM);
2332         }
2333
2334         /* Allocate taskqueues */
2335         TASK_INIT(&tx_ring->enqueue_task, 0, al_eth_start_xmit, tx_ring);
2336         tx_ring->enqueue_tq = taskqueue_create_fast("al_tx_enque", M_NOWAIT,
2337             taskqueue_thread_enqueue, &tx_ring->enqueue_tq);
2338         taskqueue_start_threads(&tx_ring->enqueue_tq, 1, PI_NET, "%s txeq",
2339             device_get_nameunit(adapter->dev));
2340         TASK_INIT(&tx_ring->cmpl_task, 0, al_eth_tx_cmpl_work, tx_ring);
2341         tx_ring->cmpl_tq = taskqueue_create_fast("al_tx_cmpl", M_NOWAIT,
2342             taskqueue_thread_enqueue, &tx_ring->cmpl_tq);
2343         taskqueue_start_threads(&tx_ring->cmpl_tq, 1, PI_REALTIME, "%s txcq",
2344             device_get_nameunit(adapter->dev));
2345
2346         /* Setup DMA descriptor areas. */
2347         ret = bus_dma_tag_create(bus_get_dma_tag(dev),
2348             1, 0,                       /* alignment, bounds */
2349             BUS_SPACE_MAXADDR,          /* lowaddr */
2350             BUS_SPACE_MAXADDR,          /* highaddr */
2351             NULL, NULL,                 /* filter, filterarg */
2352             AL_TSO_SIZE,                /* maxsize */
2353             AL_ETH_PKT_MAX_BUFS,        /* nsegments */
2354             PAGE_SIZE,                  /* maxsegsize */
2355             0,                          /* flags */
2356             NULL,                       /* lockfunc */
2357             NULL,                       /* lockfuncarg */
2358             &tx_ring->dma_buf_tag);
2359
2360         if (ret != 0) {
2361                 device_printf(dev,"Unable to allocate dma_buf_tag, ret = %d\n",
2362                     ret);
2363                 return (ret);
2364         }
2365
2366         for (size = 0; size < tx_ring->sw_count; size++) {
2367                 ret = bus_dmamap_create(tx_ring->dma_buf_tag, 0,
2368                     &tx_ring->tx_buffer_info[size].dma_map);
2369                 if (ret != 0) {
2370                         device_printf(dev, "Unable to map DMA TX "
2371                             "buffer memory [iter=%d]\n", size);
2372                         return (ret);
2373                 }
2374         }
2375
2376         /* completion queue not used for tx */
2377         q_params->cdesc_base = NULL;
2378         /* size in bytes of the udma completion ring descriptor */
2379         q_params->cdesc_size = 8;
2380         tx_ring->next_to_use = 0;
2381         tx_ring->next_to_clean = 0;
2382
2383         return (0);
2384 }
2385
2386 /*
2387  * al_eth_free_tx_resources - Free Tx Resources per Queue
2388  * @adapter: network interface device structure
2389  * @qid: queue index
2390  *
2391  * Free all transmit software resources
2392  */
2393 static void
2394 al_eth_free_tx_resources(struct al_eth_adapter *adapter, int qid)
2395 {
2396         struct al_eth_ring *tx_ring = &adapter->tx_ring[qid];
2397         struct al_udma_q_params *q_params = &tx_ring->q_params;
2398         int size;
2399
2400         /* At this point interrupts' handlers must be deactivated */
2401         while (taskqueue_cancel(tx_ring->cmpl_tq, &tx_ring->cmpl_task, NULL))
2402                 taskqueue_drain(tx_ring->cmpl_tq, &tx_ring->cmpl_task);
2403
2404         taskqueue_free(tx_ring->cmpl_tq);
2405         while (taskqueue_cancel(tx_ring->enqueue_tq,
2406             &tx_ring->enqueue_task, NULL)) {
2407                 taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
2408         }
2409
2410         taskqueue_free(tx_ring->enqueue_tq);
2411
2412         if (tx_ring->br != NULL) {
2413                 drbr_flush(adapter->netdev, tx_ring->br);
2414                 buf_ring_free(tx_ring->br, M_DEVBUF);
2415         }
2416
2417         for (size = 0; size < tx_ring->sw_count; size++) {
2418                 m_freem(tx_ring->tx_buffer_info[size].m);
2419                 tx_ring->tx_buffer_info[size].m = NULL;
2420
2421                 bus_dmamap_unload(tx_ring->dma_buf_tag,
2422                     tx_ring->tx_buffer_info[size].dma_map);
2423                 bus_dmamap_destroy(tx_ring->dma_buf_tag,
2424                     tx_ring->tx_buffer_info[size].dma_map);
2425         }
2426         bus_dma_tag_destroy(tx_ring->dma_buf_tag);
2427
2428         free(tx_ring->tx_buffer_info, M_IFAL);
2429         tx_ring->tx_buffer_info = NULL;
2430
2431         mtx_destroy(&tx_ring->br_mtx);
2432
2433         /* if not set, then don't free */
2434         if (q_params->desc_base == NULL)
2435                 return;
2436
2437         al_dma_free_coherent(q_params->desc_phy_base_tag,
2438             q_params->desc_phy_base_map, q_params->desc_base);
2439
2440         q_params->desc_base = NULL;
2441 }
2442
2443 /*
2444  * al_eth_free_all_tx_resources - Free Tx Resources for All Queues
2445  * @adapter: board private structure
2446  *
2447  * Free all transmit software resources
2448  */
2449 static void
2450 al_eth_free_all_tx_resources(struct al_eth_adapter *adapter)
2451 {
2452         int i;
2453
2454         for (i = 0; i < adapter->num_tx_queues; i++)
2455                 if (adapter->tx_ring[i].q_params.desc_base)
2456                         al_eth_free_tx_resources(adapter, i);
2457 }
2458
2459 /*
2460  * al_eth_setup_rx_resources - allocate Rx resources (Descriptors)
2461  * @adapter: network interface device structure
2462  * @qid: queue index
2463  *
2464  * Returns 0 on success, negative on failure
2465  */
2466 static int
2467 al_eth_setup_rx_resources(struct al_eth_adapter *adapter, unsigned int qid)
2468 {
2469         struct al_eth_ring *rx_ring = &adapter->rx_ring[qid];
2470         struct device *dev = rx_ring->dev;
2471         struct al_udma_q_params *q_params = &rx_ring->q_params;
2472         int size;
2473         int ret;
2474
2475         size = sizeof(struct al_eth_rx_buffer) * rx_ring->sw_count;
2476
2477         /* alloc extra element so in rx path we can always prefetch rx_info + 1 */
2478         size += 1;
2479
2480         rx_ring->rx_buffer_info = malloc(size, M_IFAL, M_ZERO | M_WAITOK);
2481         if (rx_ring->rx_buffer_info == NULL)
2482                 return (ENOMEM);
2483
2484         rx_ring->descs_size = rx_ring->hw_count * sizeof(union al_udma_desc);
2485         q_params->size = rx_ring->hw_count;
2486
2487         ret = al_dma_alloc_coherent(dev, &q_params->desc_phy_base_tag,
2488             &q_params->desc_phy_base_map,
2489             (bus_addr_t *)&q_params->desc_phy_base,
2490             (void**)&q_params->desc_base, rx_ring->descs_size);
2491
2492         if ((q_params->desc_base == NULL) || (ret != 0))
2493                 return (ENOMEM);
2494
2495         /* size in bytes of the udma completion ring descriptor */
2496         q_params->cdesc_size = 16;
2497         rx_ring->cdescs_size = rx_ring->hw_count * q_params->cdesc_size;
2498         ret = al_dma_alloc_coherent(dev, &q_params->cdesc_phy_base_tag,
2499             &q_params->cdesc_phy_base_map,
2500             (bus_addr_t *)&q_params->cdesc_phy_base,
2501             (void**)&q_params->cdesc_base, rx_ring->cdescs_size);
2502
2503         if ((q_params->cdesc_base == NULL) || (ret != 0))
2504                 return (ENOMEM);
2505
2506         /* Allocate taskqueues */
2507         TASK_INIT(&rx_ring->enqueue_task, 0, al_eth_rx_recv_work, rx_ring);
2508         rx_ring->enqueue_tq = taskqueue_create_fast("al_rx_enque", M_NOWAIT,
2509             taskqueue_thread_enqueue, &rx_ring->enqueue_tq);
2510         taskqueue_start_threads(&rx_ring->enqueue_tq, 1, PI_NET, "%s rxeq",
2511             device_get_nameunit(adapter->dev));
2512
2513         /* Setup DMA descriptor areas. */
2514         ret = bus_dma_tag_create(bus_get_dma_tag(dev),
2515             1, 0,                       /* alignment, bounds */
2516             BUS_SPACE_MAXADDR,          /* lowaddr */
2517             BUS_SPACE_MAXADDR,          /* highaddr */
2518             NULL, NULL,                 /* filter, filterarg */
2519             AL_TSO_SIZE,                /* maxsize */
2520             1,                          /* nsegments */
2521             AL_TSO_SIZE,                /* maxsegsize */
2522             0,                          /* flags */
2523             NULL,                       /* lockfunc */
2524             NULL,                       /* lockfuncarg */
2525             &rx_ring->dma_buf_tag);
2526
2527         if (ret != 0) {
2528                 device_printf(dev,"Unable to allocate RX dma_buf_tag\n");
2529                 return (ret);
2530         }
2531
2532         for (size = 0; size < rx_ring->sw_count; size++) {
2533                 ret = bus_dmamap_create(rx_ring->dma_buf_tag, 0,
2534                     &rx_ring->rx_buffer_info[size].dma_map);
2535                 if (ret != 0) {
2536                         device_printf(dev,"Unable to map DMA RX buffer memory\n");
2537                         return (ret);
2538                 }
2539         }
2540
2541         /* Zero out the descriptor ring */
2542         memset(q_params->cdesc_base, 0, rx_ring->cdescs_size);
2543
2544         /* Create LRO for the ring */
2545         if ((adapter->netdev->if_capenable & IFCAP_LRO) != 0) {
2546                 int err = tcp_lro_init(&rx_ring->lro);
2547                 if (err != 0) {
2548                         device_printf(adapter->dev,
2549                             "LRO[%d] Initialization failed!\n", qid);
2550                 } else {
2551                         device_printf_dbg(adapter->dev,
2552                             "RX Soft LRO[%d] Initialized\n", qid);
2553                         rx_ring->lro_enabled = TRUE;
2554                         rx_ring->lro.ifp = adapter->netdev;
2555                 }
2556         }
2557
2558         rx_ring->next_to_clean = 0;
2559         rx_ring->next_to_use = 0;
2560
2561         return (0);
2562 }
2563
2564 /*
2565  * al_eth_free_rx_resources - Free Rx Resources
2566  * @adapter: network interface device structure
2567  * @qid: queue index
2568  *
2569  * Free all receive software resources
2570  */
2571 static void
2572 al_eth_free_rx_resources(struct al_eth_adapter *adapter, unsigned int qid)
2573 {
2574         struct al_eth_ring *rx_ring = &adapter->rx_ring[qid];
2575         struct al_udma_q_params *q_params = &rx_ring->q_params;
2576         int size;
2577
2578         /* At this point interrupts' handlers must be deactivated */
2579         while (taskqueue_cancel(rx_ring->enqueue_tq,
2580             &rx_ring->enqueue_task, NULL)) {
2581                 taskqueue_drain(rx_ring->enqueue_tq, &rx_ring->enqueue_task);
2582         }
2583
2584         taskqueue_free(rx_ring->enqueue_tq);
2585
2586         for (size = 0; size < rx_ring->sw_count; size++) {
2587                 m_freem(rx_ring->rx_buffer_info[size].m);
2588                 rx_ring->rx_buffer_info[size].m = NULL;
2589                 bus_dmamap_unload(rx_ring->dma_buf_tag,
2590                     rx_ring->rx_buffer_info[size].dma_map);
2591                 bus_dmamap_destroy(rx_ring->dma_buf_tag,
2592                     rx_ring->rx_buffer_info[size].dma_map);
2593         }
2594         bus_dma_tag_destroy(rx_ring->dma_buf_tag);
2595
2596         free(rx_ring->rx_buffer_info, M_IFAL);
2597         rx_ring->rx_buffer_info = NULL;
2598
2599         /* if not set, then don't free */
2600         if (q_params->desc_base == NULL)
2601                 return;
2602
2603         al_dma_free_coherent(q_params->desc_phy_base_tag,
2604             q_params->desc_phy_base_map, q_params->desc_base);
2605
2606         q_params->desc_base = NULL;
2607
2608         /* if not set, then don't free */
2609         if (q_params->cdesc_base == NULL)
2610                 return;
2611
2612         al_dma_free_coherent(q_params->cdesc_phy_base_tag,
2613             q_params->cdesc_phy_base_map, q_params->cdesc_base);
2614
2615         q_params->cdesc_phy_base = 0;
2616
2617         /* Free LRO resources */
2618         tcp_lro_free(&rx_ring->lro);
2619 }
2620
2621 /*
2622  * al_eth_free_all_rx_resources - Free Rx Resources for All Queues
2623  * @adapter: board private structure
2624  *
2625  * Free all receive software resources
2626  */
2627 static void
2628 al_eth_free_all_rx_resources(struct al_eth_adapter *adapter)
2629 {
2630         int i;
2631
2632         for (i = 0; i < adapter->num_rx_queues; i++)
2633                 if (adapter->rx_ring[i].q_params.desc_base != 0)
2634                         al_eth_free_rx_resources(adapter, i);
2635 }
2636
2637 /*
2638  * al_eth_setup_all_rx_resources - allocate all queues Rx resources
2639  * @adapter: board private structure
2640  *
2641  * Return 0 on success, negative on failure
2642  */
2643 static int
2644 al_eth_setup_all_rx_resources(struct al_eth_adapter *adapter)
2645 {
2646         int i, rc = 0;
2647
2648         for (i = 0; i < adapter->num_rx_queues; i++) {
2649                 rc = al_eth_setup_rx_resources(adapter, i);
2650                 if (rc == 0)
2651                         continue;
2652
2653                 device_printf(adapter->dev, "Allocation for Rx Queue %u failed\n", i);
2654                 goto err_setup_rx;
2655         }
2656         return (0);
2657
2658 err_setup_rx:
2659         /* rewind the index freeing the rings as we go */
2660         while (i--)
2661                 al_eth_free_rx_resources(adapter, i);
2662         return (rc);
2663 }
2664
2665 /*
2666  * al_eth_setup_all_tx_resources - allocate all queues Tx resources
2667  * @adapter: private structure
2668  *
2669  * Return 0 on success, negative on failure
2670  */
2671 static int
2672 al_eth_setup_all_tx_resources(struct al_eth_adapter *adapter)
2673 {
2674         int i, rc = 0;
2675
2676         for (i = 0; i < adapter->num_tx_queues; i++) {
2677                 rc = al_eth_setup_tx_resources(adapter, i);
2678                 if (rc == 0)
2679                         continue;
2680
2681                 device_printf(adapter->dev,
2682                     "Allocation for Tx Queue %u failed\n", i);
2683                 goto err_setup_tx;
2684         }
2685
2686         return (0);
2687
2688 err_setup_tx:
2689         /* rewind the index freeing the rings as we go */
2690         while (i--)
2691                 al_eth_free_tx_resources(adapter, i);
2692
2693         return (rc);
2694 }
2695
2696 static void
2697 al_eth_disable_int_sync(struct al_eth_adapter *adapter)
2698 {
2699
2700         /* disable forwarding interrupts from eth through pci end point */
2701         if ((adapter->board_type == ALPINE_FPGA_NIC) ||
2702             (adapter->board_type == ALPINE_NIC)) {
2703                 al_eth_forward_int_config((uint32_t*)adapter->internal_pcie_base +
2704                     AL_REG_OFFSET_FORWARD_INTR, AL_DIS_FORWARD_INTR);
2705         }
2706
2707         /* mask hw interrupts */
2708         al_eth_interrupts_mask(adapter);
2709 }
2710
2711 static void
2712 al_eth_interrupts_unmask(struct al_eth_adapter *adapter)
2713 {
2714         uint32_t group_a_mask = AL_INT_GROUP_A_GROUP_D_SUM; /* enable group D summery */
2715         uint32_t group_b_mask = (1 << adapter->num_rx_queues) - 1;/* bit per Rx q*/
2716         uint32_t group_c_mask = (1 << adapter->num_tx_queues) - 1;/* bit per Tx q*/
2717         uint32_t group_d_mask = 3 << 8;
2718         struct unit_regs __iomem *regs_base =
2719             (struct unit_regs __iomem *)adapter->udma_base;
2720
2721         if (adapter->int_mode == AL_IOFIC_MODE_LEGACY)
2722                 group_a_mask |= AL_INT_GROUP_A_GROUP_B_SUM |
2723                     AL_INT_GROUP_A_GROUP_C_SUM |
2724                     AL_INT_GROUP_A_GROUP_D_SUM;
2725
2726         al_udma_iofic_unmask(regs_base, AL_UDMA_IOFIC_LEVEL_PRIMARY,
2727             AL_INT_GROUP_A, group_a_mask);
2728         al_udma_iofic_unmask(regs_base, AL_UDMA_IOFIC_LEVEL_PRIMARY,
2729             AL_INT_GROUP_B, group_b_mask);
2730         al_udma_iofic_unmask(regs_base, AL_UDMA_IOFIC_LEVEL_PRIMARY,
2731             AL_INT_GROUP_C, group_c_mask);
2732         al_udma_iofic_unmask(regs_base, AL_UDMA_IOFIC_LEVEL_PRIMARY,
2733             AL_INT_GROUP_D, group_d_mask);
2734 }
2735
2736 static void
2737 al_eth_interrupts_mask(struct al_eth_adapter *adapter)
2738 {
2739         struct unit_regs __iomem *regs_base =
2740             (struct unit_regs __iomem *)adapter->udma_base;
2741
2742         /* mask all interrupts */
2743         al_udma_iofic_mask(regs_base, AL_UDMA_IOFIC_LEVEL_PRIMARY,
2744             AL_INT_GROUP_A, AL_MASK_GROUP_A_INT);
2745         al_udma_iofic_mask(regs_base, AL_UDMA_IOFIC_LEVEL_PRIMARY,
2746             AL_INT_GROUP_B, AL_MASK_GROUP_B_INT);
2747         al_udma_iofic_mask(regs_base, AL_UDMA_IOFIC_LEVEL_PRIMARY,
2748             AL_INT_GROUP_C, AL_MASK_GROUP_C_INT);
2749         al_udma_iofic_mask(regs_base, AL_UDMA_IOFIC_LEVEL_PRIMARY,
2750             AL_INT_GROUP_D, AL_MASK_GROUP_D_INT);
2751 }
2752
2753 static int
2754 al_eth_configure_int_mode(struct al_eth_adapter *adapter)
2755 {
2756         enum al_iofic_mode int_mode;
2757         uint32_t m2s_errors_disable = AL_M2S_MASK_INIT;
2758         uint32_t m2s_aborts_disable = AL_M2S_MASK_INIT;
2759         uint32_t s2m_errors_disable = AL_S2M_MASK_INIT;
2760         uint32_t s2m_aborts_disable = AL_S2M_MASK_INIT;
2761
2762         /* single INTX mode */
2763         if (adapter->msix_vecs == 0)
2764                 int_mode = AL_IOFIC_MODE_LEGACY;
2765         else if (adapter->msix_vecs > 1)
2766                 int_mode = AL_IOFIC_MODE_MSIX_PER_Q;
2767         else {
2768                 device_printf(adapter->dev,
2769                     "udma doesn't support single MSI-X mode yet.\n");
2770                 return (EIO);
2771         }
2772
2773         if (adapter->board_type != ALPINE_INTEGRATED) {
2774                 m2s_errors_disable |= AL_M2S_S2M_MASK_NOT_INT;
2775                 m2s_errors_disable |= AL_M2S_S2M_MASK_NOT_INT;
2776                 s2m_aborts_disable |= AL_M2S_S2M_MASK_NOT_INT;
2777                 s2m_aborts_disable |= AL_M2S_S2M_MASK_NOT_INT;
2778         }
2779
2780         if (al_udma_iofic_config((struct unit_regs __iomem *)adapter->udma_base,
2781             int_mode, m2s_errors_disable, m2s_aborts_disable,
2782             s2m_errors_disable, s2m_aborts_disable)) {
2783                 device_printf(adapter->dev,
2784                     "al_udma_unit_int_config failed!.\n");
2785                 return (EIO);
2786         }
2787         adapter->int_mode = int_mode;
2788         device_printf_dbg(adapter->dev, "using %s interrupt mode\n",
2789             int_mode == AL_IOFIC_MODE_LEGACY ? "INTx" :
2790             int_mode == AL_IOFIC_MODE_MSIX_PER_Q ? "MSI-X per Queue" : "Unknown");
2791         /* set interrupt moderation resolution to 15us */
2792         al_iofic_moder_res_config(&((struct unit_regs *)(adapter->udma_base))->gen.interrupt_regs.main_iofic, AL_INT_GROUP_B, 15);
2793         al_iofic_moder_res_config(&((struct unit_regs *)(adapter->udma_base))->gen.interrupt_regs.main_iofic, AL_INT_GROUP_C, 15);
2794         /* by default interrupt coalescing is disabled */
2795         adapter->tx_usecs = 0;
2796         adapter->rx_usecs = 0;
2797
2798         return (0);
2799 }
2800
2801 /*
2802  * ethtool_rxfh_indir_default - get default value for RX flow hash indirection
2803  * @index: Index in RX flow hash indirection table
2804  * @n_rx_rings: Number of RX rings to use
2805  *
2806  * This function provides the default policy for RX flow hash indirection.
2807  */
2808 static inline uint32_t
2809 ethtool_rxfh_indir_default(uint32_t index, uint32_t n_rx_rings)
2810 {
2811
2812         return (index % n_rx_rings);
2813 }
2814
2815 static void*
2816 al_eth_update_stats(struct al_eth_adapter *adapter)
2817 {
2818         struct al_eth_mac_stats *mac_stats = &adapter->mac_stats;
2819
2820         if (adapter->up == 0)
2821                 return (NULL);
2822
2823         al_eth_mac_stats_get(&adapter->hal_adapter, mac_stats);
2824
2825         return (NULL);
2826 }
2827
2828 static uint64_t
2829 al_get_counter(struct ifnet *ifp, ift_counter cnt)
2830 {
2831         struct al_eth_adapter *adapter;
2832         struct al_eth_mac_stats *mac_stats;
2833         uint64_t rv;
2834
2835         adapter = if_getsoftc(ifp);
2836         mac_stats = &adapter->mac_stats;
2837
2838         switch (cnt) {
2839         case IFCOUNTER_IPACKETS:
2840                 return (mac_stats->aFramesReceivedOK); /* including pause frames */
2841         case IFCOUNTER_OPACKETS:
2842                 return (mac_stats->aFramesTransmittedOK);
2843         case IFCOUNTER_IBYTES:
2844                 return (mac_stats->aOctetsReceivedOK);
2845         case IFCOUNTER_OBYTES:
2846                 return (mac_stats->aOctetsTransmittedOK);
2847         case IFCOUNTER_IMCASTS:
2848                 return (mac_stats->ifInMulticastPkts);
2849         case IFCOUNTER_OMCASTS:
2850                 return (mac_stats->ifOutMulticastPkts);
2851         case IFCOUNTER_COLLISIONS:
2852                 return (0);
2853         case IFCOUNTER_IQDROPS:
2854                 return (mac_stats->etherStatsDropEvents);
2855         case IFCOUNTER_IERRORS:
2856                 rv = mac_stats->ifInErrors +
2857                     mac_stats->etherStatsUndersizePkts + /* good but short */
2858                     mac_stats->etherStatsFragments + /* short and bad*/
2859                     mac_stats->etherStatsJabbers + /* with crc errors */
2860                     mac_stats->etherStatsOversizePkts +
2861                     mac_stats->aFrameCheckSequenceErrors +
2862                     mac_stats->aAlignmentErrors;
2863                 return (rv);
2864         case IFCOUNTER_OERRORS:
2865                 return (mac_stats->ifOutErrors);
2866         default:
2867                 return (if_get_counter_default(ifp, cnt));
2868         }
2869 }
2870
2871 /*
2872  *  Unicast, Multicast and Promiscuous mode set
2873  *
2874  *  The set_rx_mode entry point is called whenever the unicast or multicast
2875  *  address lists or the network interface flags are updated.  This routine is
2876  *  responsible for configuring the hardware for proper unicast, multicast,
2877  *  promiscuous mode, and all-multi behavior.
2878  */
2879 #define MAX_NUM_MULTICAST_ADDRESSES 32
2880 #define MAX_NUM_ADDRESSES           32
2881
2882 static void
2883 al_eth_set_rx_mode(struct al_eth_adapter *adapter)
2884 {
2885         struct ifnet *ifp = adapter->netdev;
2886         struct ifmultiaddr *ifma; /* multicast addresses configured */
2887         struct ifaddr *ifua; /* unicast address */
2888         int mc = 0;
2889         int uc = 0;
2890         uint8_t i;
2891         unsigned char *mac;
2892
2893         if_maddr_rlock(ifp);
2894         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2895                 if (ifma->ifma_addr->sa_family != AF_LINK)
2896                         continue;
2897                 if (mc == MAX_NUM_MULTICAST_ADDRESSES)
2898                         break;
2899
2900                 mac = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
2901                 /* default mc address inside mac address */
2902                 if (mac[3] != 0 && mac[4] != 0 && mac[5] != 1)
2903                         mc++;
2904         }
2905         if_maddr_runlock(ifp);
2906
2907         if_addr_rlock(ifp);
2908         TAILQ_FOREACH(ifua, &ifp->if_addrhead, ifa_link) {
2909                 if (ifua->ifa_addr->sa_family != AF_LINK)
2910                         continue;
2911                 if (uc == MAX_NUM_ADDRESSES)
2912                         break;
2913                 uc++;
2914         }
2915         if_addr_runlock(ifp);
2916
2917         if ((ifp->if_flags & IFF_PROMISC) != 0) {
2918                 al_eth_mac_table_promiscuous_set(adapter, true);
2919         } else {
2920                 if ((ifp->if_flags & IFF_ALLMULTI) != 0) {
2921                         /* This interface is in all-multicasts mode (used by multicast routers). */
2922                         al_eth_mac_table_all_multicast_add(adapter,
2923                             AL_ETH_MAC_TABLE_ALL_MULTICAST_IDX, 1);
2924                 } else {
2925                         if (mc == 0) {
2926                                 al_eth_mac_table_entry_clear(adapter,
2927                                     AL_ETH_MAC_TABLE_ALL_MULTICAST_IDX);
2928                         } else {
2929                                 al_eth_mac_table_all_multicast_add(adapter,
2930                                     AL_ETH_MAC_TABLE_ALL_MULTICAST_IDX, 1);
2931                         }
2932                 }
2933                 if (uc != 0) {
2934                         i = AL_ETH_MAC_TABLE_UNICAST_IDX_BASE + 1;
2935                         if (uc > AL_ETH_MAC_TABLE_UNICAST_MAX_COUNT) {
2936                                 /*
2937                                  * In this case there are more addresses then
2938                                  * entries in the mac table - set promiscuous
2939                                  */
2940                                 al_eth_mac_table_promiscuous_set(adapter, true);
2941                                 return;
2942                         }
2943
2944                         /* clear the last configuration */
2945                         while (i < (AL_ETH_MAC_TABLE_UNICAST_IDX_BASE +
2946                                     AL_ETH_MAC_TABLE_UNICAST_MAX_COUNT)) {
2947                                 al_eth_mac_table_entry_clear(adapter, i);
2948                                 i++;
2949                         }
2950
2951                         /* set new addresses */
2952                         i = AL_ETH_MAC_TABLE_UNICAST_IDX_BASE + 1;
2953                         if_addr_rlock(ifp);
2954                         TAILQ_FOREACH(ifua, &ifp->if_addrhead, ifa_link) {
2955                                 if (ifua->ifa_addr->sa_family != AF_LINK) {
2956                                         continue;
2957                                 }
2958                                 al_eth_mac_table_unicast_add(adapter, i,
2959                                     (unsigned char *)ifua->ifa_addr, 1);
2960                                 i++;
2961                         }
2962                         if_addr_runlock(ifp);
2963
2964                 }
2965                 al_eth_mac_table_promiscuous_set(adapter, false);
2966         }
2967 }
2968
2969 static void
2970 al_eth_config_rx_fwd(struct al_eth_adapter *adapter)
2971 {
2972         struct al_eth_fwd_ctrl_table_entry entry;
2973         int i;
2974
2975         /* let priority be equal to pbits */
2976         for (i = 0; i < AL_ETH_FWD_PBITS_TABLE_NUM; i++)
2977                 al_eth_fwd_pbits_table_set(&adapter->hal_adapter, i, i);
2978
2979         /* map priority to queue index, queue id = priority/2 */
2980         for (i = 0; i < AL_ETH_FWD_PRIO_TABLE_NUM; i++)
2981                 al_eth_fwd_priority_table_set(&adapter->hal_adapter, i, i >> 1);
2982
2983         entry.prio_sel = AL_ETH_CTRL_TABLE_PRIO_SEL_VAL_0;
2984         entry.queue_sel_1 = AL_ETH_CTRL_TABLE_QUEUE_SEL_1_THASH_TABLE;
2985         entry.queue_sel_2 = AL_ETH_CTRL_TABLE_QUEUE_SEL_2_NO_PRIO;
2986         entry.udma_sel = AL_ETH_CTRL_TABLE_UDMA_SEL_MAC_TABLE;
2987         entry.filter = FALSE;
2988
2989         al_eth_ctrl_table_def_set(&adapter->hal_adapter, FALSE, &entry);
2990
2991         /*
2992          * By default set the mac table to forward all unicast packets to our
2993          * MAC address and all broadcast. all the rest will be dropped.
2994          */
2995         al_eth_mac_table_unicast_add(adapter, AL_ETH_MAC_TABLE_UNICAST_IDX_BASE,
2996             adapter->mac_addr, 1);
2997         al_eth_mac_table_broadcast_add(adapter, AL_ETH_MAC_TABLE_BROADCAST_IDX, 1);
2998         al_eth_mac_table_promiscuous_set(adapter, false);
2999
3000         /* set toeplitz hash keys */
3001         for (i = 0; i < sizeof(adapter->toeplitz_hash_key); i++)
3002                 *((uint8_t*)adapter->toeplitz_hash_key + i) = (uint8_t)random();
3003
3004         for (i = 0; i < AL_ETH_RX_HASH_KEY_NUM; i++)
3005                 al_eth_hash_key_set(&adapter->hal_adapter, i,
3006                     htonl(adapter->toeplitz_hash_key[i]));
3007
3008         for (i = 0; i < AL_ETH_RX_RSS_TABLE_SIZE; i++) {
3009                 adapter->rss_ind_tbl[i] = ethtool_rxfh_indir_default(i,
3010                     AL_ETH_NUM_QUEUES);
3011                 al_eth_set_thash_table_entry(adapter, i, 0,
3012                     adapter->rss_ind_tbl[i]);
3013         }
3014
3015         al_eth_fsm_table_init(adapter);
3016 }
3017
3018 static void
3019 al_eth_req_rx_buff_size(struct al_eth_adapter *adapter, int size)
3020 {
3021
3022         /*
3023         * Determine the correct mbuf pool
3024         * for doing jumbo frames
3025         * Try from the smallest up to maximum supported
3026         */
3027         adapter->rx_mbuf_sz = MCLBYTES;
3028         if (size > 2048) {
3029                 if (adapter->max_rx_buff_alloc_size > 2048)
3030                         adapter->rx_mbuf_sz = MJUMPAGESIZE;
3031                 else
3032                         return;
3033         }
3034         if (size > 4096) {
3035                 if (adapter->max_rx_buff_alloc_size > 4096)
3036                         adapter->rx_mbuf_sz = MJUM9BYTES;
3037                 else
3038                         return;
3039         }
3040         if (size > 9216) {
3041                 if (adapter->max_rx_buff_alloc_size > 9216)
3042                         adapter->rx_mbuf_sz = MJUM16BYTES;
3043                 else
3044                         return;
3045         }
3046 }
3047
3048 static int
3049 al_eth_change_mtu(struct al_eth_adapter *adapter, int new_mtu)
3050 {
3051         int max_frame = new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN +
3052             ETHER_VLAN_ENCAP_LEN;
3053
3054         al_eth_req_rx_buff_size(adapter, new_mtu);
3055
3056         device_printf_dbg(adapter->dev, "set MTU to %d\n", new_mtu);
3057         al_eth_rx_pkt_limit_config(&adapter->hal_adapter,
3058             AL_ETH_MIN_FRAME_LEN, max_frame);
3059
3060         al_eth_tso_mss_config(&adapter->hal_adapter, 0, new_mtu - 100);
3061
3062         return (0);
3063 }
3064
3065 static int
3066 al_eth_check_mtu(struct al_eth_adapter *adapter, int new_mtu)
3067 {
3068         int max_frame = new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + ETHER_VLAN_ENCAP_LEN;
3069
3070         if ((new_mtu < AL_ETH_MIN_FRAME_LEN) ||
3071             (max_frame > AL_ETH_MAX_FRAME_LEN)) {
3072                 return (EINVAL);
3073         }
3074
3075         return (0);
3076 }
3077
3078 static int
3079 al_eth_udma_queue_enable(struct al_eth_adapter *adapter, enum al_udma_type type,
3080     int qid)
3081 {
3082         int rc = 0;
3083         char *name = (type == UDMA_TX) ? "Tx" : "Rx";
3084         struct al_udma_q_params *q_params;
3085
3086         if (type == UDMA_TX)
3087                 q_params = &adapter->tx_ring[qid].q_params;
3088         else
3089                 q_params = &adapter->rx_ring[qid].q_params;
3090
3091         rc = al_eth_queue_config(&adapter->hal_adapter, type, qid, q_params);
3092         if (rc < 0) {
3093                 device_printf(adapter->dev, "config %s queue %u failed\n", name,
3094                     qid);
3095                 return (rc);
3096         }
3097         return (rc);
3098 }
3099
3100 static int
3101 al_eth_udma_queues_enable_all(struct al_eth_adapter *adapter)
3102 {
3103         int i;
3104
3105         for (i = 0; i < adapter->num_tx_queues; i++)
3106                 al_eth_udma_queue_enable(adapter, UDMA_TX, i);
3107
3108         for (i = 0; i < adapter->num_rx_queues; i++)
3109                 al_eth_udma_queue_enable(adapter, UDMA_RX, i);
3110
3111         return (0);
3112 }
3113
3114 static void
3115 al_eth_up_complete(struct al_eth_adapter *adapter)
3116 {
3117
3118         al_eth_configure_int_mode(adapter);
3119         al_eth_config_rx_fwd(adapter);
3120         al_eth_change_mtu(adapter, adapter->netdev->if_mtu);
3121         al_eth_udma_queues_enable_all(adapter);
3122         al_eth_refill_all_rx_bufs(adapter);
3123         al_eth_interrupts_unmask(adapter);
3124
3125         /* enable forwarding interrupts from eth through pci end point */
3126         if ((adapter->board_type == ALPINE_FPGA_NIC) ||
3127             (adapter->board_type == ALPINE_NIC)) {
3128                 al_eth_forward_int_config((uint32_t*)adapter->internal_pcie_base +
3129                     AL_REG_OFFSET_FORWARD_INTR, AL_EN_FORWARD_INTR);
3130         }
3131
3132         al_eth_flow_ctrl_enable(adapter);
3133
3134         mtx_lock(&adapter->stats_mtx);
3135         callout_reset(&adapter->stats_callout, hz, al_tick_stats, (void*)adapter);
3136         mtx_unlock(&adapter->stats_mtx);
3137
3138         al_eth_mac_start(&adapter->hal_adapter);
3139 }
3140
3141 static int
3142 al_media_update(struct ifnet *ifp)
3143 {
3144         struct al_eth_adapter *adapter = ifp->if_softc;
3145
3146         if ((ifp->if_flags & IFF_UP) != 0)
3147                 mii_mediachg(adapter->mii);
3148
3149         return (0);
3150 }
3151
3152 static void
3153 al_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
3154 {
3155         struct al_eth_adapter *sc = ifp->if_softc;
3156         struct mii_data *mii;
3157
3158         if (sc->mii == NULL) {
3159                 ifmr->ifm_active = IFM_ETHER | IFM_NONE;
3160                 ifmr->ifm_status = 0;
3161
3162                 return;
3163         }
3164
3165         mii = sc->mii;
3166         mii_pollstat(mii);
3167
3168         ifmr->ifm_active = mii->mii_media_active;
3169         ifmr->ifm_status = mii->mii_media_status;
3170 }
3171
3172 static void
3173 al_tick(void *arg)
3174 {
3175         struct al_eth_adapter *adapter = arg;
3176
3177         mii_tick(adapter->mii);
3178
3179         /* Schedule another timeout one second from now */
3180         callout_schedule(&adapter->wd_callout, hz);
3181 }
3182
3183 static void
3184 al_tick_stats(void *arg)
3185 {
3186         struct al_eth_adapter *adapter = arg;
3187
3188         al_eth_update_stats(adapter);
3189
3190         callout_schedule(&adapter->stats_callout, hz);
3191 }
3192
3193 static int
3194 al_eth_up(struct al_eth_adapter *adapter)
3195 {
3196         struct ifnet *ifp = adapter->netdev;
3197         int rc;
3198
3199         if (adapter->up)
3200                 return (0);
3201
3202         if ((adapter->flags & AL_ETH_FLAG_RESET_REQUESTED) != 0) {
3203                 al_eth_function_reset(adapter);
3204                 adapter->flags &= ~AL_ETH_FLAG_RESET_REQUESTED;
3205         }
3206
3207         ifp->if_hwassist = 0;
3208         if ((ifp->if_capenable & IFCAP_TSO) != 0)
3209                 ifp->if_hwassist |= CSUM_TSO;
3210         if ((ifp->if_capenable & IFCAP_TXCSUM) != 0)
3211                 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP);
3212         if ((ifp->if_capenable & IFCAP_TXCSUM_IPV6) != 0)
3213                 ifp->if_hwassist |= (CSUM_TCP_IPV6 | CSUM_UDP_IPV6);
3214
3215         al_eth_serdes_init(adapter);
3216
3217         rc = al_eth_hw_init(adapter);
3218         if (rc != 0)
3219                 goto err_hw_init_open;
3220
3221         rc = al_eth_setup_int_mode(adapter);
3222         if (rc != 0) {
3223                 device_printf(adapter->dev,
3224                     "%s failed at setup interrupt mode!\n", __func__);
3225                 goto err_setup_int;
3226         }
3227
3228         /* allocate transmit descriptors */
3229         rc = al_eth_setup_all_tx_resources(adapter);
3230         if (rc != 0)
3231                 goto err_setup_tx;
3232
3233         /* allocate receive descriptors */
3234         rc = al_eth_setup_all_rx_resources(adapter);
3235         if (rc != 0)
3236                 goto err_setup_rx;
3237
3238         rc = al_eth_request_irq(adapter);
3239         if (rc != 0)
3240                 goto err_req_irq;
3241
3242         al_eth_up_complete(adapter);
3243
3244         adapter->up = true;
3245
3246         if (adapter->mac_mode == AL_ETH_MAC_MODE_10GbE_Serial)
3247                 adapter->netdev->if_link_state = LINK_STATE_UP;
3248
3249         if (adapter->mac_mode == AL_ETH_MAC_MODE_RGMII) {
3250                 mii_mediachg(adapter->mii);
3251
3252                 /* Schedule watchdog timeout */
3253                 mtx_lock(&adapter->wd_mtx);
3254                 callout_reset(&adapter->wd_callout, hz, al_tick, adapter);
3255                 mtx_unlock(&adapter->wd_mtx);
3256
3257                 mii_pollstat(adapter->mii);
3258         }
3259
3260         return (rc);
3261
3262 err_req_irq:
3263         al_eth_free_all_rx_resources(adapter);
3264 err_setup_rx:
3265         al_eth_free_all_tx_resources(adapter);
3266 err_setup_tx:
3267         al_eth_free_irq(adapter);
3268 err_setup_int:
3269         al_eth_hw_stop(adapter);
3270 err_hw_init_open:
3271         al_eth_function_reset(adapter);
3272
3273         return (rc);
3274 }
3275
3276 static int
3277 al_shutdown(device_t dev)
3278 {
3279         struct al_eth_adapter *adapter = device_get_softc(dev);
3280
3281         al_eth_down(adapter);
3282
3283         return (0);
3284 }
3285
3286 static void
3287 al_eth_down(struct al_eth_adapter *adapter)
3288 {
3289
3290         device_printf_dbg(adapter->dev, "al_eth_down: begin\n");
3291
3292         adapter->up = false;
3293
3294         mtx_lock(&adapter->wd_mtx);
3295         callout_stop(&adapter->wd_callout);
3296         mtx_unlock(&adapter->wd_mtx);
3297
3298         al_eth_disable_int_sync(adapter);
3299
3300         mtx_lock(&adapter->stats_mtx);
3301         callout_stop(&adapter->stats_callout);
3302         mtx_unlock(&adapter->stats_mtx);
3303
3304         al_eth_free_irq(adapter);
3305         al_eth_hw_stop(adapter);
3306
3307         al_eth_free_all_tx_resources(adapter);
3308         al_eth_free_all_rx_resources(adapter);
3309 }
3310
3311 static int
3312 al_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
3313 {
3314         struct al_eth_adapter   *adapter = ifp->if_softc;
3315         struct ifreq            *ifr = (struct ifreq *)data;
3316         int                     error = 0;
3317
3318         switch (command) {
3319         case SIOCSIFMTU:
3320         {
3321                 error = al_eth_check_mtu(adapter, ifr->ifr_mtu);
3322                 if (error != 0) {
3323                         device_printf(adapter->dev, "ioctl wrong mtu %u\n",
3324                             adapter->netdev->if_mtu);
3325                         break;
3326                 }
3327
3328                 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
3329                 adapter->netdev->if_mtu = ifr->ifr_mtu;
3330                 al_init(adapter);
3331                 break;
3332         }
3333         case SIOCSIFFLAGS:
3334                 if ((ifp->if_flags & IFF_UP) != 0) {
3335                         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
3336                                 if (((ifp->if_flags ^ adapter->if_flags) &
3337                                     (IFF_PROMISC | IFF_ALLMULTI)) != 0) {
3338                                         device_printf_dbg(adapter->dev,
3339                                             "ioctl promisc/allmulti\n");
3340                                         al_eth_set_rx_mode(adapter);
3341                                 }
3342                         } else {
3343                                 error = al_eth_up(adapter);
3344                                 if (error == 0)
3345                                         ifp->if_drv_flags |= IFF_DRV_RUNNING;
3346                         }
3347                 } else {
3348                         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
3349                                 al_eth_down(adapter);
3350                                 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
3351                         }
3352                 }
3353
3354                 adapter->if_flags = ifp->if_flags;
3355                 break;
3356
3357         case SIOCADDMULTI:
3358         case SIOCDELMULTI:
3359                 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
3360                         device_printf_dbg(adapter->dev,
3361                             "ioctl add/del multi before\n");
3362                         al_eth_set_rx_mode(adapter);
3363 #ifdef DEVICE_POLLING
3364                         if ((ifp->if_capenable & IFCAP_POLLING) == 0)
3365 #endif
3366                 }
3367                 break;
3368         case SIOCSIFMEDIA:
3369         case SIOCGIFMEDIA:
3370                 if (adapter->mii != NULL)
3371                         error = ifmedia_ioctl(ifp, ifr,
3372                             &adapter->mii->mii_media, command);
3373                 else
3374                         error = ifmedia_ioctl(ifp, ifr,
3375                             &adapter->media, command);
3376                 break;
3377         case SIOCSIFCAP:
3378             {
3379                 int mask, reinit;
3380
3381                 reinit = 0;
3382                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
3383 #ifdef DEVICE_POLLING
3384                 if ((mask & IFCAP_POLLING) != 0) {
3385                         if ((ifr->ifr_reqcap & IFCAP_POLLING) != 0) {
3386                                 if (error != 0)
3387                                         return (error);
3388                                 ifp->if_capenable |= IFCAP_POLLING;
3389                         } else {
3390                                 error = ether_poll_deregister(ifp);
3391                                 /* Enable interrupt even in error case */
3392                                 ifp->if_capenable &= ~IFCAP_POLLING;
3393                         }
3394                 }
3395 #endif
3396                 if ((mask & IFCAP_HWCSUM) != 0) {
3397                         /* apply to both rx and tx */
3398                         ifp->if_capenable ^= IFCAP_HWCSUM;
3399                         reinit = 1;
3400                 }
3401                 if ((mask & IFCAP_HWCSUM_IPV6) != 0) {
3402                         ifp->if_capenable ^= IFCAP_HWCSUM_IPV6;
3403                         reinit = 1;
3404                 }
3405                 if ((mask & IFCAP_TSO) != 0) {
3406                         ifp->if_capenable ^= IFCAP_TSO;
3407                         reinit = 1;
3408                 }
3409                 if ((mask & IFCAP_LRO) != 0) {
3410                         ifp->if_capenable ^= IFCAP_LRO;
3411                 }
3412                 if ((mask & IFCAP_VLAN_HWTAGGING) != 0) {
3413                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
3414                         reinit = 1;
3415                 }
3416                 if ((mask & IFCAP_VLAN_HWFILTER) != 0) {
3417                         ifp->if_capenable ^= IFCAP_VLAN_HWFILTER;
3418                         reinit = 1;
3419                 }
3420                 if ((mask & IFCAP_VLAN_HWTSO) != 0) {
3421                         ifp->if_capenable ^= IFCAP_VLAN_HWTSO;
3422                         reinit = 1;
3423                 }
3424                 if ((reinit != 0) &&
3425                     ((ifp->if_drv_flags & IFF_DRV_RUNNING)) != 0)
3426                 {
3427                         al_init(adapter);
3428                 }
3429                 break;
3430             }
3431
3432         default:
3433                 error = ether_ioctl(ifp, command, data);
3434                 break;
3435         }
3436
3437         return (error);
3438 }
3439
3440 static int
3441 al_is_device_supported(device_t dev)
3442 {
3443         uint16_t pci_vendor_id = pci_get_vendor(dev);
3444         uint16_t pci_device_id = pci_get_device(dev);
3445
3446         return (pci_vendor_id == PCI_VENDOR_ID_ANNAPURNA_LABS &&
3447             (pci_device_id == PCI_DEVICE_ID_AL_ETH ||
3448             pci_device_id == PCI_DEVICE_ID_AL_ETH_ADVANCED ||
3449             pci_device_id == PCI_DEVICE_ID_AL_ETH_NIC ||
3450             pci_device_id == PCI_DEVICE_ID_AL_ETH_FPGA_NIC));
3451 }
3452
3453 /* Time in mSec to keep trying to read / write from MDIO in case of error */
3454 #define MDIO_TIMEOUT_MSEC       100
3455 #define MDIO_PAUSE_MSEC         10
3456
3457 static int
3458 al_miibus_readreg(device_t dev, int phy, int reg)
3459 {
3460         struct al_eth_adapter *adapter = device_get_softc(dev);
3461         uint16_t value = 0;
3462         int rc;
3463         int timeout = MDIO_TIMEOUT_MSEC;
3464
3465         while (timeout > 0) {
3466                 rc = al_eth_mdio_read(&adapter->hal_adapter, adapter->phy_addr,
3467                     -1, reg, &value);
3468
3469                 if (rc == 0)
3470                         return (value);
3471
3472                 device_printf_dbg(adapter->dev,
3473                     "mdio read failed. try again in 10 msec\n");
3474
3475                 timeout -= MDIO_PAUSE_MSEC;
3476                 pause("readred pause", MDIO_PAUSE_MSEC);
3477         }
3478
3479         if (rc != 0)
3480                 device_printf(adapter->dev, "MDIO read failed on timeout\n");
3481
3482         return (value);
3483 }
3484
3485 static int
3486 al_miibus_writereg(device_t dev, int phy, int reg, int value)
3487 {
3488         struct al_eth_adapter *adapter = device_get_softc(dev);
3489         int rc;
3490         int timeout = MDIO_TIMEOUT_MSEC;
3491
3492         while (timeout > 0) {
3493                 rc = al_eth_mdio_write(&adapter->hal_adapter, adapter->phy_addr,
3494                     -1, reg, value);
3495
3496                 if (rc == 0)
3497                         return (0);
3498
3499                 device_printf(adapter->dev,
3500                     "mdio write failed. try again in 10 msec\n");
3501
3502                 timeout -= MDIO_PAUSE_MSEC;
3503                 pause("miibus writereg", MDIO_PAUSE_MSEC);
3504         }
3505
3506         if (rc != 0)
3507                 device_printf(adapter->dev, "MDIO write failed on timeout\n");
3508
3509         return (rc);
3510 }
3511
3512 static void
3513 al_miibus_statchg(device_t dev)
3514 {
3515         struct al_eth_adapter *adapter = device_get_softc(dev);
3516
3517         device_printf_dbg(adapter->dev,
3518             "al_miibus_statchg: state has changed!\n");
3519         device_printf_dbg(adapter->dev,
3520             "al_miibus_statchg: active = 0x%x status = 0x%x\n",
3521             adapter->mii->mii_media_active, adapter->mii->mii_media_status);
3522
3523         if (adapter->up == 0)
3524                 return;
3525
3526         if ((adapter->mii->mii_media_status & IFM_AVALID) != 0) {
3527                 if (adapter->mii->mii_media_status & IFM_ACTIVE) {
3528                         device_printf(adapter->dev, "link is UP\n");
3529                         adapter->netdev->if_link_state = LINK_STATE_UP;
3530                 } else {
3531                         device_printf(adapter->dev, "link is DOWN\n");
3532                         adapter->netdev->if_link_state = LINK_STATE_DOWN;
3533                 }
3534         }
3535 }
3536
3537 static void
3538 al_miibus_linkchg(device_t dev)
3539 {
3540         struct al_eth_adapter *adapter = device_get_softc(dev);
3541         uint8_t duplex = 0;
3542         uint8_t speed = 0;
3543
3544         if (adapter->mii == NULL)
3545                 return;
3546
3547         if ((adapter->netdev->if_flags & IFF_UP) == 0)
3548                 return;
3549
3550         /* Ignore link changes when link is not ready */
3551         if ((adapter->mii->mii_media_status & (IFM_AVALID | IFM_ACTIVE)) !=
3552             (IFM_AVALID | IFM_ACTIVE)) {
3553                 return;
3554         }
3555
3556         if ((adapter->mii->mii_media_active & IFM_FDX) != 0)
3557                 duplex = 1;
3558
3559         speed = IFM_SUBTYPE(adapter->mii->mii_media_active);
3560
3561         if (speed == IFM_10_T) {
3562                 al_eth_mac_link_config(&adapter->hal_adapter, 0, 1,
3563                     AL_10BASE_T_SPEED, duplex);
3564                 return;
3565         }
3566
3567         if (speed == IFM_100_TX) {
3568                 al_eth_mac_link_config(&adapter->hal_adapter, 0, 1,
3569                     AL_100BASE_TX_SPEED, duplex);
3570                 return;
3571         }
3572
3573         if (speed == IFM_1000_T) {
3574                 al_eth_mac_link_config(&adapter->hal_adapter, 0, 1,
3575                     AL_1000BASE_T_SPEED, duplex);
3576                 return;
3577         }
3578
3579         device_printf(adapter->dev, "ERROR: unknown MII media active 0x%08x\n",
3580             adapter->mii->mii_media_active);
3581 }