2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 #define ALE_TX_RING_CNT 256 /* Should be multiple of 4. */
36 #define ALE_TX_RING_CNT_MIN 32
37 #define ALE_TX_RING_CNT_MAX 1020
38 #define ALE_TX_RING_ALIGN 8
39 #define ALE_RX_PAGE_ALIGN 32
40 #define ALE_RX_PAGES 2
41 #define ALE_CMB_ALIGN 32
43 #define ALE_TSO_MAXSEGSIZE 4096
44 #define ALE_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
45 #define ALE_MAXTXSEGS 35
47 #define ALE_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
48 #define ALE_ADDR_HI(x) ((uint64_t) (x) >> 32)
50 /* Water mark to kick reclaiming Tx buffers. */
51 #define ALE_TX_DESC_HIWAT (ALE_TX_RING_CNT - ((ALE_TX_RING_CNT * 4) / 10))
53 #define ALE_MSI_MESSAGES 1
54 #define ALE_MSIX_MESSAGES 1
57 * TODO : Should get real jumbo MTU size.
58 * The hardware seems to have trouble in dealing with large
59 * frame length. If you encounter unstability issue, use
62 #define ALE_JUMBO_FRAMELEN 8132
63 #define ALE_JUMBO_MTU \
64 (ALE_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - ETHER_CRC_LEN)
65 #define ALE_MAX_FRAMELEN (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN)
67 #define ALE_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
71 bus_dmamap_t tx_dmamap;
75 bus_dma_tag_t page_tag;
76 bus_dmamap_t page_map;
78 bus_addr_t page_paddr;
79 bus_dma_tag_t cmb_tag;
86 struct ale_chain_data{
87 bus_dma_tag_t ale_parent_tag;
88 bus_dma_tag_t ale_buffer_tag;
89 bus_dma_tag_t ale_tx_tag;
90 struct ale_txdesc ale_txdesc[ALE_TX_RING_CNT];
91 bus_dma_tag_t ale_tx_ring_tag;
92 bus_dmamap_t ale_tx_ring_map;
93 bus_dma_tag_t ale_rx_mblock_tag[ALE_RX_PAGES];
94 bus_dmamap_t ale_rx_mblock_map[ALE_RX_PAGES];
95 struct tx_desc *ale_tx_ring;
96 bus_addr_t ale_tx_ring_paddr;
98 bus_addr_t ale_tx_cmb_paddr;
99 bus_dma_tag_t ale_tx_cmb_tag;
100 bus_dmamap_t ale_tx_cmb_map;
102 uint32_t ale_tx_prod;
103 uint32_t ale_tx_cons;
105 struct ale_rx_page ale_rx_page[ALE_RX_PAGES];
107 uint16_t ale_rx_seqno;
110 #define ALE_TX_RING_SZ \
111 (sizeof(struct tx_desc) * ALE_TX_RING_CNT)
112 #define ALE_RX_PAGE_SZ_MIN (8 * 1024)
113 #define ALE_RX_PAGE_SZ_MAX (1024 * 1024)
114 #define ALE_RX_FRAMES_PAGE 128
115 #define ALE_RX_PAGE_SZ \
116 (roundup(ALE_MAX_FRAMELEN, ALE_RX_PAGE_ALIGN) * ALE_RX_FRAMES_PAGE)
117 #define ALE_TX_CMB_SZ (sizeof(uint32_t))
118 #define ALE_RX_CMB_SZ (sizeof(uint32_t))
120 #define ALE_PROC_MIN (ALE_RX_FRAMES_PAGE / 4)
121 #define ALE_PROC_MAX \
122 ((ALE_RX_PAGE_SZ * ALE_RX_PAGES) / ETHER_MAX_LEN)
123 #define ALE_PROC_DEFAULT (ALE_PROC_MAX / 4)
125 struct ale_hw_stats {
128 uint32_t rx_bcast_frames;
129 uint32_t rx_mcast_frames;
130 uint32_t rx_pause_frames;
131 uint32_t rx_control_frames;
136 uint32_t rx_fragments;
138 uint32_t rx_pkts_65_127;
139 uint32_t rx_pkts_128_255;
140 uint32_t rx_pkts_256_511;
141 uint32_t rx_pkts_512_1023;
142 uint32_t rx_pkts_1024_1518;
143 uint32_t rx_pkts_1519_max;
144 uint32_t rx_pkts_truncated;
145 uint32_t rx_fifo_oflows;
146 uint32_t rx_rrs_errs;
147 uint32_t rx_alignerrs;
148 uint64_t rx_bcast_bytes;
149 uint64_t rx_mcast_bytes;
150 uint32_t rx_pkts_filtered;
153 uint32_t tx_bcast_frames;
154 uint32_t tx_mcast_frames;
155 uint32_t tx_pause_frames;
156 uint32_t tx_excess_defer;
157 uint32_t tx_control_frames;
158 uint32_t tx_deferred;
161 uint32_t tx_pkts_65_127;
162 uint32_t tx_pkts_128_255;
163 uint32_t tx_pkts_256_511;
164 uint32_t tx_pkts_512_1023;
165 uint32_t tx_pkts_1024_1518;
166 uint32_t tx_pkts_1519_max;
167 uint32_t tx_single_colls;
168 uint32_t tx_multi_colls;
169 uint32_t tx_late_colls;
170 uint32_t tx_excess_colls;
172 uint32_t tx_underrun;
173 uint32_t tx_desc_underrun;
175 uint32_t tx_pkts_truncated;
176 uint64_t tx_bcast_bytes;
177 uint64_t tx_mcast_bytes;
179 uint32_t reset_brk_seq;
183 * Software state per device.
186 struct ifnet *ale_ifp;
189 struct resource *ale_res[1];
190 struct resource_spec *ale_res_spec;
191 struct resource *ale_irq[ALE_MSI_MESSAGES];
192 struct resource_spec *ale_irq_spec;
193 void *ale_intrhand[ALE_MSI_MESSAGES];
197 uint8_t ale_eaddr[ETHER_ADDR_LEN];
198 uint32_t ale_dma_rd_burst;
199 uint32_t ale_dma_wr_burst;
201 #define ALE_FLAG_PCIE 0x0001
202 #define ALE_FLAG_PCIX 0x0002
203 #define ALE_FLAG_MSI 0x0004
204 #define ALE_FLAG_MSIX 0x0008
205 #define ALE_FLAG_PMCAP 0x0010
206 #define ALE_FLAG_FASTETHER 0x0020
207 #define ALE_FLAG_JUMBO 0x0040
208 #define ALE_FLAG_RXCSUM_BUG 0x0080
209 #define ALE_FLAG_TXCSUM_BUG 0x0100
210 #define ALE_FLAG_TXCMB_BUG 0x0200
211 #define ALE_FLAG_LINK 0x8000
213 struct callout ale_tick_ch;
214 struct ale_hw_stats ale_stats;
215 struct ale_chain_data ale_cdata;
217 int ale_watchdog_timer;
218 int ale_process_limit;
219 volatile int ale_morework;
222 int ale_max_frame_size;
225 struct task ale_int_task;
226 struct taskqueue *ale_tq;
230 /* Register access macros. */
231 #define CSR_WRITE_4(_sc, reg, val) \
232 bus_write_4((_sc)->ale_res[0], (reg), (val))
233 #define CSR_WRITE_2(_sc, reg, val) \
234 bus_write_2((_sc)->ale_res[0], (reg), (val))
235 #define CSR_WRITE_1(_sc, reg, val) \
236 bus_write_1((_sc)->ale_res[0], (reg), (val))
237 #define CSR_READ_2(_sc, reg) \
238 bus_read_2((_sc)->ale_res[0], (reg))
239 #define CSR_READ_4(_sc, reg) \
240 bus_read_4((_sc)->ale_res[0], (reg))
242 #define ALE_LOCK(_sc) mtx_lock(&(_sc)->ale_mtx)
243 #define ALE_UNLOCK(_sc) mtx_unlock(&(_sc)->ale_mtx)
244 #define ALE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->ale_mtx, MA_OWNED)
246 #define ALE_TX_TIMEOUT 5
247 #define ALE_RESET_TIMEOUT 100
248 #define ALE_TIMEOUT 1000
249 #define ALE_PHY_TIMEOUT 1000
251 #endif /* _IF_ATEVAR_H */