2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #define ALE_TX_RING_CNT 256 /* Should be multiple of 4. */
34 #define ALE_TX_RING_CNT_MIN 32
35 #define ALE_TX_RING_CNT_MAX 1020
36 #define ALE_TX_RING_ALIGN 8
37 #define ALE_RX_PAGE_ALIGN 32
38 #define ALE_RX_PAGES 2
39 #define ALE_CMB_ALIGN 32
41 #define ALE_TSO_MAXSEGSIZE 4096
42 #define ALE_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
43 #define ALE_MAXTXSEGS 32
45 #define ALE_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
46 #define ALE_ADDR_HI(x) ((uint64_t) (x) >> 32)
48 /* Water mark to kick reclaiming Tx buffers. */
49 #define ALE_TX_DESC_HIWAT (ALE_TX_RING_CNT - ((ALE_TX_RING_CNT * 4) / 10))
51 #define ALE_MSI_MESSAGES 1
52 #define ALE_MSIX_MESSAGES 1
55 * TODO : Should get real jumbo MTU size.
56 * The hardware seems to have trouble in dealing with large
57 * frame length. If you encounter unstability issue, use
60 #define ALE_JUMBO_FRAMELEN 8132
61 #define ALE_JUMBO_MTU \
62 (ALE_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - ETHER_CRC_LEN)
63 #define ALE_MAX_FRAMELEN (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN)
65 #define ALE_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
69 bus_dmamap_t tx_dmamap;
73 bus_dma_tag_t page_tag;
74 bus_dmamap_t page_map;
76 bus_addr_t page_paddr;
77 bus_dma_tag_t cmb_tag;
84 struct ale_chain_data{
85 bus_dma_tag_t ale_parent_tag;
86 bus_dma_tag_t ale_buffer_tag;
87 bus_dma_tag_t ale_tx_tag;
88 struct ale_txdesc ale_txdesc[ALE_TX_RING_CNT];
89 bus_dma_tag_t ale_tx_ring_tag;
90 bus_dmamap_t ale_tx_ring_map;
91 bus_dma_tag_t ale_rx_mblock_tag[ALE_RX_PAGES];
92 bus_dmamap_t ale_rx_mblock_map[ALE_RX_PAGES];
93 struct tx_desc *ale_tx_ring;
94 bus_addr_t ale_tx_ring_paddr;
96 bus_addr_t ale_tx_cmb_paddr;
97 bus_dma_tag_t ale_tx_cmb_tag;
98 bus_dmamap_t ale_tx_cmb_map;
100 uint32_t ale_tx_prod;
101 uint32_t ale_tx_cons;
103 struct ale_rx_page ale_rx_page[ALE_RX_PAGES];
105 uint16_t ale_rx_seqno;
108 #define ALE_TX_RING_SZ \
109 (sizeof(struct tx_desc) * ALE_TX_RING_CNT)
110 #define ALE_RX_PAGE_SZ_MIN (8 * 1024)
111 #define ALE_RX_PAGE_SZ_MAX (1024 * 1024)
112 #define ALE_RX_FRAMES_PAGE 128
113 #define ALE_RX_PAGE_SZ \
114 (roundup(ALE_MAX_FRAMELEN, ALE_RX_PAGE_ALIGN) * ALE_RX_FRAMES_PAGE)
115 #define ALE_TX_CMB_SZ (sizeof(uint32_t))
116 #define ALE_RX_CMB_SZ (sizeof(uint32_t))
118 #define ALE_PROC_MIN (ALE_RX_FRAMES_PAGE / 4)
119 #define ALE_PROC_MAX \
120 ((ALE_RX_PAGE_SZ * ALE_RX_PAGES) / ETHER_MAX_LEN)
121 #define ALE_PROC_DEFAULT (ALE_PROC_MAX / 4)
123 struct ale_hw_stats {
126 uint32_t rx_bcast_frames;
127 uint32_t rx_mcast_frames;
128 uint32_t rx_pause_frames;
129 uint32_t rx_control_frames;
134 uint32_t rx_fragments;
136 uint32_t rx_pkts_65_127;
137 uint32_t rx_pkts_128_255;
138 uint32_t rx_pkts_256_511;
139 uint32_t rx_pkts_512_1023;
140 uint32_t rx_pkts_1024_1518;
141 uint32_t rx_pkts_1519_max;
142 uint32_t rx_pkts_truncated;
143 uint32_t rx_fifo_oflows;
144 uint32_t rx_rrs_errs;
145 uint32_t rx_alignerrs;
146 uint64_t rx_bcast_bytes;
147 uint64_t rx_mcast_bytes;
148 uint32_t rx_pkts_filtered;
151 uint32_t tx_bcast_frames;
152 uint32_t tx_mcast_frames;
153 uint32_t tx_pause_frames;
154 uint32_t tx_excess_defer;
155 uint32_t tx_control_frames;
156 uint32_t tx_deferred;
159 uint32_t tx_pkts_65_127;
160 uint32_t tx_pkts_128_255;
161 uint32_t tx_pkts_256_511;
162 uint32_t tx_pkts_512_1023;
163 uint32_t tx_pkts_1024_1518;
164 uint32_t tx_pkts_1519_max;
165 uint32_t tx_single_colls;
166 uint32_t tx_multi_colls;
167 uint32_t tx_late_colls;
168 uint32_t tx_excess_colls;
170 uint32_t tx_underrun;
171 uint32_t tx_desc_underrun;
173 uint32_t tx_pkts_truncated;
174 uint64_t tx_bcast_bytes;
175 uint64_t tx_mcast_bytes;
177 uint32_t reset_brk_seq;
181 * Software state per device.
184 struct ifnet *ale_ifp;
187 struct resource *ale_res[1];
188 struct resource_spec *ale_res_spec;
189 struct resource *ale_irq[ALE_MSI_MESSAGES];
190 struct resource_spec *ale_irq_spec;
191 void *ale_intrhand[ALE_MSI_MESSAGES];
195 uint8_t ale_eaddr[ETHER_ADDR_LEN];
196 uint32_t ale_dma_rd_burst;
197 uint32_t ale_dma_wr_burst;
199 #define ALE_FLAG_PCIE 0x0001
200 #define ALE_FLAG_PCIX 0x0002
201 #define ALE_FLAG_MSI 0x0004
202 #define ALE_FLAG_MSIX 0x0008
203 #define ALE_FLAG_PMCAP 0x0010
204 #define ALE_FLAG_FASTETHER 0x0020
205 #define ALE_FLAG_JUMBO 0x0040
206 #define ALE_FLAG_RXCSUM_BUG 0x0080
207 #define ALE_FLAG_TXCSUM_BUG 0x0100
208 #define ALE_FLAG_TXCMB_BUG 0x0200
209 #define ALE_FLAG_DETACH 0x4000
210 #define ALE_FLAG_LINK 0x8000
212 struct callout ale_tick_ch;
213 struct ale_hw_stats ale_stats;
214 struct ale_chain_data ale_cdata;
216 int ale_watchdog_timer;
217 int ale_process_limit;
218 volatile int ale_morework;
221 int ale_max_frame_size;
224 struct task ale_int_task;
225 struct task ale_tx_task;
226 struct task ale_link_task;
227 struct taskqueue *ale_tq;
231 /* Register access macros. */
232 #define CSR_WRITE_4(_sc, reg, val) \
233 bus_write_4((_sc)->ale_res[0], (reg), (val))
234 #define CSR_WRITE_2(_sc, reg, val) \
235 bus_write_2((_sc)->ale_res[0], (reg), (val))
236 #define CSR_WRITE_1(_sc, reg, val) \
237 bus_write_1((_sc)->ale_res[0], (reg), (val))
238 #define CSR_READ_2(_sc, reg) \
239 bus_read_2((_sc)->ale_res[0], (reg))
240 #define CSR_READ_4(_sc, reg) \
241 bus_read_4((_sc)->ale_res[0], (reg))
243 #define ALE_LOCK(_sc) mtx_lock(&(_sc)->ale_mtx)
244 #define ALE_UNLOCK(_sc) mtx_unlock(&(_sc)->ale_mtx)
245 #define ALE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->ale_mtx, MA_OWNED)
247 #define ALE_TX_TIMEOUT 5
248 #define ALE_RESET_TIMEOUT 100
249 #define ALE_TIMEOUT 1000
250 #define ALE_PHY_TIMEOUT 1000
252 #endif /* _IF_ATEVAR_H */