2 * Copyright (c) 2013 Bjoern A. Zeeb
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-11-C-0249)
7 * ("MRC2"), as part of the DARPA MRC research programme.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
39 #include <sys/socket.h>
40 #include <sys/systm.h>
42 #include <machine/bus.h>
43 #include <machine/resource.h>
45 #include <net/ethernet.h>
47 #include <net/if_media.h>
48 #include <net/if_var.h>
50 #include <dev/mii/mii.h>
51 #include <dev/mii/miivar.h>
54 #include <dev/fdt/fdt_common.h>
55 #include <dev/ofw/openfirm.h>
56 #include <dev/ofw/ofw_bus.h>
57 #include <dev/ofw/ofw_bus_subr.h>
59 #include <dev/altera/atse/if_atsereg.h>
61 /* "device miibus" required. See GENERIC if you get errors here. */
62 #include "miibus_if.h"
65 atse_probe_fdt(device_t dev)
68 if (!ofw_bus_status_okay(dev))
71 if (ofw_bus_is_compatible(dev, "altera,atse")) {
72 device_set_desc(dev, "Altera Triple-Speed Ethernet MegaCore");
73 return (BUS_PROBE_DEFAULT);
79 atse_attach_fdt(device_t dev)
81 struct atse_softc *sc;
84 sc = device_get_softc(dev);
86 sc->atse_unit = device_get_unit(dev);
89 * FDT has the list of our resources. Given we are using multiple
90 * memory regions and possibly multiple interrupts, we need to attach
91 * them in the order specified in .dts:
92 * MAC, RX and RXC FIFO, TX and TXC FIFO; RX INTR, TX INTR.
95 /* MAC: Avalon-MM, atse management register region. */
97 sc->atse_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
98 &sc->atse_mem_rid, RF_ACTIVE);
99 if (sc->atse_mem_res == NULL) {
100 device_printf(dev, "failed to map memory for ctrl region\n");
105 device_printf(sc->atse_dev, "MAC ctrl region at mem %p-%p\n",
106 (void *)rman_get_start(sc->atse_mem_res),
107 (void *)(rman_get_start(sc->atse_mem_res) +
108 rman_get_size(sc->atse_mem_res)));
111 * RX and RXC FIFO memory regions.
112 * 0x00: 2 * 32bit FIFO data,
113 * 0x20: 8 * 32bit FIFO ctrl, Avalon-ST Sink to Avalon-MM R-Slave.
115 sc->atse_rx_mem_rid = 1;
116 sc->atse_rx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
117 &sc->atse_rx_mem_rid, RF_ACTIVE);
118 if (sc->atse_rx_mem_res == NULL) {
119 device_printf(dev, "failed to map memory for RX FIFO\n");
124 device_printf(sc->atse_dev, "RX FIFO at mem %p-%p\n",
125 (void *)rman_get_start(sc->atse_rx_mem_res),
126 (void *)(rman_get_start(sc->atse_rx_mem_res) +
127 rman_get_size(sc->atse_rx_mem_res)));
129 sc->atse_rxc_mem_rid = 2;
130 sc->atse_rxc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
131 &sc->atse_rxc_mem_rid, RF_ACTIVE);
132 if (sc->atse_rxc_mem_res == NULL) {
133 device_printf(dev, "failed to map memory for RXC FIFO\n");
138 device_printf(sc->atse_dev, "RXC FIFO at mem %p-%p\n",
139 (void *)rman_get_start(sc->atse_rxc_mem_res),
140 (void *)(rman_get_start(sc->atse_rxc_mem_res) +
141 rman_get_size(sc->atse_rxc_mem_res)));
144 * TX and TXC FIFO memory regions.
145 * 0x00: 2 * 32bit FIFO data,
146 * 0x20: 8 * 32bit FIFO ctrl, Avalon-MM W-Slave to Avalon-ST Source.
148 sc->atse_tx_mem_rid = 3;
149 sc->atse_tx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
150 &sc->atse_tx_mem_rid, RF_ACTIVE);
151 if (sc->atse_tx_mem_res == NULL) {
152 device_printf(dev, "failed to map memory for TX FIFO\n");
157 device_printf(sc->atse_dev, "TX FIFO at mem %p-%p\n",
158 (void *)rman_get_start(sc->atse_tx_mem_res),
159 (void *)(rman_get_start(sc->atse_tx_mem_res) +
160 rman_get_size(sc->atse_tx_mem_res)));
162 sc->atse_txc_mem_rid = 4;
163 sc->atse_txc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
164 &sc->atse_txc_mem_rid, RF_ACTIVE);
165 if (sc->atse_txc_mem_res == NULL) {
166 device_printf(dev, "failed to map memory for TXC FIFO\n");
171 device_printf(sc->atse_dev, "TXC FIFO at mem %p-%p\n",
172 (void *)rman_get_start(sc->atse_txc_mem_res),
173 (void *)(rman_get_start(sc->atse_txc_mem_res) +
174 rman_get_size(sc->atse_txc_mem_res)));
176 /* (Optional) RX and TX IRQ. */
177 sc->atse_rx_irq_rid = 0;
178 sc->atse_rx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
179 &sc->atse_rx_irq_rid, RF_ACTIVE | RF_SHAREABLE);
180 sc->atse_tx_irq_rid = 1;
181 sc->atse_tx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
182 &sc->atse_tx_irq_rid, RF_ACTIVE | RF_SHAREABLE);
184 error = atse_attach(dev);
192 atse_detach_resources(dev);
197 static device_method_t atse_methods_fdt[] = {
198 /* Device interface */
199 DEVMETHOD(device_probe, atse_probe_fdt),
200 DEVMETHOD(device_attach, atse_attach_fdt),
201 DEVMETHOD(device_detach, atse_detach_dev),
204 DEVMETHOD(miibus_readreg, atse_miibus_readreg),
205 DEVMETHOD(miibus_writereg, atse_miibus_writereg),
206 DEVMETHOD(miibus_statchg, atse_miibus_statchg),
211 static driver_t atse_driver_fdt = {
214 sizeof(struct atse_softc)
217 DRIVER_MODULE(atse, simplebus, atse_driver_fdt, atse_devclass, 0, 0);
218 DRIVER_MODULE(miibus, atse, miibus_driver, miibus_devclass, 0, 0);