2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2012 Robert N. M. Watson
7 * This software was developed by SRI International and the University of
8 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
9 * ("CTSRD"), as part of the DARPA CRASH research programme.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
38 #include <sys/condvar.h>
41 #include <sys/kernel.h>
43 #include <sys/malloc.h>
44 #include <sys/module.h>
45 #include <sys/mutex.h>
47 #include <sys/systm.h>
48 #include <sys/taskqueue.h>
50 #include <machine/bus.h>
51 #include <machine/resource.h>
53 #include <geom/geom_disk.h>
55 #include <dev/altera/jtag_uart/altera_jtag_uart.h>
58 * Nexus bus attachment for Altera JTAG UARTs. Appropriate for most Altera
59 * FPGA SoC-style configurations in which the IP core will be exposed to the
60 * processor via a memory-mapped Avalon bus.
63 altera_jtag_uart_nexus_probe(device_t dev)
66 device_set_desc(dev, "Altera JTAG UART");
67 return (BUS_PROBE_NOWILDCARD);
71 altera_jtag_uart_nexus_attach(device_t dev)
73 struct altera_jtag_uart_softc *sc;
77 sc = device_get_softc(dev);
79 sc->ajus_unit = device_get_unit(dev);
81 sc->ajus_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
82 &sc->ajus_mem_rid, RF_ACTIVE);
83 if (sc->ajus_mem_res == NULL) {
84 device_printf(dev, "couldn't map memory\n");
90 * Interrupt support is optional -- if we can't allocate an IRQ, then
91 * we fall back on polling.
94 sc->ajus_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
95 &sc->ajus_irq_rid, RF_ACTIVE | RF_SHAREABLE);
96 if (sc->ajus_irq_res == NULL)
98 "IRQ unavailable; selecting polled operation\n");
99 error = altera_jtag_uart_attach(sc);
102 if (sc->ajus_irq_res != NULL)
103 bus_release_resource(dev, SYS_RES_IRQ,
104 sc->ajus_irq_rid, sc->ajus_irq_res);
105 if (sc->ajus_mem_res != NULL)
106 bus_release_resource(dev, SYS_RES_MEMORY,
107 sc->ajus_mem_rid, sc->ajus_mem_res);
113 altera_jtag_uart_nexus_detach(device_t dev)
115 struct altera_jtag_uart_softc *sc;
117 sc = device_get_softc(dev);
118 KASSERT(sc->ajus_mem_res != NULL, ("%s: resources not allocated",
121 altera_jtag_uart_detach(sc);
122 bus_release_resource(dev, SYS_RES_IRQ, sc->ajus_irq_rid,
124 bus_release_resource(dev, SYS_RES_MEMORY, sc->ajus_mem_rid,
129 static device_method_t altera_jtag_uart_nexus_methods[] = {
130 DEVMETHOD(device_probe, altera_jtag_uart_nexus_probe),
131 DEVMETHOD(device_attach, altera_jtag_uart_nexus_attach),
132 DEVMETHOD(device_detach, altera_jtag_uart_nexus_detach),
136 static driver_t altera_jtag_uart_nexus_driver = {
138 altera_jtag_uart_nexus_methods,
139 sizeof(struct altera_jtag_uart_softc),
142 DRIVER_MODULE(altera_jtag_uart, nexus, altera_jtag_uart_nexus_driver,
143 altera_jtag_uart_devclass, 0, 0);