2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2008, 2009 Rui Paulo <rpaulo@FreeBSD.org>
5 * Copyright (c) 2009 Norikatsu Shigemura <nork@FreeBSD.org>
6 * Copyright (c) 2009-2012 Jung-uk Kim <jkim@FreeBSD.org>
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
27 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
32 * Driver for the AMD CPU on-die thermal sensors.
33 * Initially based on the k8temp Linux driver.
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
39 #include <sys/param.h>
42 #include <sys/kernel.h>
43 #include <sys/module.h>
44 #include <sys/sysctl.h>
45 #include <sys/systm.h>
47 #include <machine/cpufunc.h>
48 #include <machine/md_var.h>
49 #include <machine/specialreg.h>
51 #include <dev/pci/pcivar.h>
52 #include <x86/pci_cfgreg.h>
54 #include <dev/amdsmn/amdsmn.h>
65 struct amdtemp_softc {
69 #define AMDTEMP_FLAG_CS_SWAP 0x01 /* ThermSenseCoreSel is inverted. */
70 #define AMDTEMP_FLAG_CT_10BIT 0x02 /* CurTmp is 10-bit wide. */
71 #define AMDTEMP_FLAG_ALT_OFFSET 0x04 /* CurTmp starts at -28C. */
73 int32_t (*sc_gettemp)(device_t, amdsensor_t);
74 struct sysctl_oid *sc_sysctl_cpu[MAXCPU];
75 struct intr_config_hook sc_ich;
79 #define VENDORID_AMD 0x1022
80 #define DEVICEID_AMD_MISC0F 0x1103
81 #define DEVICEID_AMD_MISC10 0x1203
82 #define DEVICEID_AMD_MISC11 0x1303
83 #define DEVICEID_AMD_MISC12 0x1403
84 #define DEVICEID_AMD_MISC14 0x1703
85 #define DEVICEID_AMD_MISC15 0x1603
86 #define DEVICEID_AMD_MISC16 0x1533
87 #define DEVICEID_AMD_MISC16_M30H 0x1583
88 #define DEVICEID_AMD_MISC17 0x141d
89 #define DEVICEID_AMD_HOSTB17H 0x1450
91 static struct amdtemp_product {
92 uint16_t amdtemp_vendorid;
93 uint16_t amdtemp_deviceid;
94 } amdtemp_products[] = {
95 { VENDORID_AMD, DEVICEID_AMD_MISC0F },
96 { VENDORID_AMD, DEVICEID_AMD_MISC10 },
97 { VENDORID_AMD, DEVICEID_AMD_MISC11 },
98 { VENDORID_AMD, DEVICEID_AMD_MISC12 },
99 { VENDORID_AMD, DEVICEID_AMD_MISC14 },
100 { VENDORID_AMD, DEVICEID_AMD_MISC15 },
101 { VENDORID_AMD, DEVICEID_AMD_MISC16 },
102 { VENDORID_AMD, DEVICEID_AMD_MISC16_M30H },
103 { VENDORID_AMD, DEVICEID_AMD_MISC17 },
104 { VENDORID_AMD, DEVICEID_AMD_HOSTB17H },
108 * Reported Temperature Control Register
110 #define AMDTEMP_REPTMP_CTRL 0xa4
113 * Reported Temperature, Family 17h
115 #define AMDTEMP_17H_CUR_TMP 0x59800
118 * Thermaltrip Status Register (Family 0Fh only)
120 #define AMDTEMP_THERMTP_STAT 0xe4
121 #define AMDTEMP_TTSR_SELCORE 0x04
122 #define AMDTEMP_TTSR_SELSENSOR 0x40
125 * DRAM Configuration High Register
127 #define AMDTEMP_DRAM_CONF_HIGH 0x94 /* Function 2 */
128 #define AMDTEMP_DRAM_MODE_DDR3 0x0100
131 * CPU Family/Model Register
133 #define AMDTEMP_CPUID 0xfc
138 static void amdtemp_identify(driver_t *driver, device_t parent);
139 static int amdtemp_probe(device_t dev);
140 static int amdtemp_attach(device_t dev);
141 static void amdtemp_intrhook(void *arg);
142 static int amdtemp_detach(device_t dev);
143 static int amdtemp_match(device_t dev);
144 static int32_t amdtemp_gettemp0f(device_t dev, amdsensor_t sensor);
145 static int32_t amdtemp_gettemp(device_t dev, amdsensor_t sensor);
146 static int32_t amdtemp_gettemp17h(device_t dev, amdsensor_t sensor);
147 static int amdtemp_sysctl(SYSCTL_HANDLER_ARGS);
149 static device_method_t amdtemp_methods[] = {
150 /* Device interface */
151 DEVMETHOD(device_identify, amdtemp_identify),
152 DEVMETHOD(device_probe, amdtemp_probe),
153 DEVMETHOD(device_attach, amdtemp_attach),
154 DEVMETHOD(device_detach, amdtemp_detach),
159 static driver_t amdtemp_driver = {
162 sizeof(struct amdtemp_softc),
165 static devclass_t amdtemp_devclass;
166 DRIVER_MODULE(amdtemp, hostb, amdtemp_driver, amdtemp_devclass, NULL, NULL);
167 MODULE_VERSION(amdtemp, 1);
168 MODULE_DEPEND(amdtemp, amdsmn, 1, 1, 1);
169 MODULE_PNP_INFO("U16:vendor;U16:device", pci, amdtemp, amdtemp_products,
170 nitems(amdtemp_products));
173 amdtemp_match(device_t dev)
176 uint16_t vendor, devid;
178 vendor = pci_get_vendor(dev);
179 devid = pci_get_device(dev);
181 for (i = 0; i < nitems(amdtemp_products); i++) {
182 if (vendor == amdtemp_products[i].amdtemp_vendorid &&
183 devid == amdtemp_products[i].amdtemp_deviceid)
191 amdtemp_identify(driver_t *driver, device_t parent)
195 /* Make sure we're not being doubly invoked. */
196 if (device_find_child(parent, "amdtemp", -1) != NULL)
199 if (amdtemp_match(parent)) {
200 child = device_add_child(parent, "amdtemp", -1);
202 device_printf(parent, "add amdtemp child failed\n");
207 amdtemp_probe(device_t dev)
209 uint32_t family, model;
211 if (resource_disabled("amdtemp", 0))
213 if (!amdtemp_match(device_get_parent(dev)))
216 family = CPUID_TO_FAMILY(cpu_id);
217 model = CPUID_TO_MODEL(cpu_id);
221 if ((model == 0x04 && (cpu_id & CPUID_STEPPING) == 0) ||
222 (model == 0x05 && (cpu_id & CPUID_STEPPING) <= 1))
236 device_set_desc(dev, "AMD CPU On-Die Thermal Sensors");
238 return (BUS_PROBE_GENERIC);
242 amdtemp_attach(device_t dev)
246 struct amdtemp_softc *sc = device_get_softc(dev);
247 struct sysctl_ctx_list *sysctlctx;
248 struct sysctl_oid *sysctlnode;
249 uint32_t cpuid, family, model;
251 int erratum319, unit;
256 * CPUID Register is available from Revision F.
259 family = CPUID_TO_FAMILY(cpuid);
260 model = CPUID_TO_MODEL(cpuid);
261 if ((family != 0x0f || model >= 0x40) && family != 0x17) {
262 cpuid = pci_read_config(dev, AMDTEMP_CPUID, 4);
263 family = CPUID_TO_FAMILY(cpuid);
264 model = CPUID_TO_MODEL(cpuid);
270 * Thermaltrip Status Register
272 * - ThermSenseCoreSel
274 * Revision F & G: 0 - Core1, 1 - Core0
275 * Other: 0 - Core0, 1 - Core1
279 * Revision G: bits 23-14
282 * XXX According to the BKDG, CurTmp, ThermSenseSel and
283 * ThermSenseCoreSel bits were introduced in Revision F
284 * but CurTmp seems working fine as early as Revision C.
285 * However, it is not clear whether ThermSenseSel and/or
286 * ThermSenseCoreSel work in undocumented cases as well.
287 * In fact, the Linux driver suggests it may not work but
288 * we just assume it does until we find otherwise.
290 * XXX According to Linux, CurTmp starts at -28C on
291 * Socket AM2 Revision G processors, which is not
292 * documented anywhere.
295 sc->sc_flags |= AMDTEMP_FLAG_CS_SWAP;
296 if (model >= 0x60 && model != 0xc1) {
297 do_cpuid(0x80000001, regs);
298 bid = (regs[1] >> 9) & 0x1f;
300 case 0x68: /* Socket S1g1 */
304 case 0x6b: /* Socket AM2 and ASB1 (2 cores) */
305 if (bid != 0x0b && bid != 0x0c)
307 AMDTEMP_FLAG_ALT_OFFSET;
309 case 0x6f: /* Socket AM2 and ASB1 (1 core) */
311 if (bid != 0x07 && bid != 0x09 &&
314 AMDTEMP_FLAG_ALT_OFFSET;
317 sc->sc_flags |= AMDTEMP_FLAG_ALT_OFFSET;
319 sc->sc_flags |= AMDTEMP_FLAG_CT_10BIT;
323 * There are two sensors per core.
327 sc->sc_gettemp = amdtemp_gettemp0f;
331 * Erratum 319 Inaccurate Temperature Measurement
333 * http://support.amd.com/us/Processor_TechDocs/41322.pdf
335 do_cpuid(0x80000001, regs);
336 switch ((regs[1] >> 28) & 0xf) {
337 case 0: /* Socket F */
340 case 1: /* Socket AM2+ or AM3 */
341 if ((pci_cfgregread(pci_get_bus(dev),
342 pci_get_slot(dev), 2, AMDTEMP_DRAM_CONF_HIGH, 2) &
343 AMDTEMP_DRAM_MODE_DDR3) != 0 || model > 0x04 ||
344 (model == 0x04 && (cpuid & CPUID_STEPPING) >= 3))
346 /* XXX 00100F42h (RB-C2) exists in both formats. */
357 * There is only one sensor per package.
361 sc->sc_gettemp = amdtemp_gettemp;
365 sc->sc_gettemp = amdtemp_gettemp17h;
366 sc->sc_smn = device_find_child(
367 device_get_parent(dev), "amdsmn", -1);
368 if (sc->sc_smn == NULL) {
370 device_printf(dev, "No SMN device found\n");
376 /* Find number of cores per package. */
377 sc->sc_ncores = (amd_feature2 & AMDID2_CMP) != 0 ?
378 (cpu_procinfo2 & AMDID_CMP_CORES) + 1 : 1;
379 if (sc->sc_ncores > MAXCPU)
384 "Erratum 319: temperature measurement may be inaccurate\n");
386 device_printf(dev, "Found %d cores and %d sensors.\n",
388 sc->sc_ntemps > 1 ? sc->sc_ntemps * sc->sc_ncores : 1);
391 * dev.amdtemp.N tree.
393 unit = device_get_unit(dev);
394 snprintf(tn, sizeof(tn), "dev.amdtemp.%d.sensor_offset", unit);
395 TUNABLE_INT_FETCH(tn, &sc->sc_offset);
397 sysctlctx = device_get_sysctl_ctx(dev);
398 SYSCTL_ADD_INT(sysctlctx,
399 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
400 "sensor_offset", CTLFLAG_RW, &sc->sc_offset, 0,
401 "Temperature sensor offset");
402 sysctlnode = SYSCTL_ADD_NODE(sysctlctx,
403 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
404 "core0", CTLFLAG_RD, 0, "Core 0");
406 SYSCTL_ADD_PROC(sysctlctx,
407 SYSCTL_CHILDREN(sysctlnode),
408 OID_AUTO, "sensor0", CTLTYPE_INT | CTLFLAG_RD,
409 dev, CORE0_SENSOR0, amdtemp_sysctl, "IK",
410 "Core 0 / Sensor 0 temperature");
412 if (sc->sc_ntemps > 1) {
413 SYSCTL_ADD_PROC(sysctlctx,
414 SYSCTL_CHILDREN(sysctlnode),
415 OID_AUTO, "sensor1", CTLTYPE_INT | CTLFLAG_RD,
416 dev, CORE0_SENSOR1, amdtemp_sysctl, "IK",
417 "Core 0 / Sensor 1 temperature");
419 if (sc->sc_ncores > 1) {
420 sysctlnode = SYSCTL_ADD_NODE(sysctlctx,
421 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
422 OID_AUTO, "core1", CTLFLAG_RD, 0, "Core 1");
424 SYSCTL_ADD_PROC(sysctlctx,
425 SYSCTL_CHILDREN(sysctlnode),
426 OID_AUTO, "sensor0", CTLTYPE_INT | CTLFLAG_RD,
427 dev, CORE1_SENSOR0, amdtemp_sysctl, "IK",
428 "Core 1 / Sensor 0 temperature");
430 SYSCTL_ADD_PROC(sysctlctx,
431 SYSCTL_CHILDREN(sysctlnode),
432 OID_AUTO, "sensor1", CTLTYPE_INT | CTLFLAG_RD,
433 dev, CORE1_SENSOR1, amdtemp_sysctl, "IK",
434 "Core 1 / Sensor 1 temperature");
439 * Try to create dev.cpu sysctl entries and setup intrhook function.
440 * This is needed because the cpu driver may be loaded late on boot,
443 amdtemp_intrhook(dev);
444 sc->sc_ich.ich_func = amdtemp_intrhook;
445 sc->sc_ich.ich_arg = dev;
446 if (config_intrhook_establish(&sc->sc_ich) != 0) {
447 device_printf(dev, "config_intrhook_establish failed!\n");
455 amdtemp_intrhook(void *arg)
457 struct amdtemp_softc *sc;
458 struct sysctl_ctx_list *sysctlctx;
459 device_t dev = (device_t)arg;
460 device_t acpi, cpu, nexus;
464 sc = device_get_softc(dev);
467 * dev.cpu.N.temperature.
469 nexus = device_find_child(root_bus, "nexus", 0);
470 acpi = device_find_child(nexus, "acpi", 0);
472 for (i = 0; i < sc->sc_ncores; i++) {
473 if (sc->sc_sysctl_cpu[i] != NULL)
475 cpu = device_find_child(acpi, "cpu",
476 device_get_unit(dev) * sc->sc_ncores + i);
478 sysctlctx = device_get_sysctl_ctx(cpu);
480 sensor = sc->sc_ntemps > 1 ?
481 (i == 0 ? CORE0 : CORE1) : CORE0_SENSOR0;
482 sc->sc_sysctl_cpu[i] = SYSCTL_ADD_PROC(sysctlctx,
483 SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)),
484 OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD,
485 dev, sensor, amdtemp_sysctl, "IK",
486 "Current temparature");
489 if (sc->sc_ich.ich_arg != NULL)
490 config_intrhook_disestablish(&sc->sc_ich);
494 amdtemp_detach(device_t dev)
496 struct amdtemp_softc *sc = device_get_softc(dev);
499 for (i = 0; i < sc->sc_ncores; i++)
500 if (sc->sc_sysctl_cpu[i] != NULL)
501 sysctl_remove_oid(sc->sc_sysctl_cpu[i], 1, 0);
503 /* NewBus removes the dev.amdtemp.N tree by itself. */
509 amdtemp_sysctl(SYSCTL_HANDLER_ARGS)
511 device_t dev = (device_t)arg1;
512 struct amdtemp_softc *sc = device_get_softc(dev);
513 amdsensor_t sensor = (amdsensor_t)arg2;
514 int32_t auxtemp[2], temp;
519 auxtemp[0] = sc->sc_gettemp(dev, CORE0_SENSOR0);
520 auxtemp[1] = sc->sc_gettemp(dev, CORE0_SENSOR1);
521 temp = imax(auxtemp[0], auxtemp[1]);
524 auxtemp[0] = sc->sc_gettemp(dev, CORE1_SENSOR0);
525 auxtemp[1] = sc->sc_gettemp(dev, CORE1_SENSOR1);
526 temp = imax(auxtemp[0], auxtemp[1]);
529 temp = sc->sc_gettemp(dev, sensor);
532 error = sysctl_handle_int(oidp, &temp, 0, req);
537 #define AMDTEMP_ZERO_C_TO_K 2731
540 amdtemp_gettemp0f(device_t dev, amdsensor_t sensor)
542 struct amdtemp_softc *sc = device_get_softc(dev);
543 uint32_t mask, offset, temp;
545 /* Set Sensor/Core selector. */
546 temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 1);
547 temp &= ~(AMDTEMP_TTSR_SELCORE | AMDTEMP_TTSR_SELSENSOR);
550 temp |= AMDTEMP_TTSR_SELSENSOR;
554 if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) != 0)
555 temp |= AMDTEMP_TTSR_SELCORE;
558 temp |= AMDTEMP_TTSR_SELSENSOR;
562 if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) == 0)
563 temp |= AMDTEMP_TTSR_SELCORE;
566 pci_write_config(dev, AMDTEMP_THERMTP_STAT, temp, 1);
568 mask = (sc->sc_flags & AMDTEMP_FLAG_CT_10BIT) != 0 ? 0x3ff : 0x3fc;
569 offset = (sc->sc_flags & AMDTEMP_FLAG_ALT_OFFSET) != 0 ? 28 : 49;
570 temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 4);
571 temp = ((temp >> 14) & mask) * 5 / 2;
572 temp += AMDTEMP_ZERO_C_TO_K + (sc->sc_offset - offset) * 10;
578 amdtemp_gettemp(device_t dev, amdsensor_t sensor)
580 struct amdtemp_softc *sc = device_get_softc(dev);
583 temp = pci_read_config(dev, AMDTEMP_REPTMP_CTRL, 4);
584 temp = ((temp >> 21) & 0x7ff) * 5 / 4;
585 temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10;
591 amdtemp_gettemp17h(device_t dev, amdsensor_t sensor)
593 struct amdtemp_softc *sc = device_get_softc(dev);
597 error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CUR_TMP, &temp);
598 KASSERT(error == 0, ("amdsmn_read"));
600 temp = ((temp >> 21) & 0x7ff) * 5 / 4;
601 temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10;