2 * Copyright (c) 2008, 2009 Rui Paulo <rpaulo@FreeBSD.org>
3 * Copyright (c) 2009 Norikatsu Shigemura <nork@FreeBSD.org>
4 * Copyright (c) 2009-2012 Jung-uk Kim <jkim@FreeBSD.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
30 * Driver for the AMD CPU on-die thermal sensors.
31 * Initially based on the k8temp Linux driver.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
40 #include <sys/kernel.h>
41 #include <sys/module.h>
42 #include <sys/sysctl.h>
43 #include <sys/systm.h>
45 #include <machine/cpufunc.h>
46 #include <machine/md_var.h>
47 #include <machine/specialreg.h>
49 #include <dev/pci/pcivar.h>
50 #include <x86/pci_cfgreg.h>
52 #include <dev/amdsmn/amdsmn.h>
63 struct amdtemp_softc {
67 #define AMDTEMP_FLAG_CS_SWAP 0x01 /* ThermSenseCoreSel is inverted. */
68 #define AMDTEMP_FLAG_CT_10BIT 0x02 /* CurTmp is 10-bit wide. */
69 #define AMDTEMP_FLAG_ALT_OFFSET 0x04 /* CurTmp starts at -28C. */
71 int32_t (*sc_gettemp)(device_t, amdsensor_t);
72 struct sysctl_oid *sc_sysctl_cpu[MAXCPU];
73 struct intr_config_hook sc_ich;
77 #define VENDORID_AMD 0x1022
78 #define DEVICEID_AMD_MISC0F 0x1103
79 #define DEVICEID_AMD_MISC10 0x1203
80 #define DEVICEID_AMD_MISC11 0x1303
81 #define DEVICEID_AMD_MISC12 0x1403
82 #define DEVICEID_AMD_MISC14 0x1703
83 #define DEVICEID_AMD_MISC15 0x1603
84 #define DEVICEID_AMD_MISC16 0x1533
85 #define DEVICEID_AMD_MISC16_M30H 0x1583
86 #define DEVICEID_AMD_MISC17 0x141d
87 #define DEVICEID_AMD_HOSTB17H 0x1450
89 static struct amdtemp_product {
90 uint16_t amdtemp_vendorid;
91 uint16_t amdtemp_deviceid;
92 } amdtemp_products[] = {
93 { VENDORID_AMD, DEVICEID_AMD_MISC0F },
94 { VENDORID_AMD, DEVICEID_AMD_MISC10 },
95 { VENDORID_AMD, DEVICEID_AMD_MISC11 },
96 { VENDORID_AMD, DEVICEID_AMD_MISC12 },
97 { VENDORID_AMD, DEVICEID_AMD_MISC14 },
98 { VENDORID_AMD, DEVICEID_AMD_MISC15 },
99 { VENDORID_AMD, DEVICEID_AMD_MISC16 },
100 { VENDORID_AMD, DEVICEID_AMD_MISC16_M30H },
101 { VENDORID_AMD, DEVICEID_AMD_MISC17 },
102 { VENDORID_AMD, DEVICEID_AMD_HOSTB17H },
106 * Reported Temperature Control Register
108 #define AMDTEMP_REPTMP_CTRL 0xa4
111 * Reported Temperature, Family 17h
113 #define AMDTEMP_17H_CUR_TMP 0x59800
116 * Thermaltrip Status Register (Family 0Fh only)
118 #define AMDTEMP_THERMTP_STAT 0xe4
119 #define AMDTEMP_TTSR_SELCORE 0x04
120 #define AMDTEMP_TTSR_SELSENSOR 0x40
123 * DRAM Configuration High Register
125 #define AMDTEMP_DRAM_CONF_HIGH 0x94 /* Function 2 */
126 #define AMDTEMP_DRAM_MODE_DDR3 0x0100
129 * CPU Family/Model Register
131 #define AMDTEMP_CPUID 0xfc
136 static void amdtemp_identify(driver_t *driver, device_t parent);
137 static int amdtemp_probe(device_t dev);
138 static int amdtemp_attach(device_t dev);
139 static void amdtemp_intrhook(void *arg);
140 static int amdtemp_detach(device_t dev);
141 static int amdtemp_match(device_t dev);
142 static int32_t amdtemp_gettemp0f(device_t dev, amdsensor_t sensor);
143 static int32_t amdtemp_gettemp(device_t dev, amdsensor_t sensor);
144 static int32_t amdtemp_gettemp17h(device_t dev, amdsensor_t sensor);
145 static int amdtemp_sysctl(SYSCTL_HANDLER_ARGS);
147 static device_method_t amdtemp_methods[] = {
148 /* Device interface */
149 DEVMETHOD(device_identify, amdtemp_identify),
150 DEVMETHOD(device_probe, amdtemp_probe),
151 DEVMETHOD(device_attach, amdtemp_attach),
152 DEVMETHOD(device_detach, amdtemp_detach),
157 static driver_t amdtemp_driver = {
160 sizeof(struct amdtemp_softc),
163 static devclass_t amdtemp_devclass;
164 DRIVER_MODULE(amdtemp, hostb, amdtemp_driver, amdtemp_devclass, NULL, NULL);
165 MODULE_VERSION(amdtemp, 1);
166 MODULE_DEPEND(amdtemp, amdsmn, 1, 1, 1);
167 MODULE_PNP_INFO("U16:vendor;U16:device", pci, amdtemp, amdtemp_products,
168 sizeof(amdtemp_products[0]), nitems(amdtemp_products));
171 amdtemp_match(device_t dev)
174 uint16_t vendor, devid;
176 vendor = pci_get_vendor(dev);
177 devid = pci_get_device(dev);
179 for (i = 0; i < nitems(amdtemp_products); i++) {
180 if (vendor == amdtemp_products[i].amdtemp_vendorid &&
181 devid == amdtemp_products[i].amdtemp_deviceid)
189 amdtemp_identify(driver_t *driver, device_t parent)
193 /* Make sure we're not being doubly invoked. */
194 if (device_find_child(parent, "amdtemp", -1) != NULL)
197 if (amdtemp_match(parent)) {
198 child = device_add_child(parent, "amdtemp", -1);
200 device_printf(parent, "add amdtemp child failed\n");
205 amdtemp_probe(device_t dev)
207 uint32_t family, model;
209 if (resource_disabled("amdtemp", 0))
211 if (!amdtemp_match(device_get_parent(dev)))
214 family = CPUID_TO_FAMILY(cpu_id);
215 model = CPUID_TO_MODEL(cpu_id);
219 if ((model == 0x04 && (cpu_id & CPUID_STEPPING) == 0) ||
220 (model == 0x05 && (cpu_id & CPUID_STEPPING) <= 1))
234 device_set_desc(dev, "AMD CPU On-Die Thermal Sensors");
236 return (BUS_PROBE_GENERIC);
240 amdtemp_attach(device_t dev)
244 struct amdtemp_softc *sc = device_get_softc(dev);
245 struct sysctl_ctx_list *sysctlctx;
246 struct sysctl_oid *sysctlnode;
247 uint32_t cpuid, family, model;
249 int erratum319, unit;
254 * CPUID Register is available from Revision F.
257 family = CPUID_TO_FAMILY(cpuid);
258 model = CPUID_TO_MODEL(cpuid);
259 if ((family != 0x0f || model >= 0x40) && family != 0x17) {
260 cpuid = pci_read_config(dev, AMDTEMP_CPUID, 4);
261 family = CPUID_TO_FAMILY(cpuid);
262 model = CPUID_TO_MODEL(cpuid);
268 * Thermaltrip Status Register
270 * - ThermSenseCoreSel
272 * Revision F & G: 0 - Core1, 1 - Core0
273 * Other: 0 - Core0, 1 - Core1
277 * Revision G: bits 23-14
280 * XXX According to the BKDG, CurTmp, ThermSenseSel and
281 * ThermSenseCoreSel bits were introduced in Revision F
282 * but CurTmp seems working fine as early as Revision C.
283 * However, it is not clear whether ThermSenseSel and/or
284 * ThermSenseCoreSel work in undocumented cases as well.
285 * In fact, the Linux driver suggests it may not work but
286 * we just assume it does until we find otherwise.
288 * XXX According to Linux, CurTmp starts at -28C on
289 * Socket AM2 Revision G processors, which is not
290 * documented anywhere.
293 sc->sc_flags |= AMDTEMP_FLAG_CS_SWAP;
294 if (model >= 0x60 && model != 0xc1) {
295 do_cpuid(0x80000001, regs);
296 bid = (regs[1] >> 9) & 0x1f;
298 case 0x68: /* Socket S1g1 */
302 case 0x6b: /* Socket AM2 and ASB1 (2 cores) */
303 if (bid != 0x0b && bid != 0x0c)
305 AMDTEMP_FLAG_ALT_OFFSET;
307 case 0x6f: /* Socket AM2 and ASB1 (1 core) */
309 if (bid != 0x07 && bid != 0x09 &&
312 AMDTEMP_FLAG_ALT_OFFSET;
315 sc->sc_flags |= AMDTEMP_FLAG_ALT_OFFSET;
317 sc->sc_flags |= AMDTEMP_FLAG_CT_10BIT;
321 * There are two sensors per core.
325 sc->sc_gettemp = amdtemp_gettemp0f;
329 * Erratum 319 Inaccurate Temperature Measurement
331 * http://support.amd.com/us/Processor_TechDocs/41322.pdf
333 do_cpuid(0x80000001, regs);
334 switch ((regs[1] >> 28) & 0xf) {
335 case 0: /* Socket F */
338 case 1: /* Socket AM2+ or AM3 */
339 if ((pci_cfgregread(pci_get_bus(dev),
340 pci_get_slot(dev), 2, AMDTEMP_DRAM_CONF_HIGH, 2) &
341 AMDTEMP_DRAM_MODE_DDR3) != 0 || model > 0x04 ||
342 (model == 0x04 && (cpuid & CPUID_STEPPING) >= 3))
344 /* XXX 00100F42h (RB-C2) exists in both formats. */
355 * There is only one sensor per package.
359 sc->sc_gettemp = amdtemp_gettemp;
363 sc->sc_gettemp = amdtemp_gettemp17h;
364 sc->sc_smn = device_find_child(
365 device_get_parent(dev), "amdsmn", -1);
366 if (sc->sc_smn == NULL) {
368 device_printf(dev, "No SMN device found\n");
374 /* Find number of cores per package. */
375 sc->sc_ncores = (amd_feature2 & AMDID2_CMP) != 0 ?
376 (cpu_procinfo2 & AMDID_CMP_CORES) + 1 : 1;
377 if (sc->sc_ncores > MAXCPU)
382 "Erratum 319: temperature measurement may be inaccurate\n");
384 device_printf(dev, "Found %d cores and %d sensors.\n",
386 sc->sc_ntemps > 1 ? sc->sc_ntemps * sc->sc_ncores : 1);
389 * dev.amdtemp.N tree.
391 unit = device_get_unit(dev);
392 snprintf(tn, sizeof(tn), "dev.amdtemp.%d.sensor_offset", unit);
393 TUNABLE_INT_FETCH(tn, &sc->sc_offset);
395 sysctlctx = device_get_sysctl_ctx(dev);
396 SYSCTL_ADD_INT(sysctlctx,
397 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
398 "sensor_offset", CTLFLAG_RW, &sc->sc_offset, 0,
399 "Temperature sensor offset");
400 sysctlnode = SYSCTL_ADD_NODE(sysctlctx,
401 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
402 "core0", CTLFLAG_RD, 0, "Core 0");
404 SYSCTL_ADD_PROC(sysctlctx,
405 SYSCTL_CHILDREN(sysctlnode),
406 OID_AUTO, "sensor0", CTLTYPE_INT | CTLFLAG_RD,
407 dev, CORE0_SENSOR0, amdtemp_sysctl, "IK",
408 "Core 0 / Sensor 0 temperature");
410 if (sc->sc_ntemps > 1) {
411 SYSCTL_ADD_PROC(sysctlctx,
412 SYSCTL_CHILDREN(sysctlnode),
413 OID_AUTO, "sensor1", CTLTYPE_INT | CTLFLAG_RD,
414 dev, CORE0_SENSOR1, amdtemp_sysctl, "IK",
415 "Core 0 / Sensor 1 temperature");
417 if (sc->sc_ncores > 1) {
418 sysctlnode = SYSCTL_ADD_NODE(sysctlctx,
419 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
420 OID_AUTO, "core1", CTLFLAG_RD, 0, "Core 1");
422 SYSCTL_ADD_PROC(sysctlctx,
423 SYSCTL_CHILDREN(sysctlnode),
424 OID_AUTO, "sensor0", CTLTYPE_INT | CTLFLAG_RD,
425 dev, CORE1_SENSOR0, amdtemp_sysctl, "IK",
426 "Core 1 / Sensor 0 temperature");
428 SYSCTL_ADD_PROC(sysctlctx,
429 SYSCTL_CHILDREN(sysctlnode),
430 OID_AUTO, "sensor1", CTLTYPE_INT | CTLFLAG_RD,
431 dev, CORE1_SENSOR1, amdtemp_sysctl, "IK",
432 "Core 1 / Sensor 1 temperature");
437 * Try to create dev.cpu sysctl entries and setup intrhook function.
438 * This is needed because the cpu driver may be loaded late on boot,
441 amdtemp_intrhook(dev);
442 sc->sc_ich.ich_func = amdtemp_intrhook;
443 sc->sc_ich.ich_arg = dev;
444 if (config_intrhook_establish(&sc->sc_ich) != 0) {
445 device_printf(dev, "config_intrhook_establish failed!\n");
453 amdtemp_intrhook(void *arg)
455 struct amdtemp_softc *sc;
456 struct sysctl_ctx_list *sysctlctx;
457 device_t dev = (device_t)arg;
458 device_t acpi, cpu, nexus;
462 sc = device_get_softc(dev);
465 * dev.cpu.N.temperature.
467 nexus = device_find_child(root_bus, "nexus", 0);
468 acpi = device_find_child(nexus, "acpi", 0);
470 for (i = 0; i < sc->sc_ncores; i++) {
471 if (sc->sc_sysctl_cpu[i] != NULL)
473 cpu = device_find_child(acpi, "cpu",
474 device_get_unit(dev) * sc->sc_ncores + i);
476 sysctlctx = device_get_sysctl_ctx(cpu);
478 sensor = sc->sc_ntemps > 1 ?
479 (i == 0 ? CORE0 : CORE1) : CORE0_SENSOR0;
480 sc->sc_sysctl_cpu[i] = SYSCTL_ADD_PROC(sysctlctx,
481 SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)),
482 OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD,
483 dev, sensor, amdtemp_sysctl, "IK",
484 "Current temparature");
487 if (sc->sc_ich.ich_arg != NULL)
488 config_intrhook_disestablish(&sc->sc_ich);
492 amdtemp_detach(device_t dev)
494 struct amdtemp_softc *sc = device_get_softc(dev);
497 for (i = 0; i < sc->sc_ncores; i++)
498 if (sc->sc_sysctl_cpu[i] != NULL)
499 sysctl_remove_oid(sc->sc_sysctl_cpu[i], 1, 0);
501 /* NewBus removes the dev.amdtemp.N tree by itself. */
507 amdtemp_sysctl(SYSCTL_HANDLER_ARGS)
509 device_t dev = (device_t)arg1;
510 struct amdtemp_softc *sc = device_get_softc(dev);
511 amdsensor_t sensor = (amdsensor_t)arg2;
512 int32_t auxtemp[2], temp;
517 auxtemp[0] = sc->sc_gettemp(dev, CORE0_SENSOR0);
518 auxtemp[1] = sc->sc_gettemp(dev, CORE0_SENSOR1);
519 temp = imax(auxtemp[0], auxtemp[1]);
522 auxtemp[0] = sc->sc_gettemp(dev, CORE1_SENSOR0);
523 auxtemp[1] = sc->sc_gettemp(dev, CORE1_SENSOR1);
524 temp = imax(auxtemp[0], auxtemp[1]);
527 temp = sc->sc_gettemp(dev, sensor);
530 error = sysctl_handle_int(oidp, &temp, 0, req);
535 #define AMDTEMP_ZERO_C_TO_K 2731
538 amdtemp_gettemp0f(device_t dev, amdsensor_t sensor)
540 struct amdtemp_softc *sc = device_get_softc(dev);
541 uint32_t mask, offset, temp;
543 /* Set Sensor/Core selector. */
544 temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 1);
545 temp &= ~(AMDTEMP_TTSR_SELCORE | AMDTEMP_TTSR_SELSENSOR);
548 temp |= AMDTEMP_TTSR_SELSENSOR;
552 if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) != 0)
553 temp |= AMDTEMP_TTSR_SELCORE;
556 temp |= AMDTEMP_TTSR_SELSENSOR;
560 if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) == 0)
561 temp |= AMDTEMP_TTSR_SELCORE;
564 pci_write_config(dev, AMDTEMP_THERMTP_STAT, temp, 1);
566 mask = (sc->sc_flags & AMDTEMP_FLAG_CT_10BIT) != 0 ? 0x3ff : 0x3fc;
567 offset = (sc->sc_flags & AMDTEMP_FLAG_ALT_OFFSET) != 0 ? 28 : 49;
568 temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 4);
569 temp = ((temp >> 14) & mask) * 5 / 2;
570 temp += AMDTEMP_ZERO_C_TO_K + (sc->sc_offset - offset) * 10;
576 amdtemp_gettemp(device_t dev, amdsensor_t sensor)
578 struct amdtemp_softc *sc = device_get_softc(dev);
581 temp = pci_read_config(dev, AMDTEMP_REPTMP_CTRL, 4);
582 temp = ((temp >> 21) & 0x7ff) * 5 / 4;
583 temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10;
589 amdtemp_gettemp17h(device_t dev, amdsensor_t sensor)
591 struct amdtemp_softc *sc = device_get_softc(dev);
595 error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CUR_TMP, &temp);
596 KASSERT(error == 0, ("amdsmn_read"));
598 temp = ((temp >> 21) & 0x7ff) * 5 / 4;
599 temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10;